Write proper change status commands
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@ -65,6 +65,7 @@ class Die
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bool is_clkin_cfg_empty() const;
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bool is_glbout_cfg_empty() const;
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bool is_status_cfg_empty() const;
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bool is_using_cfg_gpios() const;
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void write_latch(int x, int y, const std::vector<uint8_t> &data);
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void write_ram(int x, int y, const std::vector<uint8_t> &data);
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@ -49,6 +49,15 @@ static constexpr const uint8_t CMD_WAIT_PLL = 0xdc; //
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static constexpr const uint8_t CMD_SPLL = 0xdd;
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static constexpr const uint8_t CMD_SLAVE_MODE = 0xde;
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static constexpr const uint8_t CFG_NONE = 0x00;
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static constexpr const uint8_t CFG_DONE = 0x01;
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static constexpr const uint8_t CFG_STOP = 0x02;
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static constexpr const uint8_t CFG_RECONFIG = 0x04;
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static constexpr const uint8_t CFG_CPE_CFG = 0x08;
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static constexpr const uint8_t CFG_CPE_RESET = 0x10;
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static constexpr const uint8_t CFG_FILL_RAM = 0x20;
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static constexpr const uint8_t CFG_SERDES = 0x40;
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static const uint16_t crc_table_x25[256] = {
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0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5,
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0xe97e, 0xf8f7, 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 0x9cc9, 0x8d40, 0xbfdb, 0xae52,
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@ -345,6 +354,19 @@ class BitstreamReadWriter
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write_byte(0x33);
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write_nops(4);
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}
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void write_cmd_chg_status(uint8_t cfg, std::vector<uint8_t> data)
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{
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write_header(CMD_CHG_STATUS, 12);
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write_byte(cfg);
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write_byte(0x00);
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for (int i = 2; i < 12; i++)
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write_byte(data[Die::STATUS_CFG_START + i]);
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insert_crc16();
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write_nops(4);
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write_byte(0x33);
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write_nops(4);
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}
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};
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void check_crc(BitstreamReadWriter &rd)
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@ -673,7 +695,7 @@ Bitstream Bitstream::serialise_chip(const Chip &chip)
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// Write RAM contents
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if (ram_used) {
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wr.write_cmd_chg_status(0x20);
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wr.write_cmd_chg_status(CFG_FILL_RAM);
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for (int y = Die::MAX_RAM_ROWS - 1; y >= 0; y--) {
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for (int x = Die::MAX_RAM_COLS - 1; x >= 0; x--) {
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// Empty configuration is skipped
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@ -688,7 +710,7 @@ Bitstream Bitstream::serialise_chip(const Chip &chip)
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ram_used = true;
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}
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}
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wr.write_cmd_chg_status(0x00);
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wr.write_cmd_chg_status(CFG_NONE);
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}
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// Write latch configuration
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@ -749,15 +771,14 @@ Bitstream Bitstream::serialise_chip(const Chip &chip)
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}
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// Write change status
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wr.write_header(CMD_CHG_STATUS, 12);
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wr.write_byte(0x13); // 0
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wr.write_byte(0x00); // 1
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for (int i = 2; i < 12; i++)
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wr.write_byte(die_config[Die::STATUS_CFG_START + i]); // 2
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wr.insert_crc16();
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wr.write_nops(4);
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wr.write_byte(0x33);
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wr.write_nops(4);
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if (die.is_using_cfg_gpios())
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wr.write_cmd_chg_status(CFG_DONE);
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uint8_t cfg_stat = CFG_DONE | CFG_STOP | CFG_CPE_RESET;
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// cfg_stat |= CFG_RECONFIG | CFG_CPE_CFG;
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// cfg_stat |= CFG_SERDES;
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wr.write_cmd_chg_status(cfg_stat, die_config);
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return Bitstream(wr.get());
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}
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@ -92,6 +92,8 @@ bool Die::is_status_cfg_empty() const
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return true;
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}
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bool Die::is_using_cfg_gpios() const { return die_cfg[STATUS_CFG_START + 2] & 0x08; }
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void Die::write_latch(int x, int y, const std::vector<uint8_t> &data)
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{
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int pos = 0;
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