93 lines
3.8 KiB
C++
93 lines
3.8 KiB
C++
/*
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* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
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*
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* Copyright (C) 2024 The Project Peppercorn Authors.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef LIBGATEMATE_DIE_HPP
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#define LIBGATEMATE_DIE_HPP
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#include <cstdint>
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#include <map>
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#include <string>
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#include <vector>
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namespace GateMate {
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class Die
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{
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public:
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static constexpr int MAX_ROWS = 66;
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static constexpr int MAX_COLS = 82;
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static constexpr int MAX_RAM = 32;
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static constexpr int MAX_RAM_ROWS = 8;
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static constexpr int MAX_RAM_COLS = 4;
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static constexpr int LATCH_BLOCK_SIZE = 112 + 1; // Added one more byte for FF_INIT
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static constexpr int RAM_BLOCK_SIZE = 27;
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static constexpr int MEMORY_SIZE = 5120;
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static constexpr int MAX_PLL = 4;
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static constexpr int PLL_CFG_SIZE = 12;
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static constexpr int CLKIN_CFG_SIZE = 4;
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static constexpr int GLBOUT_CFG_SIZE = 8;
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static constexpr int STATUS_CFG_SIZE = 12;
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static constexpr int STATUS_CFG_START = PLL_CFG_SIZE * MAX_PLL * 2 + CLKIN_CFG_SIZE + GLBOUT_CFG_SIZE;
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static constexpr int DIE_CONFIG_SIZE = STATUS_CFG_START + STATUS_CFG_SIZE;
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static constexpr int FF_INIT_RESET = 2;
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static constexpr int FF_INIT_SET = 3;
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public:
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explicit Die();
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// Get max row and column
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int get_max_row() const { return MAX_ROWS; }
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int get_max_col() const { return MAX_COLS; }
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int get_max_ram_row() const { return MAX_RAM_ROWS; }
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int get_max_ram_col() const { return MAX_RAM_COLS; }
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bool is_latch_empty(int x, int y) const;
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bool is_cpe_empty(int x, int y) const;
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bool is_ram_empty(int x, int y) const;
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bool is_ram_data_empty(int x, int y) const;
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bool is_pll_cfg_empty(int index) const;
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bool is_clkin_cfg_empty() const;
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bool is_glbout_cfg_empty() const;
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bool is_status_cfg_empty() const;
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bool is_using_cfg_gpios() const;
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void write_latch(int x, int y, const std::vector<uint8_t> &data);
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void write_ram(int x, int y, const std::vector<uint8_t> &data);
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void write_ram_data(int x, int y, const std::vector<uint8_t> &data, uint16_t addr);
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void write_pll_select(uint8_t select, const std::vector<uint8_t> &data);
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void write_die_cfg(const std::vector<uint8_t> &data) { die_cfg = data; }
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void write_ff_init(int x, int y, uint8_t data);
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void write_status(const std::vector<uint8_t> &data);
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const std::vector<uint8_t> get_latch_config(int x, int y) const { return latch.at(std::make_pair(x, y)); }
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const std::vector<uint8_t> get_ram_config(int x, int y) const { return ram.at(std::make_pair(x, y)); }
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const std::vector<uint8_t> get_ram_data(int x, int y) const { return ram_data.at(std::make_pair(x, y)); }
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const std::vector<uint8_t> get_die_config() const { return die_cfg; }
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private:
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std::map<std::pair<int, int>, std::vector<uint8_t>> latch; // Config latches
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std::map<std::pair<int, int>, std::vector<uint8_t>> ram; // Config RAM
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std::map<std::pair<int, int>, std::vector<uint8_t>> ram_data; // RAM data content FRAM
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std::vector<uint8_t> die_cfg; // Config for all PLLs, CLKIN and GLBOUT
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};
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} // namespace GateMate
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#endif // LIBGATEMATE_DIE_HPP
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