Julio Nunes Avelar 7e4b42b795 Adding support for AMD Virtex 7 FPGA VC709 Connectivity Kit Board

2024-07-12 23:32:14 -03:00

..

compatibility

doc/cable: move to yml

2022-02-20 15:47:35 +01:00

guide

DATA_DIR override with environment variable (#333)

2023-04-17 20:55:10 +02:00

vendors

doc/vendors/xilinx: adding a note for Zynq devices

2023-07-31 16:48:20 +02:00

boards.yml

Adding support for AMD Virtex 7 FPGA VC709 Connectivity Kit Board

2024-07-12 23:32:14 -03:00

cable.yml

Add support for Numato Systems Mimas A7 board.

2024-06-22 08:03:14 -04:00

conf.py

doc/cable: move to yml

2022-02-20 15:47:35 +01:00

data.py

doc/data: adding an (unused for now) SPIFlash entry

2023-09-21 07:03:41 +02:00

FPGAs.yml

add EP4CGX150

2024-04-27 16:18:23 +07:00

index.rst

colognechip integration: update documentation

2021-12-12 18:26:14 +01:00

Makefile

doc: add Sphinx site

2021-11-28 10:20:43 +01:00

requirements.txt

doc: declare board compatibility through a YAML file

2022-01-12 03:00:55 +01:00

todo.rst

doc: convert TODO from md to rst

2021-11-28 10:24:07 +01:00