Maik Ender 4161c79920 Add Support for Xilinx KCU116 (#322) ...

* initial kcu116 support

* add kintex ultrascale plus family to xilinx.cpp

* add docs

* combine xcku and xcvu check

* rebuild bitstream for -1 speedgrade

2023-03-09 20:48:19 +01:00

..

compatibility

doc/cable: move to yml

2022-02-20 15:47:35 +01:00

guide

CMakeLists: when gzip is available spiOverJtag .bit and .rbf are compressed before installing

2023-02-02 07:38:35 +01:00

vendors

Add Support for Xilinx KCU116 (#322)

2023-03-09 20:48:19 +01:00

boards.yml

Add Support for Xilinx KCU116 (#322)

2023-03-09 20:48:19 +01:00

cable.yml

remoteBitbang_client: adding new protocol (client side)

2023-03-02 13:47:11 +01:00

conf.py

doc/cable: move to yml

2022-02-20 15:47:35 +01:00

data.py

doc/cable: move to yml

2022-02-20 15:47:35 +01:00

FPGAs.yml

doc/FPGAs: adding Artix UltraScale+

2023-02-28 22:36:09 +01:00

index.rst

colognechip integration: update documentation

2021-12-12 18:26:14 +01:00

Makefile

doc: add Sphinx site

2021-11-28 10:20:43 +01:00

requirements.txt

doc: declare board compatibility through a YAML file

2022-01-12 03:00:55 +01:00

todo.rst

doc: convert TODO from md to rst

2021-11-28 10:24:07 +01:00