f349377f5f
mcsParser: reworks code to uses FlashDataSection
2025-12-17 20:05:11 +01:00
d7b9d58768
spiInterface: added write method variant with vector of FlashDataSection
2025-12-17 20:05:11 +01:00
f2c013daab
spiFlash: added erase_and_prog method with vector of FlashDataSection
2025-12-17 20:05:11 +01:00
4a593c258c
spiFlash: moved BP status, unlock step into a dedicatedmethod
2025-12-17 20:05:11 +01:00
a7e4303563
spiFlash: bulk_erase method: allows BP bypass and printXX with a verbose level
2025-12-17 20:05:11 +01:00
e302bb6edc
spiFlash: added FlashDataSection to handle bitstream per sections when gap or 0xff area are present
2025-12-17 20:05:11 +01:00
7ed4954c91
Merge pull request #599 from zh522130/fix-analogic-high-freq-flash
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anlogic: fix high frequency flash programming issue
2025-12-13 08:55:14 +01:00
fe115e10dd
Merge pull request #598 from zh522130/efinix-header-verify
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efinix: Add header parsing and flash programming validation
2025-12-13 08:53:37 +01:00
4c17327a65
anlogic: fix high frequency flash programming issue
2025-12-12 04:14:14 +00:00
ebf2f6fd80
efinix: Add header parsing and flash programming validation
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Parse bitstream header to extract Mode, Width and Device fields.
Add validation for flash programming:
- Check device matches --fpga-part parameter
- Reject passive mode (only active mode supported for flash)
This prevents flashing incorrect bitstreams that would fail to boot.
2025-12-12 02:55:31 +00:00
c16e6d0f65
Merge pull request #597 from zh522130/add-t120f324
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spiOverJtag: Add support for Efinix T120F324
2025-12-11 17:09:12 +01:00
251d7fde58
spiOverJtag: Add support for Efinix T120F324
2025-12-11 20:09:26 +08:00
8411153d49
doc/FPGAs.yml: added GW5AT-15 variant
2025-12-10 11:15:11 +01:00
9f6887e082
Merge pull request #596 from enjoy-digital/gw5at-15
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src/gowin: Add support for GW5AT-15 (used on Sipeed Slogic16U3).
2025-12-10 11:12:21 +01:00
206cbd68b7
src/gowin: Add support for GW5AT-15 (used on Sipeed Slogic16U3).
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JTAG pinout on Sipeed Slogic16U3 is similar to Sipeed Tang Primier 20K JTAG pinout and
extension cable from Tang Primer 20K can be used.
./openFPGALoader -c digilent_hs2 --detect
empty
Jtag frequency : requested 6.00MHz -> real 6.00MHz
index 0:
idcode 0x1681b
manufacturer Gowin
family GW5AT
model GW5AT-15
irlength 8
2025-12-10 10:57:18 +01:00
432cdc2dd7
lattice: added SPI Flash access support for ECP3 family
2025-12-08 16:24:40 +01:00
b76840b20d
doc/FPGAs.yml: added Kintex UltraScale+ reference
2025-11-05 18:43:38 +01:00
530b7a9993
Merge pull request #593 from AEW2015/master
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basic PDI prog for Spartan Ultrascale+
2025-10-23 06:50:14 +02:00
648a4a833a
basic PDI prog for Spartan Ultrascale+
2025-10-23 06:44:19 +02:00
03be134cdd
Merge pull request #591 from hennomann/patch-1
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Update part.hpp to support Lattice LFE3-150EA device
2025-10-02 12:02:15 +02:00
617cd29dff
Update part.hpp to support Lattice LFE3-150EA device
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This PR adds device ID support for the Lattice ECP3 LFE3-150EA.
Previously, only the LFE3-70E was supported.
We've tested the implementation and confirmed it works as expected.
We're happy to contribute to expanding ECP3 device support!
2025-10-02 11:32:19 +02:00
205e6f9ea5
spiOverJtag/build.py: fixed model value for kintex7 with ISE
2025-09-25 17:09:38 +02:00
f8ae76e771
spiOverJtag/build.py: added default value for pkg variable
2025-09-25 15:47:48 +02:00
8694b3c295
board: added HyVision PCIe OPT01 rev.F (Kintex7 xc7k70tfbg676)
2025-09-24 16:56:46 +02:00
a7b72321fe
spiOverJtag: added xc7k70tfbg676 variant
2025-09-24 16:48:02 +02:00
8e6eb1085c
spiOverJtag/build.py: simplify Kintex7 uses
2025-09-24 16:46:57 +02:00
13cf0c59b9
xilinx: load_bridge: uses configBitstreamParser getFilename to print real name instead of theorical (with or without .gz)
2025-09-24 08:07:27 +02:00
6935936a92
configBitstreamParser: added filename getter
2025-09-24 08:06:28 +02:00
39b3ca5871
spiInterface: all methods: added a \n after command displayed (avoids unclear message when calee methods uses printxxx)
2025-09-24 08:06:06 +02:00
fdc9edc6cb
spiOverJtag/xilinx_spiOverJtag.v: spartan3e: spi_drck -> drck
2025-09-22 10:18:24 +02:00
29a5bc3515
spiOverJtag/xilinx_spiOverJtag.v: fixed code for virtex6 targets
2025-09-20 18:05:55 +02:00
6df4bce1fd
xilinx: allows Flash write for Xilinx Spartan3 targets
2025-09-20 17:31:32 +02:00
1ccc2a0d5b
spiOverJtag/xilinx_spiOverJtag.v: can't declare spi_clk for spartan3e device. Fixed sck assign for spartan3e
2025-09-20 17:30:10 +02:00
5e67fee9f5
spiOverJtag/build.py: gzip file must be produces for all Xilinx devices
2025-09-17 20:16:03 +02:00
06b4e2f143
spiOverJtag/xilinx_spiOverJtag.v: don't redeclares tdo for spartan3e
2025-09-17 11:55:52 +02:00
1fc7539538
Prepare v1.0.0 release
2025-09-12 16:00:32 +02:00
e2c55f24c0
part: fixed cyclone III/IV/10 LP IDCODE (same code for all families)
2025-09-12 13:26:36 +02:00
c102426b78
Add altera EP4CE30 ( #584 )
2025-09-08 08:34:37 +02:00
2e12478a65
99-openfpgaloader.rules: added Altera usb-blasterIII rule
2025-09-03 17:34:49 +02:00
19a8df433a
.github/workflows/Test.yml: fixed CI with windows (msys2/setup-msys2 master looks broken)
2025-09-03 17:34:19 +02:00
cfddee3611
colognechip: add bulk erase + quad enable features and simplify spi_wait overload ( #582 )
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* colognechip: add bulk erase + quad enable features and simplify spi_wait overload
* colognechip: remove unnecessary code in `set_quad_bit` and `bulk_erase_flash`
2025-09-03 16:26:16 +02:00
501d37e351
Merge pull request #581 from pu-cc/at25ql321
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spiFlashdb: add AT25QL321
2025-09-03 14:38:11 +02:00
26849d089b
Merge pull request #580 from pu-cc/fix-spiflash-qen
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spiFlash: mask RDSR_WIP instead of RDSR_WEL while waiting for completion
2025-09-03 14:37:16 +02:00
41e4a93f80
spiFlashdb: add AT25QL321
2025-09-03 14:11:28 +02:00
db64ec92cb
spiFlash: mask RDSR_WIP instead of RDSR_WEL while waiting for completion
2025-09-03 13:55:31 +02:00
bdcdea9a2f
cable: added altera usb blaster III variant
2025-08-27 18:26:17 +02:00
46a0560927
display: std::endl -> \n
2025-08-26 17:51:31 +02:00
850c3d74e0
progressBar: added eol for each progressBar update when no STDOUT_FILENO
2025-08-26 17:49:01 +02:00
2580aed994
esp_usb_jtag: added support for https://github.com/espressif/esp-usb-bridge + small adjusts
2025-08-25 09:38:00 +02:00
c818641cae
main: list_boards: print 'Undefined' when fpga_part or cable_name is empty
2025-08-07 11:00:49 +02:00
Gwenhael Goavec-Merou
zhangyh
Florent Kermarrec
Andrew E Wilson
hennomann
Andy
Patrick Urban