bbfd5045d4
Merge pull request #617 from fisherdog4/patch-1
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Add xc7z007s
2026-01-22 07:57:04 +01:00
65ac4b24a3
Add xc7z007s
2026-01-21 20:50:19 -05:00
ecebc40004
Fix build with -DENABLE_FTDI_BASED_CABLE=off; fix potential array out-of-bounds access ( #616 )
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* Fix build without FTDI cable
Signed-off-by: Qi Zhou <atmgnd@outlook.com>
* Fix potential array out‑of‑bounds access
Signed-off-by: Qi Zhou <atmgnd@outlook.com>
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Signed-off-by: Qi Zhou <atmgnd@outlook.com>
Co-authored-by: Qi Zhou <qi.zhou@unispc.com>
2026-01-21 14:38:30 +01:00
86ae6ed372
Merge pull request #615 from enjoy-digital/7series
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src/part.hpp: Add missing Xilinx 7-series IDCODEs.
2026-01-20 14:56:02 +01:00
4767ec2ce2
src/part.hpp: Add missing Xilinx 7-series IDCODEs.
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Add missing 7-series entries based on UG470 v1.17 Table 1-1.
Source:
- AMD UG470 (7 Series FPGAs Configuration User Guide), v1.17 (2023-12-05), Table 1-1
https://docs.amd.com/v/u/en-US/ug470_7Series_Config
2026-01-20 14:52:04 +01:00
667b3585d8
Merge pull request #614 from enjoy-digital/spartan_ultrascale+
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src/part.hpp: Add Xilinx Spartan UltraScale+ devices.
2026-01-20 14:41:18 +01:00
87bf3c0f74
src/part.hpp: Add Xilinx Spartan UltraScale+ devices.
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Extend fpga_list with Spartan UltraScale+ JTAG IDCODEs.
Source:
- https://docs.amd.com/r/en-US/ug860-spartan-configuration/Spartan-UltraScale-Devices-and-JTAG-IDCODEs
2026-01-20 14:40:04 +01:00
18f2c931ab
Merge pull request #613 from enjoy-digital/ultrascale+
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src/part.hpp: Add missing Xilinx UltraScale+ device IDCODEs.
2026-01-20 14:27:49 +01:00
25ad02bb5e
src/part.hpp: Add missing Xilinx UltraScale+ device IDCODEs.
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Extend fpga_list with additional UltraScale+ parts (Artix/Kintex/Virtex).
Source:
- https://review.openocd.org/c/openocd/+/7716
- https://sourceforge.net/p/openocd/mailman/openocd-devel/thread/20230525234809.B6A131B2%40openocd.org/
2026-01-20 14:15:02 +01:00
d767f57a73
Merge pull request #612 from Wolfiwolf/add-flash-mx25v8035
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spiFlashdb: Added MX25V8035F NOR flash chip
2026-01-19 07:58:46 +01:00
7432d49391
spiFlashdb: Added MX25V8035F NOR flash chip
2026-01-18 21:51:40 +01:00
e77af309e1
Merge pull request #608 from lipx1508/patch-1
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Fix a small formatting error
2026-01-08 11:23:28 +01:00
a1599b63f8
Fix a small formatting error
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`obuf - _obuf` returns `long` rather than `long long`
2026-01-07 15:51:17 -03:00
b870ee4c4f
jtag.cpp: ENABLE_ESP_USB_JTAG -> ENABLE_ESP_USB
2026-01-02 11:00:51 +01:00
0ce9fcb050
dirtyJtag: writeTDI: when end don't shift before applying last bit -> this Byte is correctly aligned during previous step
2026-01-02 10:04:02 +01:00
6a7bd29e0d
dirtyJtag: writeTDI: fixed last Byte align
2026-01-02 09:52:41 +01:00
d654a9d6d5
esp_usb_jtag: toggleClk: ignore tdi/tms and keep these pins to the current state
2026-01-01 12:46:39 +01:00
c7c0d94168
dirtyJtag: improves code / nitpick
2026-01-01 11:33:30 +01:00
097e236be8
dirtyJtag: writeTMS: honour tdi method parameter (required by gowin GW5A family)
2025-12-31 15:49:04 +01:00
936fe64c4a
ftdipp_mpsse.cpp: setClkFreq: flush buffers before changing clock frequency
2025-12-31 12:09:58 +01:00
2c6dac2d9c
lattice: fixed SRAM for NEXUS family
2025-12-30 15:50:19 +01:00
6f920360fc
lattice: fixed SPI Flash access for NEXUS Family
2025-12-30 11:34:35 +01:00
dd7b74d2f5
lattice: uses reg_content to defines status registers bits for Nexus family
2025-12-30 09:15:10 +01:00
667f8de666
Merge pull request #606 from germaneguise/feature/dirtyjtag-custom-vid-pid
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dirtyjtag: Allow custom VID/PID via command line options
2025-12-29 13:27:58 +01:00
c1c6e438a5
dirtyjtag: Allow custom VID/PID via command line options
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Pass cable.vid and cable.pid to DirtyJtag constructor instead of using
hardcoded DIRTYJTAG_VID/PID. This allows users to use DirtyJTAG-compatible
firmware with custom USB VID/PID using the --vid and --pid flags:
openFPGALoader -c dirtyJtag --vid 0x1337 --pid 0x0001 bitstream.fs
This is useful for custom DirtyJTAG implementations, embedded microcontrollers
with built-in JTAG adapters, or devices that use MS OS 2.0 descriptors for
automatic WinUSB driver loading with different VID/PID.
The default VID/PID (0x1209:0xC0CA) is preserved for backward compatibility.
2025-12-27 16:12:31 +09:00
ac3ed1266d
CMakeLists.txt: bump cmake_minimum_required to 3.10
2025-12-26 09:17:15 +01:00
6bac72cd68
Global: added option to select/deselect all cables, added variables ENABLE_xxx to enable corresponding cables. Some vendor drivers needs to to be disabled accordlingly
2025-12-26 09:17:06 +01:00
a81067bf63
Merge pull request #604 from phdussud/master
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Enable support for CH347F
2025-12-25 11:17:32 +01:00
84897ffa78
Enable support for CH347F
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FIx a Windows issue
2025-12-24 12:13:56 -08:00
63a42344bc
lattice: rework program_extFlash method to uses new mcsParser features when extension == mcs
2025-12-17 20:05:11 +01:00
3706236b43
xilinx: rework program_spi method to uses new mcsParser features when extension == mcs
2025-12-17 20:05:11 +01:00
f349377f5f
mcsParser: reworks code to uses FlashDataSection
2025-12-17 20:05:11 +01:00
d7b9d58768
spiInterface: added write method variant with vector of FlashDataSection
2025-12-17 20:05:11 +01:00
f2c013daab
spiFlash: added erase_and_prog method with vector of FlashDataSection
2025-12-17 20:05:11 +01:00
4a593c258c
spiFlash: moved BP status, unlock step into a dedicatedmethod
2025-12-17 20:05:11 +01:00
a7e4303563
spiFlash: bulk_erase method: allows BP bypass and printXX with a verbose level
2025-12-17 20:05:11 +01:00
e302bb6edc
spiFlash: added FlashDataSection to handle bitstream per sections when gap or 0xff area are present
2025-12-17 20:05:11 +01:00
7ed4954c91
Merge pull request #599 from zh522130/fix-analogic-high-freq-flash
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anlogic: fix high frequency flash programming issue
2025-12-13 08:55:14 +01:00
fe115e10dd
Merge pull request #598 from zh522130/efinix-header-verify
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efinix: Add header parsing and flash programming validation
2025-12-13 08:53:37 +01:00
4c17327a65
anlogic: fix high frequency flash programming issue
2025-12-12 04:14:14 +00:00
ebf2f6fd80
efinix: Add header parsing and flash programming validation
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Parse bitstream header to extract Mode, Width and Device fields.
Add validation for flash programming:
- Check device matches --fpga-part parameter
- Reject passive mode (only active mode supported for flash)
This prevents flashing incorrect bitstreams that would fail to boot.
2025-12-12 02:55:31 +00:00
c16e6d0f65
Merge pull request #597 from zh522130/add-t120f324
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spiOverJtag: Add support for Efinix T120F324
2025-12-11 17:09:12 +01:00
251d7fde58
spiOverJtag: Add support for Efinix T120F324
2025-12-11 20:09:26 +08:00
8411153d49
doc/FPGAs.yml: added GW5AT-15 variant
2025-12-10 11:15:11 +01:00
9f6887e082
Merge pull request #596 from enjoy-digital/gw5at-15
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src/gowin: Add support for GW5AT-15 (used on Sipeed Slogic16U3).
2025-12-10 11:12:21 +01:00
206cbd68b7
src/gowin: Add support for GW5AT-15 (used on Sipeed Slogic16U3).
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JTAG pinout on Sipeed Slogic16U3 is similar to Sipeed Tang Primier 20K JTAG pinout and
extension cable from Tang Primer 20K can be used.
./openFPGALoader -c digilent_hs2 --detect
empty
Jtag frequency : requested 6.00MHz -> real 6.00MHz
index 0:
idcode 0x1681b
manufacturer Gowin
family GW5AT
model GW5AT-15
irlength 8
2025-12-10 10:57:18 +01:00
432cdc2dd7
lattice: added SPI Flash access support for ECP3 family
2025-12-08 16:24:40 +01:00
b76840b20d
doc/FPGAs.yml: added Kintex UltraScale+ reference
2025-11-05 18:43:38 +01:00
530b7a9993
Merge pull request #593 from AEW2015/master
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basic PDI prog for Spartan Ultrascale+
2025-10-23 06:50:14 +02:00
648a4a833a
basic PDI prog for Spartan Ultrascale+
2025-10-23 06:44:19 +02:00
Gwenhael Goavec-Merou
fisherdog4
atmgnd
Florent Kermarrec
Jernej Volk
letaldev
germaneguise
Patrick Dussud
zhangyh
Andrew E Wilson