Gwenhael Goavec-Merou
a242168e7f
jtag: shiftxR: don't try to move to shift when not required
2021-05-15 09:05:48 +02:00
Gwenhael Goavec-Merou
5da47a0200
jtag: propagate getClkFreq
2021-05-15 08:46:21 +02:00
Gwenhael Goavec-Merou
3d60cd647f
altera: adapt delay according to clock freq
2021-05-15 08:35:16 +02:00
Gwenhael Goavec-Merou
610a76f653
jtagInterface/cables: introduce getClkFreq
2021-05-15 08:32:51 +02:00
Gwenhael Goavec-Merou
c4e58073c1
part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
2021-05-14 16:35:26 +02:00
Gwenhael Goavec-Merou
49ba5f265a
add support for usb-blasterII
2021-05-13 16:11:22 +02:00
Gwenhael Goavec-Merou
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +02:00
Gwenhael Goavec-Merou
167d430c34
usbBlaster: add a low level to support both usbBlasterI(ftdi) and usbBlasterII(fx2)
2021-05-13 16:06:29 +02:00
Gwenhael Goavec-Merou
dc884b86c8
fx2_ll: cypress fx2 low level
2021-05-13 15:28:00 +02:00
Gwenhael Goavec-Merou
c09bc0662b
ihexParser: new parser for (i)hex files
2021-05-13 12:14:52 +02:00
Gwenhael Goavec-Merou
6ae29125ed
spiFlash: add a workaround for microchip SST26VF032B / SST26VF032BA
2021-05-05 06:59:02 +02:00
Gwenhael Goavec-Merou
c82257c9ba
spiFlash: introduce jedec_id
2021-05-05 06:25:00 +02:00
Gwenhael Goavec-Merou
200bc6364e
fsparser: fix checksum with GW1NS-2C, when configuration data is smaller than theory
2021-04-26 19:28:44 +02:00
Gwenhael Goavec-Merou
e2b40e1350
xilinx: supress useless test in spi_wait
2021-04-22 19:06:36 +02:00
Gwenhael Goavec-Merou
a4ccdae7df
add basys3 support
2021-04-20 21:28:14 +02:00
Gwenhael Goavec-Merou
7039465353
rework xilinx fpga spiOverJtag to respect model/package
2021-04-19 21:17:08 +02:00
Gwenhael Goavec-Merou
65a1e995ec
xilinx: be more verbose when spiOverJtag not available
2021-04-19 21:08:11 +02:00
Gwenhael Goavec-Merou
858d9e6273
add support for Alchitry Au
2021-04-16 21:20:30 +02:00
Gwenhael Goavec-Merou
4defec0db1
add support for artix 7 75t
2021-04-15 15:38:36 +02:00
Gwenhael Goavec-Merou
4e2b1aa73e
cable: add SecuringHardware Tigard programmer
2021-03-27 18:43:56 +01:00
Gwenhael Goavec-Merou
32d3872f69
part.hpp: sort altera cyclone V device by alphabetical order
2021-03-27 18:31:39 +01:00
Gwenhael Goavec-Merou
508635f788
Merge pull request #80 from emard/master
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recognize altera cyclone V 5CEBA4 FPGA
2021-03-27 18:30:28 +01:00
Gwenhael Goavec-Merou
fa70a9a3b2
part.hpp: sort xilinx device by alphabetical order
2021-03-27 18:25:52 +01:00
emard
52efdab421
recognize altera cyclone V 5CEBA4 FPGA
2021-03-27 02:00:18 +01:00
Giuseppe Gebbia
16f85fff63
add support for kintex xc7k325t
2021-03-24 17:25:05 +01:00
Gwenhael Goavec-Merou
f33d30dbce
main: fix bitbang check: config pins must be the shift value
2021-03-21 18:51:13 +01:00
Gwenhael Goavec-Merou
630a976884
add support for cycloneIII and Terasic DE0 board
2021-03-20 12:23:17 +01:00
phdussud
ea141fdcfe
Remove spurious files in previous commit
2021-02-27 13:25:22 -08:00
phdussud
e9b1a2e610
fix for space
2021-02-27 13:19:25 -08:00
phdussud
6e96d8f6d0
Conditionalization of ftdi_tcioflush
2021-02-27 13:12:21 -08:00
phdussud
5d8ec9a162
Attempt to satisfy a comment from the owner
2021-02-27 12:45:12 -08:00
phdussud
fdd1037d46
Remove temporary support for a hypotetical version based on Teensy 4
2021-02-27 11:35:45 -08:00
phdussud
94ef653682
Resolved bunch of comments from owner
2021-02-27 10:37:07 -08:00
phdussud
9ee8e84fba
Support for new DirtyJtag2 protocol. Merged with head
2021-02-27 09:59:38 -08:00
Gwenhael Goavec-Merou
43caa612ca
lattice: drop the limitation, for .bin, to write at offset > 0
2021-02-27 06:49:42 +01:00
Gwenhael Goavec-Merou
6d1c51d0a4
fix purge buffer fix libftdi >= 1.5
...
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2021-02-25 13:37:33 +01:00
Gwenhael Goavec-Merou
566d33c2f1
progressBar: use chrono instead of clock
2021-02-24 13:31:55 +01:00
Gwenhael Goavec-Merou
16932786db
all parser:
...
- _raw_data is now filled in configBitstreamParser
- source may be a file or a pipe
- displayHeader become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
2021-02-24 06:36:48 +01:00
Gwenhael Goavec-Merou
e27da3276f
Merge pull request #75 from Disasm/add-gw1ns-2c
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Add support for GW1NS-2C FPGA chips
2021-02-21 18:48:16 +01:00
Gwenhael Goavec-Merou
df52d523bf
All devices: new CLI argument to bypass file type autodetection
2021-02-21 18:30:13 +01:00
Vadim Kaushan
d226ab7671
Add support for GW1NS-2C FPGA chips
2021-02-21 17:31:09 +03:00
Gwenhael Goavec-Merou
7cc5676e8e
ftdi: drop divide_by_5 param, now it's automatically set/unset according to the frequency. Better freq display
2021-02-19 07:07:10 +01:00
Gwenhael Goavec-Merou
5f9a8835da
devices: simplify write RAM/Flash
2021-02-18 21:09:34 +01:00
Gwenhael Goavec-Merou
48e65fa0ad
bitparser: drop garbage characters, use _hdr, best header parsing and display
2021-02-17 19:02:57 +01:00
Gwenhael Goavec-Merou
4a555bb102
dfuFileParser: parser for bitstream with DFU suffix
2021-02-15 07:33:58 +01:00
Gwenhael Goavec-Merou
590553e432
src/fsparser: rewrite to use header instead of comments, add support for compressed bitstream
2021-02-12 07:34:14 +01:00
Gwenhael Goavec-Merou
210bdac09a
configBitstreamParser: external access to header keys/values
2021-02-10 08:02:20 +01:00
Gwenhael Goavec-Merou
e91c251eb0
svf_jtag: suppress CR when file is in DOS format
2021-02-08 06:31:56 +01:00
Gwenhael Goavec-Merou
d4692d5049
rawParser: typo
2021-02-06 11:42:50 +01:00
Gwenhael Goavec-Merou
1545b99748
rawParser: use raw_data buffer
2021-02-06 11:36:34 +01:00