51caac9600
Merge pull request #2 from Martoni/master
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Testing with JTAG-HS3
2019-11-19 16:27:44 +01:00
f8a1ae14e5
list of cables supported
2019-11-19 16:21:04 +01:00
a58907e4bf
static_cast to avoid warning (thanks to sszy)
2019-11-19 16:14:37 +01:00
cccfe68266
adding hs3 in support list readme
2019-11-19 16:04:04 +01:00
d3fa10c76c
adding HS3 digilent JTAG cable
2019-11-19 15:56:16 +01:00
0a604baaae
ftdipp_mpsse: add workaround for libftdi < 1.4
2019-11-19 12:02:12 +01:00
ec8d890d27
README: add -d to specify device node, update usage section
2019-11-19 09:17:04 +01:00
16806cbc4f
Makefile: add libudev since this library is used to retrieve vid, pid, descriptor, bus and addr from a device node
2019-11-19 09:04:06 +01:00
711833d034
main: delete jtag at the end
2019-11-19 09:03:09 +01:00
d739240280
main: add option to provides device path
2019-11-19 09:02:24 +01:00
6569ae40fe
ftdixxx: allows to open converter with device path instead of vid and pid
2019-11-19 09:00:56 +01:00
98c2b64cab
update README
2019-11-18 16:05:33 +01:00
fdb7fb639b
board: support machXO3LF starter kit
2019-11-18 16:05:22 +01:00
f7ccb7eedb
part: support machXO3LF-6900C
2019-11-18 16:05:06 +01:00
d7a40fd5b0
main: add lattice support
2019-11-18 16:04:50 +01:00
63bed1fd54
device: add flash mode as alias to SPI mode
2019-11-18 16:04:29 +01:00
6d7db76a43
add support for lattice FPGA (currently machXO3)
2019-11-18 16:03:59 +01:00
89d874d156
add parser for jed file (lattice)
2019-11-18 16:03:36 +01:00
da93384d6a
Merge pull request #1 from Martoni/master
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tab or space ? please choose ;)
2019-11-08 13:56:00 +01:00
8ee66a3e35
tab or space ? please choose ;)
2019-11-08 11:30:10 +01:00
d99e2b6ca5
update README with a note about interfaceB: this interface is required by cycloader only when a bitstream must be written in the SPI flash
2019-10-11 09:10:38 +02:00
f57f8cce58
update README to detail cycloader usage with arty board
2019-10-05 19:40:43 +02:00
24947627a3
Makefile: install bit file in spiOverJtag
2019-10-05 19:03:59 +02:00
5acae16a82
add design and bitstream to access SPI through JTAG
2019-10-05 19:03:28 +02:00
c8009b5b26
xilinx: add support for spi flash (currently only with MCS file)
2019-10-05 19:02:42 +02:00
0008905f16
add parser for MCS files
2019-10-05 19:00:32 +02:00
b12dad612b
add class to handle spiflash through jtag. Currently tested with numonyx n25q128
2019-10-05 19:00:10 +02:00
4bc6a304d4
add a progress bar to display some long task status
2019-10-05 18:58:52 +02:00
e6be5bd118
svf_jtag.cpp: use double quote for header
2019-10-05 18:15:12 +02:00
7a9bb82d5e
epcq.hpp: use double quote for ftdispi
2019-10-05 18:14:45 +02:00
1f9719724e
epcq: suppress commented include
2019-10-05 18:14:20 +02:00
65494bc977
Makefile: suppress -I for current dir
2019-10-05 18:13:49 +02:00
9391b7840d
xilinx: use shiftIR with val when it's possible
2019-10-05 18:12:33 +02:00
1afeb22478
part: fix correct model for artix 35
2019-10-05 18:10:04 +02:00
204c553a60
ftdijtag: suppress debug message
2019-10-05 18:09:02 +02:00
3d6879e049
updates dependencies list
2019-10-05 12:00:29 +02:00
f89d2b488b
ftdijtag.cpp: suppress useless header
2019-10-05 11:55:19 +02:00
1c6f592e32
svf_jtag: fix include
2019-10-05 11:54:58 +02:00
29a6f63bfe
update bitparser:
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- now it's a subclass to configBitstreamParser
- use ifstream instead of FILE
- use a string to store data
- simplify header parse
2019-10-05 10:28:44 +02:00
d3da23149c
add configBitstreamParser an base class for all bitstream file parser
2019-10-05 10:27:35 +02:00
ea44d71a65
Update README.md
2019-10-04 13:03:46 +02:00
99d5d3de0e
altera: fix path for svf used to program flash through SPI
2019-10-04 08:27:14 +02:00
0b49a72223
xilinx: re-add reset method. Tested on Artix
2019-10-04 08:26:16 +02:00
8b021bdd3a
ftdijtag: add shiftIR variant with value passed by value instead of ref. Used when the command is up to 8bits with no read
2019-10-04 08:25:37 +02:00
53ad8dfda8
main: massive cleanup/rewrite
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- since all about altera is hidden in a class suppress epcq, svf and
reset
- suppress everything about mode since each fpga dependant;
- some other cleanup
2019-09-28 15:46:12 +02:00
9b683825b3
ignore swp
2019-09-28 15:40:46 +02:00
04360e9b26
altera: fix spi bridge path
2019-09-28 15:40:21 +02:00
fd661c5e6f
ftdipp_mpsse: add method to access vid and pid
2019-09-28 15:38:57 +02:00
2f3fd12476
ftdipp_mpsse: add missing vid
2019-09-28 15:38:25 +02:00
f59ea6deba
ftdipp_mpsse: informations message must be displayed only on verbose mode
2019-09-28 15:37:51 +02:00
Gwenhael Goavec-Merou
Fabien Marteau