Universal utility for programming FPGA
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spiOverJtag add design and bitstream to access SPI through JTAG 2019-10-05 19:03:28 +02:00
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README.md README: add -d to specify device node, update usage section 2019-11-19 09:17:04 +01:00
altera.cpp altera: fix path for svf used to program flash through SPI 2019-10-04 08:27:14 +02:00
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board.hpp board: support machXO3LF starter kit 2019-11-18 16:05:22 +01:00
cable.hpp adding HS3 digilent JTAG cable 2019-11-19 15:56:16 +01:00
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configBitstreamParser.hpp add configBitstreamParser an base class for all bitstream file parser 2019-10-05 10:27:35 +02:00
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device.hpp device: add flash mode as alias to SPI mode 2019-11-18 16:04:29 +01:00
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epcq.hpp epcq.hpp: use double quote for ftdispi 2019-10-05 18:14:45 +02:00
ftdijtag.cpp ftdixxx: allows to open converter with device path instead of vid and pid 2019-11-19 09:00:56 +01:00
ftdijtag.hpp ftdixxx: allows to open converter with device path instead of vid and pid 2019-11-19 09:00:56 +01:00
ftdipp_mpsse.cpp ftdipp_mpsse: add workaround for libftdi < 1.4 2019-11-19 12:02:12 +01:00
ftdipp_mpsse.hpp ftdixxx: allows to open converter with device path instead of vid and pid 2019-11-19 09:00:56 +01:00
ftdispi.cpp initial commit 2019-09-26 18:29:20 +02:00
ftdispi.hpp initial commit 2019-09-26 18:29:20 +02:00
jedParser.cpp add parser for jed file (lattice) 2019-11-18 16:03:36 +01:00
jedParser.hpp add parser for jed file (lattice) 2019-11-18 16:03:36 +01:00
lattice.cpp add support for lattice FPGA (currently machXO3) 2019-11-18 16:03:59 +01:00
lattice.hpp add support for lattice FPGA (currently machXO3) 2019-11-18 16:03:59 +01:00
main.cpp main: delete jtag at the end 2019-11-19 09:03:09 +01:00
mcsParser.cpp add parser for MCS files 2019-10-05 19:00:32 +02:00
mcsParser.hpp add parser for MCS files 2019-10-05 19:00:32 +02:00
part.hpp part: support machXO3LF-6900C 2019-11-18 16:05:06 +01:00
progressBar.cpp add a progress bar to display some long task status 2019-10-05 18:58:52 +02:00
progressBar.hpp add a progress bar to display some long task status 2019-10-05 18:58:52 +02:00
spiFlash.cpp add class to handle spiflash through jtag. Currently tested with numonyx n25q128 2019-10-05 19:00:10 +02:00
spiFlash.hpp add class to handle spiflash through jtag. Currently tested with numonyx n25q128 2019-10-05 19:00:10 +02:00
svf_jtag.cpp svf_jtag.cpp: use double quote for header 2019-10-05 18:15:12 +02:00
svf_jtag.hpp svf_jtag: add ifndef ... endif in hpp file to avoid multiple definition 2019-09-28 15:34:44 +02:00
test_sfl.svf add svf used to have access to SPI flash through FT2232 interface B 2019-09-26 18:39:03 +02:00
xilinx.cpp xilinx: add support for spi flash (currently only with MCS file) 2019-10-05 19:02:42 +02:00
xilinx.hpp xilinx: add support for spi flash (currently only with MCS file) 2019-10-05 19:02:42 +02:00

README.md

cycloader

Utility for programming Intel/Altera Cyclone Xilinx Serie 7 and Lattice MachXO3

Current support:

  • Trenz cyc1000 Cyclone 10 LP 10CL025 (memory and spi flash)
  • Digilent arty Artix xc7a35ti (memory and spi flash)
  • Lattice MachXO3LF Starter Kit LCMX03LF-6900C (flash)

compile and install

This application uses libftdi1, so this library must be installed (and, depending of the distribution, headers too)

apt-get install libftdi1-2 libftdi1-dev libftdipp1-3 libftdipp1-dev libudev-dev

and if not already done, install pkg-config, make and g++.

To build the app:

$ make

To install

$ sudo make install

Currently, the install path is hardcoded to /usr/local

Usage

cycloader --help
Usage: cycloader [OPTION...] BIT_FILE
cycloader -- a program to flash cyclone10 LP FPGA

  -b, --board=BOARD          board name, may be used instead of cable
  -c, --cable=CABLE          jtag interface
  -d, --device=DEVICE        device to use (/dev/ttyUSBx)
  -o, --offset=OFFSET        start offset in EEPROM
  -r, --reset                reset FPGA after operations
  -v, --verbose              Produce verbose output
  -?, --help                 Give this help list
      --usage                Give a short usage message
  -V, --version              Print program version

To have complete help

Generic usage

display FPGA

With board name:

cycloader -b theBoard

With cable:

cycloader -c theCable

With device node:

cycloader -d /dev/ttyUSBX

Note: for some cable (like digilent adapters) signals from the converter are not just directly to the FPGA. For this case, the -c must be added.

Note: when -d is not provided, cycloader will opens the first ftdi found, if more than one converter is connected to the computer, the -d option is the better solution

Reset device

cycloader [options] -r

load bitstream device (memory or flash)

cycloader [options] /path/to/bitstream.ext

CYC1000

loading in memory:

sof to svf generation:

quartus_cpf -c -q -g 3.3 -n 12.0MHz p project_name.sof project_name.svf

file load:

cycloader -b cyc1000 project_name.svf

SPI flash:

sof to rpd:

quartus_cpf -o auto_create_rpd=on -c -d EPCQ16A -s 10CL025YU256C8G project_name.svf project_name.jic

file load:

cycloader -b cyc1000 -r project_name_auto.rpd

Note about SPI flash: svf file used to write in flash is just a bridge between FT2232 interfaceB configured in SPI mode and sfl primitive used to access EPCQ SPI flash.

Note about FT2232 interfaceB: This interface is used for SPI communication only when the dedicated svf is loaded in RAM, rest of the time, user is free to use for what he want.

ARTY

To simplify further explanations, we consider the project is generated in the current directory.

loading in memory:

.bit file is the default format generated by vivado, so nothing special task must be done to generates this bitstream.

file load:

cycloader -b arty *.runs/impl_1/*.bit

SPI flash:

.mcs must be generates through vivado with a tcl script like

set project [lindex $argv 0]

set bitfile "${project}.runs/impl_1/${project}.bit"
set mcsfile "${project}.runs/impl_1/${project}.mcs"

write_cfgmem -format mcs -interface spix4 -size 16 \
    -loadbit "up 0x0 $bitfile" -loaddata "" \
    -file $mcsfile -force

Note: -interface spix4 and -size 16 depends on SPI flash capability and size.

The tcl script is used with:

vivado -nolog -nojournal -mode batch -source script.tcl -tclargs myproject

file load:

cycloader -b arty *.runs/impl_1/*.mcs

MachXO3 Starter Kit

Flash memory:

.jed file is the default format generated by Lattice Diamond, so nothing special must be done to generates this file.

file load:

cycloader -b machXO3SK impl1/*.jed