Gwenhael Goavec-Merou
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1e0a06288d
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configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30MHz
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2021-07-14 08:44:22 +02:00 |
|
Gwenhael Goavec-Merou
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cc688d6db6
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main: small fix
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2021-07-14 08:07:51 +02:00 |
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Gwenhael Goavec-Merou
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894cda820f
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board: add default frequency option for BITBANG and SPI boards
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2021-07-14 08:05:36 +02:00 |
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Gwenhael Goavec-Merou
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13af012163
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main: avoid potential miss with probe clock frequency
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2021-07-14 08:04:43 +02:00 |
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Gwenhael Goavec-Merou
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fd329158de
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Merge pull request #98 from ultraembedded/master
Add board specific default frequency
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2021-07-14 07:53:13 +02:00 |
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Gwenhael Goavec-Merou
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acf7d2a0a8
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ftdiJtagMPSSE: add work around to deal with freq >= 15MHz
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2021-07-13 07:00:30 +02:00 |
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Gwenhael Goavec-Merou
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594f065116
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ftdipp_mpsse: use runtime_error instead of simple exception
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2021-07-12 08:05:25 +02:00 |
ultraembedded
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f8831f329c
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Only use board clock speed if user does not specify an alternate freq
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2021-07-11 15:27:46 +01:00 |
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ultraembedded
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797785ce93
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Allow board configuration table to contain a default clock speed (as some boards are known to work at higher speeds safely). Move Digilent Arty to 10MHz (tested).
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2021-07-11 15:20:15 +01:00 |
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Gwenhael Goavec-Merou
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3983726a66
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all devices: use spiFlash dump & verify
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2021-07-11 11:34:14 +02:00 |
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Gwenhael Goavec-Merou
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f5254294eb
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altera: add verify and dump
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2021-07-11 11:32:35 +02:00 |
|
Gwenhael Goavec-Merou
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b77c5a22df
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spiFlash: add verify and dump method
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2021-07-11 11:32:10 +02:00 |
|
Gwenhael Goavec-Merou
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f19d0996a4
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progressBar: limit resolution
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2021-07-11 11:30:02 +02:00 |
|
Gwenhael Goavec-Merou
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6a1f67bc69
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spiOverJtag: add constr_xc6s_csg324
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2021-07-11 09:05:15 +02:00 |
|
Gwenhael Goavec-Merou
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6639f0646a
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board: pipistrello: add spi flash support
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2021-07-11 08:58:40 +02:00 |
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Gwenhael Goavec-Merou
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0d57b58c26
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spiOverJtag: use build.py for all devices, add xc6slx45
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2021-07-11 08:57:46 +02:00 |
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Gwenhael Goavec-Merou
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7d3000f88d
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spiOverJtag: rewrite xilinx spiOverJtag vhd -> v
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2021-07-11 08:57:00 +02:00 |
|
Gwenhael Goavec-Merou
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7137103db1
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update README
|
2021-07-11 08:49:39 +02:00 |
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Gwenhael Goavec-Merou
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c90a4b7734
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altera: spi flash support for cycloneV and qmtech
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2021-07-10 08:20:27 +02:00 |
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Gwenhael Goavec-Merou
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0c4aedcb23
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altera: add spi flash support for de0nano (EP4CE22F17C6)
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2021-07-09 07:40:55 +02:00 |
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Gwenhael Goavec-Merou
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592cbd87b7
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spiOverJtag: add real bridge (virtual jtag) for cyc1000 and build system based on edalize
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2021-07-08 20:59:28 +02:00 |
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Gwenhael Goavec-Merou
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c99f5aa4e6
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main: update to pass device type and prog type to altera class
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2021-07-08 20:54:12 +02:00 |
|
Gwenhael Goavec-Merou
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84bd19b19a
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board: cyc1000: add fpga model
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2021-07-08 20:53:20 +02:00 |
|
Gwenhael Goavec-Merou
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c29fbb15f9
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altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
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2021-07-08 20:52:46 +02:00 |
|
Gwenhael Goavec-Merou
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0d4b6143b5
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epcq,spiFlash: epcq is now a subclass of spiFlash (real different part is power_(up|down) and read_id
|
2021-07-08 20:51:51 +02:00 |
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Gwenhael Goavec-Merou
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9f32493962
|
Merge pull request #97 from wasv/xc6
Adds support for the Xilinx Spartan 6
|
2021-07-08 20:47:06 +02:00 |
Billy Stevens
|
db73fedf40
|
Adds wpn and hldn signals.
|
2021-07-04 21:35:07 -04:00 |
|
Billy Stevens
|
05c07df4cc
|
Condenses TCL script.
|
2021-07-04 21:34:23 -04:00 |
|
Billy Stevens
|
1d6505182c
|
Adds .gitignore for ISE build files.
|
2021-07-04 21:33:48 -04:00 |
|
Billy Stevens
|
f937cb9ab5
|
Adds support for the xc6slx100fgg484.
Tested on a Pano Logic G2.
|
2021-07-03 05:01:56 -04:00 |
|
Gwenhael Goavec-Merou
|
8068c84ec8
|
board: add Fomu support
|
2021-06-29 13:49:33 +02:00 |
|
Gwenhael Goavec-Merou
|
1dbbd34420
|
prepare release v0.4.0
|
2021-06-26 15:24:22 +02:00 |
|
Gwenhael Goavec-Merou
|
8f95303daf
|
move to APACHE-2.0 license
|
2021-06-26 15:24:07 +02:00 |
|
Gwenhael Goavec-Merou
|
b2d2fa0127
|
ftdipp_mpsse: with 1.5 reatach may be automatic
|
2021-06-26 15:04:57 +02:00 |
|
Gwenhael Goavec-Merou
|
c1f18cd1d3
|
jtag: fix unsigned vs signed
|
2021-06-26 08:47:37 +02:00 |
|
Gwenhael Goavec-Merou
|
98a2e836fa
|
ice40: add support for verify and dump
|
2021-06-26 08:43:02 +02:00 |
|
Gwenhael Goavec-Merou
|
fb8f50cb52
|
ice40: indent
|
2021-06-26 08:34:41 +02:00 |
|
Gwenhael Goavec-Merou
|
79a0e84f1f
|
efinix: add support for verify and dump
|
2021-06-26 08:34:12 +02:00 |
|
Gwenhael Goavec-Merou
|
b92a9adca7
|
ftdispi: improve write/read
|
2021-06-26 08:06:26 +02:00 |
|
Gwenhael Goavec-Merou
|
d32b81037a
|
xilinx: add dumpFlash support
|
2021-06-25 11:28:19 +02:00 |
|
Gwenhael Goavec-Merou
|
2af64e9af4
|
all: propagate verify with a message when not supported
|
2021-06-25 08:58:45 +02:00 |
|
Gwenhael Goavec-Merou
|
fe0a315456
|
lattice,device: introduce method to dump flash content
|
2021-06-24 18:20:34 +02:00 |
|
Gwenhael Goavec-Merou
|
c471d25bb5
|
xilinx,lattice,device: add verify write into flash
|
2021-06-24 18:08:02 +02:00 |
|
Gwenhael Goavec-Merou
|
b150bbdd23
|
gowin: checks if fs is targeted for connected device
|
2021-06-24 08:57:18 +02:00 |
|
Gwenhael Goavec-Merou
|
bb9d22d89a
|
Merge pull request #94 from zyp/orbtrace
Add Orbtrace support
|
2021-06-23 09:41:45 +02:00 |
Vegard Storheil Eriksen
|
5e11b3cb67
|
cmsisDAP: Remove product string check.
|
2021-06-22 23:59:57 +02:00 |
|
Vegard Storheil Eriksen
|
7fc0703167
|
cable: Add support for Orbtrace.
|
2021-06-22 23:59:46 +02:00 |
|
Gwenhael Goavec-Merou
|
371a411e8a
|
prepare release v0.3.0
|
2021-06-20 16:40:41 +02:00 |
|
Gwenhael Goavec-Merou
|
40d9bc3ea7
|
dirtyJtag: cpplint/cppcheck
|
2021-06-20 16:39:19 +02:00 |
|
Gwenhael Goavec-Merou
|
0a7fd93a08
|
dirtyJtag: update _clkHZ with current frequency
|
2021-06-20 16:28:46 +02:00 |