Add netv2 and netv2_100 board definitions with auto-detected cable
NeTV2 (Xilinx Artix-7) board definitions with built-in JTAG pin configuration (TCK=GPIO4, TMS=GPIO17, TDI=GPIO27, TDO=GPIO22): - netv2: XC7A35T variant (default, more common) - netv2_100: XC7A100T variant The GPIO cable is auto-detected at runtime using libgpiod. Users just run: sudo openFPGALoader --board netv2 bitstream.bit Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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@ -211,6 +211,10 @@ static std::map <std::string, target_board_t> board_list = {
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JTAG_BOARD("mlk-s200-eg4d20", "", "anlogicCable", SPI_FLASH, 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("mimas_a7", "xc7a50tfgg484", "numato", SPI_FLASH, 0, 0, CABLE_MHZ(30)),
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JTAG_BOARD("neso_a7", "xc7a100tcsg324", "numato-neso", SPI_FLASH, 0, 0, CABLE_MHZ(30)),
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JTAG_BITBANG_BOARD("netv2", "xc7a35tfgg484", "", SPI_FLASH, 0, 0,
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17, 4, 27, 22, CABLE_DEFAULT),
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JTAG_BITBANG_BOARD("netv2_100", "xc7a100tfgg484", "", SPI_FLASH, 0, 0,
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17, 4, 27, 22, CABLE_DEFAULT),
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JTAG_BOARD("minispartan6", "", "ft2232", SPI_FLASH, 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("nexys_a7_50", "xc7a50tcsg324", "digilent", SPI_FLASH, 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("nexys_a7_100", "xc7a100tcsg324", "digilent", SPI_FLASH, 0, 0, CABLE_DEFAULT),
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15
src/main.cpp
15
src/main.cpp
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@ -219,6 +219,21 @@ int main(int argc, char **argv)
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}
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}
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/* Auto-detect GPIO cable for boards with bitbang pins but no
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* default cable (e.g. netv2): use libgpiod on Raspberry Pi.
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*/
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if (args.cable[0] == '-' && board->cable_name.empty() &&
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board->jtag_pins_config.tck_pin != 0) {
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#ifdef ENABLE_LIBGPIOD
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args.cable = "libgpiod";
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#else
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printError("No GPIO cable available: "
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"build with ENABLE_LIBGPIOD");
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return EXIT_FAILURE;
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#endif
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printInfo("Auto-detected cable: " + args.cable);
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}
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/* Xilinx only: to write flash exact fpga model must be provided */
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if (!board->fpga_part.empty() && !args.fpga_part.empty())
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printInfo("Board default fpga part overridden with " + args.fpga_part);
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