Merge pull request #236 from Icenowy/gw2a

Add GW2A support

doc/FPGAs.yml

@@ -54,6 +54,7 @@ Gowin:
      - GW1NS-2C
      - GW1NSR-4C
      - GW1NZ-1
+     - GW2A-18C
     URL: https://www.gowinsemi.com/en/product/detail/2/
     Memory: OK
     Flash: IF

src/gowin.cpp

@@ -141,6 +141,18 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type,
 		_spi_do  = BSCAN_GW1NSR_4C_SPI_DO;
 		_spi_msk = BSCAN_GW1NSR_4C_SPI_MSK;
 	}
+
+	/*
+	 * GW2 series has no internal flash and uses new bitstream checksum
+	 * algorithm that is not yet supported.
+	 */
+	switch (idcode) {
+		case 0x0000081b: /* GW2A(R)-18(C) */
+		case 0x0000281b: /* GW2A(R)-55(C) */
+			_external_flash = true;
+			/* FIXME: implement GW2 checksum calculation */
+			skip_checksum = true;
+	};
 }
 
 Gowin::~Gowin()
@@ -193,6 +205,7 @@ void Gowin::programFlash()
 	usleep(2*150*1000);
 
 	/* check if file checksum == checksum in FPGA */
+	if (!skip_checksum) {
 		status = readUserCode();
 		int checksum = static_cast<FsParser *>(_fs)->checksum();
 		if (checksum != status) {
@@ -201,6 +214,7 @@ void Gowin::programFlash()
 		} else {
 			printSuccess("CRC check: Success");
 		}
+	}
 
 	if (_verbose)
 		displayReadReg(readStatusReg());
@@ -276,6 +290,7 @@ void Gowin::program(unsigned int offset, bool unprotect_flash)
 		return;
 
 	/* check if file checksum == checksum in FPGA */
+	if (!skip_checksum) {
 		status = readUserCode();
 		uint32_t checksum = static_cast<FsParser *>(_fs)->checksum();
 		if (checksum != status) {
@@ -284,6 +299,7 @@ void Gowin::program(unsigned int offset, bool unprotect_flash)
 		} else {
 			printSuccess("SRAM Flash: Success");
 		}
+	}
 	if (_verbose)
 		displayReadReg(readStatusReg());
 }

src/gowin.hpp

@@ -54,6 +54,7 @@ class Gowin: public Device, SPIInterface {
 		uint32_t readUserCode();
 		ConfigBitstreamParser *_fs;
 		bool is_gw1n1;
+		bool skip_checksum;
 		bool _external_flash; /**< select between int or ext flash */
 		uint8_t _spi_sck;     /**< clk signal offset in bscan SPI */
 		uint8_t _spi_cs;      /**< cs signal offset in bscan SPI */

src/part.hpp

@@ -144,6 +144,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
 	{0x0100681b, {"Gowin", "GW1NZ", "GW1NZ-1", 8}},
 	{0x0300181b, {"Gowin", "GW1NS", "GW1NS-2C", 8}},
 	{0x0100981b, {"Gowin", "GW1NSR", "GW1NSR-4C", 8}},
+	{0x0000081b, {"Gowin", "GW2A", "GW2A(R)-18(C)", 8}},
 
 	/* keep highest nibble to prevent confusion with Efinix T4/T8 IDCODE */
 	{0x20000001, {"colognechip", "GateMate Series", "GM1Ax", 6}},