tested with Xilinx spartan6
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@ -18,6 +18,7 @@ __Supported (tested) FPGA:__
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* Lattice [MachXO3LF](http://www.latticesemi.com/en/Products/FPGAandCPLD/MachXO3.aspx) (SRAM and Flash)
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* Lattice [ECP5 (25F, 5G 85F](http://www.latticesemi.com/Products/FPGAandCPLD/ECP5) (SRAM and Flash)
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* Xilinx Artix 7 [xc7a35ti, xc7a100t](https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html) (memory (all) and spi flash (xc7a35ti)
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* Xilinx Spartan 6 [xc6slx45](https://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html) (memory)
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* Xilinx Spartan 7 [xc7s15](https://www.xilinx.com/products/silicon-devices/fpga/spartan-7.html) (memory)
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* Intel Cyclone 10 LP [10CL025](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-10.html)
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@ -13,7 +13,10 @@ typedef struct {
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static std::map <int, fpga_model> fpga_list = {
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{0x0362D093, {"xilinx", "artix a7 35t", "xc7a35"}},
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{0x13631093, {"xilinx", "artix a7 100t", "xc7a100"}},
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{0x44008093, {"xilinx", "spartan6", "xc6slx45"}},
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{0x03620093, {"xilinx", "spartan7", "xc7s15ftgb196-1"}},
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{0x020f30dd, {"altera", "cyclone 10 LP", "10CL025"}},
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{0xE12BB043, {"lattice", "MachXO3LF", "LCMX03LF-1300C"}},
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