Add board and cable defaults for genesys2

2026-08-29 17:39:36 +02:00 · 2022-02-21 08:11:57 +00:00
parent 52696309bb
commit d4e8eef676
3 changed files with 8 additions and 0 deletions
@@ -361,6 +361,13 @@
  Memory: OK
  Flash: OK

+- ID: genesys2
+  Description: Digilent Kintex7 Evaluation Board
+  URL: https://digilent.com/reference/programmable-logic/genesys-2/start
+  FPGA: Kintex xc7k325tffg900
+  Memory: OK
+  Flash: OK
+
 - ID: runber
  Description: SeeedStudio Gowin RUNBER
  URL: https://www.seeedstudio.com/Gowin-RUNBER-Development-Board-p-4779.html