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README: update xilinx section

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Gwenhael Goavec-Merou 2021-02-04 07:29:57 +01:00
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@ -264,29 +264,45 @@ configured in SPI mode and sfl primitive used to access EPCQ SPI flash.**
This interface is used for SPI communication only when the dedicated svf is This interface is used for SPI communication only when the dedicated svf is
loaded in RAM, rest of the time, user is free to use for what he want.** loaded in RAM, rest of the time, user is free to use for what he want.**
### ARTY and Spartan Edge Accelerator Board ### <span style="text-decoration:underline">Xilinx based boards</span>
To simplify further explanations, we consider the project is generated in the To simplify further explanations, we consider the project is generated in the
current directory. current directory.
**Note: Spartan Edge Accelerator Board has only pinheader, so the cable must be **Note:**
provided** 1. Spartan Edge Accelerator Board has only pinheader, so the cable must be provided
2. a *JTAG* <-> *SPI* bridge (used to write bitstream in FLASH) is available for some device, see
[spiOverJtag](https://github.com/trabucayre/openFPGALoader/tree/master/spiOverJtag) to check if your model is supported
#### loading in memory: <span style="color:red">**Warning** *.bin* may be loaded in memory or in flash, but this extension is a classic extension
for CPU firmware and, by default, *openFPGALoader* load file in memory, double check
*-m* / *-f* when you want to use a firmware for a softcore
(or anything, other than a bitstream) to write somewhere in the FLASH device).</span>
*.bit* file is the default format generated by *vivado*, so nothing special *.bit* file is the default format generated by *vivado*, so nothing special
task must be done to generates this bitstream. task must be done to generates this bitstream.
*.bin* is not, by default, produces. To have access to this file you need to configure the tool:
- **GUI**: *Tools* -> *Settings* -> *Bitstreams* -> check *-bin_file*
- **TCL**: append your *TCL* file with `set_property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE true [get_runs impl_1]`
#### loading in memory:
<span style="text-decoration:underline">*.bit* and *.bin* are allowed to be loaded in memory.</span>
__file load:__ __file load:__
```bash ```bash
openFPGALoader -b arty *.runs/impl_1/*.bit openFPGALoader [-m] -b arty *.runs/impl_1/*.bit (or *.bin)
``` ```
or or
```bash ```bash
openFPGALoader -b spartanEdgeAccelBoard -c digilent_hs2 *.runs/impl_1/*.bit openFPGALoader [-m] -b spartanEdgeAccelBoard -c digilent_hs2 *.runs/impl_1/*.bit (or *.bin)
``` ```
#### SPI flash (only for ARTY): #### SPI flash:
<span style="text-decoration:underline">*.bit*, *.bin*, and *.mcs* are supported for FLASH.</span>
.mcs must be generates through vivado with a tcl script like .mcs must be generates through vivado with a tcl script like
```tcl ```tcl
set project [lindex $argv 0] set project [lindex $argv 0]
@ -309,8 +325,10 @@ vivado -nolog -nojournal -mode batch -source script.tcl -tclargs myproject
__file load:__ __file load:__
```bash ```bash
openFPGALoader -b arty *.runs/impl_1/*.mcs openFPGALoader -f -b arty *.runs/impl_1/*.mcs (or .bit / .bin)
``` ```
**Note: *-f* is required to write bitstream (without them *.bit* and *.bin* are loaded in memory)**
### MachXO2/MachXO3 Starter Kit ### MachXO2/MachXO3 Starter Kit
#### Flash memory: #### Flash memory: