From ae8dbd0b5e77ca25476ff371ffce4c127453a95d Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Thu, 4 Feb 2021 07:29:57 +0100 Subject: [PATCH] README: update xilinx section --- README.md | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) diff --git a/README.md b/README.md index 1fb5f6d..9ef8b70 100644 --- a/README.md +++ b/README.md @@ -264,29 +264,45 @@ configured in SPI mode and sfl primitive used to access EPCQ SPI flash.** This interface is used for SPI communication only when the dedicated svf is loaded in RAM, rest of the time, user is free to use for what he want.** -### ARTY and Spartan Edge Accelerator Board +### Xilinx based boards To simplify further explanations, we consider the project is generated in the current directory. -**Note: Spartan Edge Accelerator Board has only pinheader, so the cable must be -provided** +**Note:** +1. Spartan Edge Accelerator Board has only pinheader, so the cable must be provided +2. a *JTAG* <-> *SPI* bridge (used to write bitstream in FLASH) is available for some device, see +[spiOverJtag](https://github.com/trabucayre/openFPGALoader/tree/master/spiOverJtag) to check if your model is supported -#### loading in memory: +**Warning** *.bin* may be loaded in memory or in flash, but this extension is a classic extension +for CPU firmware and, by default, *openFPGALoader* load file in memory, double check +*-m* / *-f* when you want to use a firmware for a softcore +(or anything, other than a bitstream) to write somewhere in the FLASH device). *.bit* file is the default format generated by *vivado*, so nothing special task must be done to generates this bitstream. +*.bin* is not, by default, produces. To have access to this file you need to configure the tool: +- **GUI**: *Tools* -> *Settings* -> *Bitstreams* -> check *-bin_file* +- **TCL**: append your *TCL* file with `set_property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE true [get_runs impl_1]` + +#### loading in memory: + +*.bit* and *.bin* are allowed to be loaded in memory. + __file load:__ ```bash -openFPGALoader -b arty *.runs/impl_1/*.bit +openFPGALoader [-m] -b arty *.runs/impl_1/*.bit (or *.bin) ``` or ```bash -openFPGALoader -b spartanEdgeAccelBoard -c digilent_hs2 *.runs/impl_1/*.bit +openFPGALoader [-m] -b spartanEdgeAccelBoard -c digilent_hs2 *.runs/impl_1/*.bit (or *.bin) ``` -#### SPI flash (only for ARTY): +#### SPI flash: + +*.bit*, *.bin*, and *.mcs* are supported for FLASH. + .mcs must be generates through vivado with a tcl script like ```tcl set project [lindex $argv 0] @@ -309,8 +325,10 @@ vivado -nolog -nojournal -mode batch -source script.tcl -tclargs myproject __file load:__ ```bash -openFPGALoader -b arty *.runs/impl_1/*.mcs +openFPGALoader -f -b arty *.runs/impl_1/*.mcs (or .bit / .bin) ``` +**Note: *-f* is required to write bitstream (without them *.bit* and *.bin* are loaded in memory)** + ### MachXO2/MachXO3 Starter Kit #### Flash memory: