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Add Support for Xilinx Artix-7 a25t (xc7a25t)
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@@ -22,6 +22,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
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{0x0a014c35, {"anlogic", "eagle s20", "EG4S20BG256", 8}},
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{0x00004c37, {"anlogic", "elf2", "EF2M45", 8}},
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{0x037c2093, {"xilinx", "artix a7 25t", "xc7a25", 6}},
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{0x0362D093, {"xilinx", "artix a7 35t", "xc7a35", 6}},
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{0x0362c093, {"xilinx", "artix a7 50t", "xc7a50t", 6}},
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{0x03632093, {"xilinx", "artix a7 75t", "xc7a75t", 6}},
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