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https://github.com/trabucayre/openFPGALoader.git
synced 2026-08-30 01:48:50 +02:00
@@ -27,6 +27,13 @@
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Memory: OK
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Flash: OK
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- ID: alinx_ax516
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Description: ALINX AX516
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URL: https://www.alinx.com/en/detail/281
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FPGA: Spartan6 xc6slx16csg324
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Memory: OK
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Flash: OK
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- ID: arty_a7_35t
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Description: Digilent Arty A7
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URL: https://reference.digilentinc.com/reference/programmable-logic/arty-a7/start
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@@ -114,6 +114,7 @@ static std::map <std::string, target_board_t> board_list = {
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JTAG_BOARD("arty_s7_50", "xc7s50csga324", "digilent", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("arty_z7_10", "xc7z010clg400", "digilent", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("arty_z7_20", "xc7z020clg400", "digilent", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("alinx_ax516", "xc6slx16csg324", "", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("axu2cga", "xczu2cg", "", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("basys3", "xc7a35tcpg236", "digilent", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("cmod_s7", "xc7s25csga225", "digilent", 0, 0, CABLE_DEFAULT),
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