feat: add agilex 3 A3CY100 model to fpga list

2026-05-23 17:14:06 +02:00 · 2026-05-23 17:14:06 +02:00 · 883e78f290
parent b3f418c977
commit 883e78f290
1 changed files with 1 additions and 0 deletions
--- a/src/part.hpp
+++ b/src/part.hpp
@ -307,6 +307,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
 	{0x02e050dd, {"altera", "arria 10", "SX660",  10}},

 	/* Altera Agilex 3 */
+	{0x4361b0dd, {"altera", "agilex 3", "A3CY100", 10}},
 	{0x436db0dd, {"altera", "agilex 3", "A3CZ135", 10}},

 	/* Altera Agilex 5 */