From 883e78f290423b3e3d0bacb17303569cb1044df6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Hannes=20R=C3=BCger?= <hannes@rueger.events>
Date: Sat, 23 May 2026 17:14:06 +0200
Subject: [PATCH] feat: add agilex 3 A3CY100 model to fpga list

---
 src/part.hpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/part.hpp b/src/part.hpp
index 5e6e8dd..1fee941 100644
--- a/src/part.hpp
+++ b/src/part.hpp
@@ -307,6 +307,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
 	{0x02e050dd, {"altera", "arria 10", "SX660",  10}},
 
 	/* Altera Agilex 3 */
+	{0x4361b0dd, {"altera", "agilex 3", "A3CY100", 10}},
 	{0x436db0dd, {"altera", "agilex 3", "A3CZ135", 10}},
 
 	/* Altera Agilex 5 */