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spiFlashdb: add ISSI IS25WP256 and Quad Enable for IS25LP/WP256 

The IS25WP256 (0x9d7019, 1.8V variant of the IS25LP256) was missing
from the database, and neither 256Mb part had its Quad Enable bit
described (status register bit 6 per the IS25LP(WP)256D datasheet),
making --enable-quad fail on these parts. Required to boot Xilinx
bitstreams generated with SPI_BUSWIDTH 4.
This commit is contained in:
Florent Kermarrec 2026-06-12 15:14:51 +02:00
parent bf8106ef5f
commit 828b970759
1 changed files with 19 additions and 2 deletions
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21
src/spiFlashdb.hpp
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@ -447,8 +447,25 @@ static std::map <uint32_t, flash_t> flash_list = {
.tb_register = FUNCR,
.bp_len = 4,
.bp_offset = {(1 << 2), (1 << 3), (1 << 4), (1 << 5)},
.quad_register = NONER,
.quad_mask = 0,
.quad_register = STATR,
.quad_mask = (1 << 6),
.global_lock = false,
}},
{0x9d7019, {
/* https://www.issi.com/WW/pdf/IS25LP(WP)256D.pdf */
.manufacturer = "ISSI",
.model = "IS25WP256",
.nr_sector = 512,
.sector_erase = true,
.subsector_erase = true,
.has_extended = false,
.tb_otp = true,
.tb_offset = (1 << 1),
.tb_register = FUNCR,
.bp_len = 4,
.bp_offset = {(1 << 2), (1 << 3), (1 << 4), (1 << 5)},
.quad_register = STATR,
.quad_mask = (1 << 6),
.global_lock = false,
}},
{0xba6015, {