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deploy: d43508fe2b
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trabucayre
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+16
-1
@@ -12,6 +12,7 @@ Intel/Altera
|
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* C10LP-RefKit
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* DE0
|
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* de0nano
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||||
* DE23-Lite
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||||
|
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Loading a bitstream
|
||||
-------------------
|
||||
@@ -50,7 +51,21 @@ file load:
|
||||
# or
|
||||
openFPGALoader -b boardname project_name.rbf
|
||||
|
||||
with ``boardname`` = ``de0``, ``cyc1000``, ``c10lp-refkit``, ``de0nano``, ``de0nanoSoc`` or ``qmtechCycloneV``.
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with ``boardname`` = ``de0``, ``cyc1000``, ``c10lp-refkit``, ``de0nano``, ``de0nanoSoc``, ``de23lite`` or ``qmtechCycloneV``.
|
||||
|
||||
.. NOTE::
|
||||
Agilex 3 and Agilex 5 devices, including the DE23-Lite, must use an
|
||||
uncompressed ``rbf`` file for SRAM configuration. SVF loading is not
|
||||
supported for these devices.
|
||||
|
||||
Quartus Prime Pro 26.1 does not generate RBF files as part of the compilation
|
||||
flow and does not support Agilex 3 with ``quartus_cpf``. Generate and check
|
||||
the RBF with the Programming File Generator instead:
|
||||
|
||||
.. code-block:: bash
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||||
|
||||
quartus_pfg -c project_name.sof project_name.rbf
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||||
quartus_pfg --check_integrity project_name.rbf
|
||||
|
||||
SPI flash
|
||||
---------
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|
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+113
-106
@@ -439,742 +439,749 @@ openFPGALoader<span class="w"> </span>-b<span class="w"> </span>arty<span class=
|
||||
<td></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>deca</p></td>
|
||||
<tr class="row-odd"><td><p>de23lite</p></td>
|
||||
<td><p><a class="reference external" href="https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1383">Terasic DE23-Lite</a></p></td>
|
||||
<td><p>Altera Agilex 3 A3CZ135BB18AE7S</p></td>
|
||||
<td><p>RBF</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>deca</p></td>
|
||||
<td><p><a class="reference external" href="https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=&No=944&PartNo=1">Arrow/Terasic DECA</a></p></td>
|
||||
<td><p>MAX 10 10M50DAF484C6GES</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>dragonL</p></td>
|
||||
<tr class="row-odd"><td><p>dragonL</p></td>
|
||||
<td><p><a class="reference external" href="https://www.knjn.com/FPGA-Dragon-L.html">KNJN Dragon-L PCI Express & HDMI FPGA board</a></p></td>
|
||||
<td><p>Spartan6 xc6slx25Tcsg324</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ecp5_evn</p></td>
|
||||
<tr class="row-even"><td><p>ecp5_evn</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/ECP5EvaluationBoard">Lattice ECP5 5G Evaluation Board</a></p></td>
|
||||
<td><p>ECP5G LFE5UM5G-85F</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ecp5-evn" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ECP5-EVN ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ecpix5</p></td>
|
||||
<tr class="row-odd"><td><p>ecpix5</p></td>
|
||||
<td><p><a class="reference external" href="https://shop.lambdaconcept.com/home/46-2-ecpix-5.html#/2-ecpix_5_fpga-ecpix_5_85f">LambdaConcept ECPIX-5 (FT2232)</a></p></td>
|
||||
<td><p>ECP5 LFE5UM5G-85F</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ecpix-5-45f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ECPIX-5-45F ➚</span></a> <a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ecpix-5-85f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ECPIX-5-85F ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ecpix5_r03</p></td>
|
||||
<tr class="row-even"><td><p>ecpix5_r03</p></td>
|
||||
<td><p><a class="reference external" href="https://shop.lambdaconcept.com/home/46-2-ecpix-5.html#/2-ecpix_5_fpga-ecpix_5_85f">LambdaConcept ECPIX-5 (FT4232)</a></p></td>
|
||||
<td><p>ECP5 LFE5UM5G-85F</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ecpix-5-45f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ECPIX-5-45F ➚</span></a> <a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ecpix-5-85f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ECPIX-5-85F ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>epm11</p></td>
|
||||
<tr class="row-odd"><td><p>epm11</p></td>
|
||||
<td><p><a class="reference external" href="https://brisbanesilicon.com.au/epm11/">BrisbaneSilicon EPM11</a></p></td>
|
||||
<td><p>littleBee GW1NR-9C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>fireant</p></td>
|
||||
<tr class="row-even"><td><p>fireant</p></td>
|
||||
<td><p><a class="reference external" href="https://www.crowdsupply.com/jungle-elec/fireant">Fireant Trion T8</a></p></td>
|
||||
<td><p>Trion T8F81</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>fomu</p></td>
|
||||
<tr class="row-odd"><td><p>fomu</p></td>
|
||||
<td><p><a class="reference external" href="https://tomu.im/fomu.html">Fomu PVT</a></p></td>
|
||||
<td><p>iCE40UltraPlus UP5K</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-fomu-pvt" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">Fomu-PVT ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>gr740-mini</p></td>
|
||||
<tr class="row-even"><td><p>gr740-mini</p></td>
|
||||
<td><p><a class="reference external" href="https://gaisler.com/index.php/products/boards/gr740-mini">GR740-MINI</a></p></td>
|
||||
<td><p>CertusPro-NX LFCPNX-100</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>hyvision_opt01</p></td>
|
||||
<tr class="row-odd"><td><p>hyvision_opt01</p></td>
|
||||
<td><p><a class="reference external" href="NA">HyVision PCIe OPT01 rev.F</a></p></td>
|
||||
<td><p>Kintex7 xc7k70tfbg676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>honeycomb</p></td>
|
||||
<tr class="row-even"><td><p>honeycomb</p></td>
|
||||
<td><p><a class="reference external" href="https://github.com/Disasm/honeycomb-pcb">honeycomb</a></p></td>
|
||||
<td><p>littleBee GW1NS-2C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>hseda-xc6slx16</p></td>
|
||||
<tr class="row-odd"><td><p>hseda-xc6slx16</p></td>
|
||||
<td><p><a class="reference external" href="http://hseda.com/product/xilinx/XC6SLX16/XC6SLX16.htm">XILINX SPARTAN6 XC6SLX16 Microblaze SDRAM USB2.0 FPGA</a></p></td>
|
||||
<td><p>Spartan6 xc6slx16-ftg256</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://1bitsquared.com/collections/fpga/products/icebreaker">iCEBreaker</a></p></td>
|
||||
<td><p>iCE40UltraPlus UP5K</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-icebreaker" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCEBreaker ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>icebreaker-bitsy</p></td>
|
||||
<tr class="row-odd"><td><p>icebreaker-bitsy</p></td>
|
||||
<td><p><a class="reference external" href="https://1bitsquared.com/collections/fpga/products/icebreaker-bitsy">iCEBreaker-bitsy</a></p></td>
|
||||
<td><p>iCE40UltraPlus UP5K</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-icebreaker-bitsy-v0" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCEBreaker-bitsy-v0 ➚</span></a> <a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-icebreaker-bitsy-v1" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCEBreaker-bitsy-v1 ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/icestick">icestick</a></p></td>
|
||||
<td><p>iCE40 HX1k</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-icestick" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">IceStick ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/Products/DevelopmentBoardsAndKits/iCE40HX8KBreakoutBoard.aspx">iCE40-HX8K</a></p></td>
|
||||
<td><p>iCE40 HX8k</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ice40-hx8k" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCE40-HX8K ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://www.olimex.com/Products/FPGA/iCE40/iCE40HX1K-EVB/open-source-hardware">Olimex iCE40HX1K-EVB</a></p></td>
|
||||
<td><p>iCE40 HX1k</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ice40hx1k-evb" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCE40HX1K-EVB ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware">Olimex iCE40HX8K-EVB</a></p></td>
|
||||
<td><p>iCE40 HX8k</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ice40hx8k-evb" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCE40HX8K-EVB ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/Products/DevelopmentBoardsAndKits/iCE40UltraPlusBreakoutBoard">iCE40 UltraPlus Breakout Board (iCE40UP5K-B-EVN)</a></p></td>
|
||||
<td><p>iCE40-UP5K</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ice40-up" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">iCE40-UP ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ice40_generic</p></td>
|
||||
<tr class="row-odd"><td><p>ice40_generic</p></td>
|
||||
<td><p><a class="reference external" href="https://alhambrabits.com/alhambra">Icezum Alhambra II</a></p></td>
|
||||
<td><p>iCE40 HX4k</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-icezumalhambraii" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">IceZumAlhambraII ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>icepi-zero</p></td>
|
||||
<tr class="row-even"><td><p>icepi-zero</p></td>
|
||||
<td><p><a class="reference external" href="https://github.com/cheyao/icepi-zero">Icepi Zero</a></p></td>
|
||||
<td><p>ECP5 LFE5U</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>kc705</p></td>
|
||||
<tr class="row-odd"><td><p>kc705</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html">Xilinx KC705</a></p></td>
|
||||
<td><p>Kintex7 xc7k325t</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-kc705" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">KC705 ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>kcu105</p></td>
|
||||
<tr class="row-even"><td><p>kcu105</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/kcu105.html">Xilinx KCU105</a></p></td>
|
||||
<td><p>Kintex UltraScale xcku040-ffva1156</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK (primary and secondary)</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>kcu116</p></td>
|
||||
<tr class="row-odd"><td><p>kcu116</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/kcu116.html">Xilinx KCU116</a></p></td>
|
||||
<td><p>Kintex UltraScale+ xcku5p-ffvb676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>LD-KONFEKT</p></td>
|
||||
<tr class="row-even"><td><p>LD-KONFEKT</p></td>
|
||||
<td><p><a class="reference external" href="https://machdyne.com/product/konfekt-computer/">Lone Dynamics Corporation - Machdyne Konfekt computer</a></p></td>
|
||||
<td><p>ECP5 LFE5U-12F-6BG256C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>LD-SCHOKO</p></td>
|
||||
<tr class="row-odd"><td><p>LD-SCHOKO</p></td>
|
||||
<td><p><a class="reference external" href="https://machdyne.com/product/schoko-computer/">Lone Dynamics Corporation - Machdyne Schoko computer</a></p></td>
|
||||
<td><p>ECP5 LFE5U-45F-6CABGA256</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>licheeTang</p></td>
|
||||
<tr class="row-even"><td><p>licheeTang</p></td>
|
||||
<td><p><a class="reference external" href="https://tang.sipeed.com/en/hardware-overview/lichee-tang/">Sipeed Lichee Tang</a></p></td>
|
||||
<td><p>eagle s20 EG4S20BG256</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>lilygo-t-fpga</p></td>
|
||||
<tr class="row-odd"><td><p>lilygo-t-fpga</p></td>
|
||||
<td><p><a class="reference external" href="https://www.lilygo.cc/products/t-fpga">Lilygo T-FPGA</a></p></td>
|
||||
<td><p>Gowin GW1NSR-LV4CQN48PC6/15</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>machXO2EVN</p></td>
|
||||
<tr class="row-even"><td><p>machXO2EVN</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/products/developmentboardsandkits/machxo2breakoutboard">Lattice MachXO2 Breakout Board Evaluation Kit</a></p></td>
|
||||
<td><p>MachXO2 LCMXO2-7000HE</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>machXO3EVN</p></td>
|
||||
<tr class="row-odd"><td><p>machXO3EVN</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/products/developmentboardsandkits/machxo3d_development_board">Lattice MachXO3D Development Board</a></p></td>
|
||||
<td><p>MachXO3D LCMXO3D-9400HC</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>machXO3SK</p></td>
|
||||
<tr class="row-even"><td><p>machXO3SK</p></td>
|
||||
<td><p><a class="reference external" href="https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/MachXO3LFStarterKit">Lattice MachXO3LF Starter Kit</a></p></td>
|
||||
<td><p>MachXO3 LCMX03LF-6900C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>mlk-s200-eg4d20</p></td>
|
||||
<tr class="row-odd"><td><p>mlk-s200-eg4d20</p></td>
|
||||
<td><p><a class="reference external" href="https://www.milianke.com/product-item-108.html">MILIANKE S200 EG4D20 Development Board</a></p></td>
|
||||
<td><p>eagle s20 EG4D20EG176</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>mini_itx</p></td>
|
||||
<tr class="row-even"><td><p>mini_itx</p></td>
|
||||
<td><p><a class="reference external" href="https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/mini-itx/">Avnet Mini-ITX Base Kit</a></p></td>
|
||||
<td><p>AMD Xilinx XC7Z045/XC7Z100-2FFG900</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>mimas_a7</p></td>
|
||||
<tr class="row-odd"><td><p>mimas_a7</p></td>
|
||||
<td><p><a class="reference external" href="https://numato.com/product/mimas-a7-artix-7-fpga-development-board/">Numato Systems Mimas A7</a></p></td>
|
||||
<td><p>Artix xc7a50tfgg484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>nexys_a7_50</p></td>
|
||||
<tr class="row-even"><td><p>nexys_a7_50</p></td>
|
||||
<td><p><a class="reference external" href="https://digilent.com/reference/programmable-logic/nexys-a7/start">Digilent Nexys A7(Nexys 4 DDR)</a></p></td>
|
||||
<td><p>Artix xc7a50tcsg324</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-nexys4ddr" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">Nexys4DDR ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>nexys_a7_100</p></td>
|
||||
<tr class="row-odd"><td><p>nexys_a7_100</p></td>
|
||||
<td><p><a class="reference external" href="https://digilent.com/reference/programmable-logic/nexys-a7/start">Digilent Nexys A7(Nexys 4 DDR)</a></p></td>
|
||||
<td><p>Artix nexys_a7_100</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-nexys4ddr" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">Nexys4DDR ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>nexysVideo</p></td>
|
||||
<tr class="row-even"><td><p>nexysVideo</p></td>
|
||||
<td><p><a class="reference external" href="https://reference.digilentinc.com/reference/programmable-logic/nexys-video/start">Digilent Nexys Video</a></p></td>
|
||||
<td><p>Artix xc7a200tsbg484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>xem8320</p></td>
|
||||
<tr class="row-odd"><td><p>xem8320</p></td>
|
||||
<td><p><a class="reference external" href="https://opalkelly.com/products/xem8320/">Opal Kelly XEM8320</a></p></td>
|
||||
<td><p>Artix UltraScale+ xcau25p-2ffvb676e</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>TBD</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>olimex_gatemateevb</p></td>
|
||||
<tr class="row-even"><td><p>olimex_gatemateevb</p></td>
|
||||
<td><p><a class="reference external" href="https://www.olimex.com/Products/FPGA/GateMate/GateMateA1-EVB/open-source-hardware">Olimex CCGMA1 Cologne Chip GateMate FPGA Evaluation Board</a></p></td>
|
||||
<td><p>Cologne Chip GateMate Series (GM1A1)</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>opensourceSDRLabKintex7</p></td>
|
||||
<tr class="row-odd"><td><p>opensourceSDRLabKintex7</p></td>
|
||||
<td><p><a class="reference external" href="https://opensourcesdrlab.com/products/fpga-xilinx-kintex-7-xc7k325t-pcie-development-board-with-dual-gigabit-ethernet-ports-dual-10-gigabit-sfp-optical-communication">Open Source SDR Lab Kintex-7 325t FPGA PCIE Development Board</a></p></td>
|
||||
<td><p>Kintex7 xc7k325tffg676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>orbtrace_dfu</p></td>
|
||||
<tr class="row-even"><td><p>orbtrace_dfu</p></td>
|
||||
<td><p><a class="reference external" href="https://store.zyp.no/product/orbtrace-mini">ORBTrace mini (dfu mode)</a></p></td>
|
||||
<td><p>ECP5 LFE5U-25F-8BG256C</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>OK (DFU)</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>orangeCrab</p></td>
|
||||
<tr class="row-odd"><td><p>orangeCrab</p></td>
|
||||
<td><p><a class="reference external" href="https://github.com/gregdavill/OrangeCrab">Orange Crab</a></p></td>
|
||||
<td><p>ECP5 LFE5U-25F-8MG285C</p></td>
|
||||
<td><p>OK (JTAG)</p></td>
|
||||
<td><p>OK (DFU)</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-orangecrab-r0-2" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">OrangeCrab-r0.2 ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>papilio_one</p></td>
|
||||
<tr class="row-even"><td><p>papilio_one</p></td>
|
||||
<td><p><a class="reference external" href="https://papilio.cc/index.php?n=Papilio.PapilioOne">Papilio One</a></p></td>
|
||||
<td><p>Spartan3E xc3s500e-vq100</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>pipistrello</p></td>
|
||||
<tr class="row-odd"><td><p>pipistrello</p></td>
|
||||
<td><p><a class="reference external" href="http://pipistrello.saanlima.com/index.php?title=Welcome_to_Pipistrello">Saanlima Pipistrello LX45</a></p></td>
|
||||
<td><p>Spartan6 xc6slx45-csg324</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>pynq_z1</p></td>
|
||||
<tr class="row-even"><td><p>pynq_z1</p></td>
|
||||
<td><p><a class="reference external" href="https://digilent.com/reference/programmable-logic/pynq-z1/start">PYNQ-Z1</a></p></td>
|
||||
<td><p>Zynq7000 xc7z020clg400</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>pynq_z2</p></td>
|
||||
<tr class="row-odd"><td><p>pynq_z2</p></td>
|
||||
<td><p><a class="reference external" href="https://www.tulembedded.com/FPGA/ProductsPYNQ-Z2.html">PYNQ-Z2</a></p></td>
|
||||
<td><p>Zynq7000 xc7z020clg400</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>qmtechArtix7_100T</p></td>
|
||||
<tr class="row-even"><td><p>qmtechArtix7_100T</p></td>
|
||||
<td><p><a class="reference external" href="https://www.aliexpress.com/item/1005003746671141.html">QMTech Artix-7 XC7A100T Core Board (FGG676)</a></p></td>
|
||||
<td><p>Artix-7 xc7a100tfgg676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>qmtechCyclone10</p></td>
|
||||
<tr class="row-odd"><td><p>qmtechCyclone10</p></td>
|
||||
<td><p><a class="reference external" href="http://www.chinaqmtech.com/productinfo/1858435.html">QMTech Cyclone 10 Starter Kit</a></p></td>
|
||||
<td><p>Cyclone 10 LP 10CL016YU484C8G</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>qmtechCycloneIV</p></td>
|
||||
<tr class="row-even"><td><p>qmtechCycloneIV</p></td>
|
||||
<td><p><a class="reference external" href="https://fr.aliexpress.com/item/32949281189.html">QMTech CycloneIV Core Board</a></p></td>
|
||||
<td><p>Cyclone IV EP4CE15F23C8N</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>qmtechCycloneV</p></td>
|
||||
<tr class="row-odd"><td><p>qmtechCycloneV</p></td>
|
||||
<td><p><a class="reference external" href="https://fr.aliexpress.com/i/1000006622149.html">QMTech CycloneV Core Board</a></p></td>
|
||||
<td><p>Cyclone V 5CEFA2F23I7</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>qmtechCycloneV_5ce523</p></td>
|
||||
<tr class="row-even"><td><p>qmtechCycloneV_5ce523</p></td>
|
||||
<td><p><a class="reference external" href="https://fr.aliexpress.com/item/1005001782703399.html">QMTech CycloneV Core Board</a></p></td>
|
||||
<td><p>Cyclone V 5CEFA5F23I7</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>qmtechKintex7</p></td>
|
||||
<tr class="row-odd"><td><p>qmtechKintex7</p></td>
|
||||
<td><p><a class="reference external" href="https://www.aliexpress.com/item/1005003668804223.html">QMTech Kintex7 Core Board</a></p></td>
|
||||
<td><p>Kintex xc7k325tffg676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>genesys2</p></td>
|
||||
<tr class="row-even"><td><p>genesys2</p></td>
|
||||
<td><p><a class="reference external" href="https://digilent.com/reference/programmable-logic/genesys-2/start">Digilent Kintex7 Evaluation Board</a></p></td>
|
||||
<td><p>Kintex xc7k325tffg900</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>redpitaya14</p></td>
|
||||
<tr class="row-odd"><td><p>redpitaya14</p></td>
|
||||
<td><p><a class="reference external" href="https://redpitaya.com/stemlab-125-14/">Redpitaya/STEMlab xc7z7010 with 125MHz 14 bits ADC</a></p></td>
|
||||
<td><p>Zynq7000 xc7z010clg400</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>runber</p></td>
|
||||
<tr class="row-even"><td><p>runber</p></td>
|
||||
<td><p><a class="reference external" href="https://www.seeedstudio.com/Gowin-RUNBER-Development-Board-p-4779.html">SeeedStudio Gowin RUNBER</a></p></td>
|
||||
<td><p>littleBee GW1N-4</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF/EF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>runber</p></td>
|
||||
<tr class="row-odd"><td><p>runber</p></td>
|
||||
<td><p><a class="reference external" href="https://www.kickstarter.com/projects/1812459948/minispartan6-a-powerful-fpga-board-and-easy-to-use">Scarab Hardware MiniSpartan6+</a></p></td>
|
||||
<td><p>Spartan6 xc6slx25-3-ftg256</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>sp701</p></td>
|
||||
<tr class="row-even"><td><p>sp701</p></td>
|
||||
<td><p><a class="reference external" href="https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/sp701.html">Xilinx SP701</a></p></td>
|
||||
<td><p>Spartan 7 xc7s100-2-fgga676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>spartanEdgeAccelBoard</p></td>
|
||||
<tr class="row-odd"><td><p>spartanEdgeAccelBoard</p></td>
|
||||
<td><p><a class="reference external" href="http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board">SeeedStudio Spartan Edge Accelerator Board</a></p></td>
|
||||
<td><p>Spartan7 xc7s15ftgb196</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>SPEC45</p></td>
|
||||
<tr class="row-even"><td><p>SPEC45</p></td>
|
||||
<td><p><a class="reference external" href="https://ohwr.org/project/spec150/wikis/home">CERN Simple PCIe FMC carrier SPEC</a></p></td>
|
||||
<td><p>Spartan6 xc6slx45Tfgg484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>SPEC150</p></td>
|
||||
<tr class="row-odd"><td><p>SPEC150</p></td>
|
||||
<td><p><a class="reference external" href="https://ohwr.org/project/spec150/wikis/home">CERN Simple PCIe FMC carrier SPEC</a></p></td>
|
||||
<td><p>Spartan6 xc6slx150Tfgg484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>stlv7325</p></td>
|
||||
<tr class="row-even"><td><p>stlv7325</p></td>
|
||||
<td><p><a class="reference external" href="https://www.aliexpress.com/item/1005001275162791.html">Sitlinv STLV7325 Board</a></p></td>
|
||||
<td><p>Kintex xc7k325tffg676</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>tangconsole</p></td>
|
||||
<tr class="row-odd"><td><p>tangconsole</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.sipeed.com/hardware/en/tang/tang-console/mega-console.html">Sipeed Tang Console (dock board for Tang Mega 60k or 138k SOM)</a></p></td>
|
||||
<td><p>Gowin Arora V GW5AT-60 / GW5AT-138</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>tangnano</p></td>
|
||||
<tr class="row-even"><td><p>tangnano</p></td>
|
||||
<td><p><a class="reference external" href="https://tangnano.sipeed.com/en/">Sipeed Tang Nano</a></p></td>
|
||||
<td><p>littleBee GW1N-1</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>tangnano1k</p></td>
|
||||
<tr class="row-odd"><td><p>tangnano1k</p></td>
|
||||
<td><p><a class="reference external" href="https://tangnano.sipeed.com/en/">Sipeed Tang Nano 1K</a></p></td>
|
||||
<td><p>littleBee GW1NZ-1</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>tangnano4k</p></td>
|
||||
<tr class="row-even"><td><p>tangnano4k</p></td>
|
||||
<td><p><a class="reference external" href="https://tangnano.sipeed.com/en/">Sipeed Tang Nano 4K</a></p></td>
|
||||
<td><p>littleBee GW1NSR-4C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF/EF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>tangnano9k</p></td>
|
||||
<tr class="row-odd"><td><p>tangnano9k</p></td>
|
||||
<td><p><a class="reference external" href="https://tangnano.sipeed.com/en/">Sipeed Tang Nano 9K</a></p></td>
|
||||
<td><p>littleBee GW1NR-9C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF/EF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>tangnano20k</p></td>
|
||||
<tr class="row-even"><td><p>tangnano20k</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.sipeed.com/nano20k">Sipeed Tang Nano 20k</a></p></td>
|
||||
<td><p>Gowin Arora GW2A(R)-18(C)</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>EF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>tangprimer20k</p></td>
|
||||
<tr class="row-odd"><td><p>tangprimer20k</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.sipeed.com/en/primer20k">Sipeed Tang Primer 20k</a></p></td>
|
||||
<td><p>Gowin Arora GW2A(R)-18(C)</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>EF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>tangprimer25k</p></td>
|
||||
<tr class="row-even"><td><p>tangprimer25k</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.sipeed.com/hardware/zh/tang/tang-primer-25k/primer-25k.html">Sipeed Tang Primer 25k</a></p></td>
|
||||
<td><p>Gowin Arora V GW5A-25A (GW5A-LV25MG121)</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>TBD</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>tangmega138k</p></td>
|
||||
<tr class="row-odd"><td><p>tangmega138k</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.sipeed.com/hardware/zh/tang/tang-mega-138k/mega-138k.html">Sipeed Tang Mega 138k</a></p></td>
|
||||
<td><p>Gowin Arora V GW5AST-138B (GW5AST-LV138FPG676A)</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>TBD</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>te0712_8</p></td>
|
||||
<tr class="row-even"><td><p>te0712_8</p></td>
|
||||
<td><p><a class="reference external" href="https://shop.trenz-electronic.de/en/TE0712-03-81I36-A-FPGA-Module-with-AMD-Artix-7-XC7A200T-1FBG484I-1-GByte-DDR3-4-x-5-cm">Trenz Electronic TE0712 FPGA-Module mit AMD Artix™ 7(TE0712)</a></p></td>
|
||||
<td><p>XC7A200TFBG484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>tec0117</p></td>
|
||||
<tr class="row-odd"><td><p>tec0117</p></td>
|
||||
<td><p><a class="reference external" href="https://shop.trenz-electronic.de/en/TEC0117-01-FPGA-Module-with-GOWIN-LittleBee-and-8-MByte-internal-SDRAM">Trenz Gowin LittleBee (TEC0117)</a></p></td>
|
||||
<td><p>littleBee GW1NR-9</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>brs-100-gw1nr9</p></td>
|
||||
<tr class="row-even"><td><p>brs-100-gw1nr9</p></td>
|
||||
<td><p><a class="reference external" href="https://brisbanesilicon.com.au/brs-100-gw1nr9/">BrisbaneSilicon BRS-100-GW1NR9</a></p></td>
|
||||
<td><p>littleBee GW1NR-9C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>IF/EF</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>trion_t20_bga256_jtag</p></td>
|
||||
<tr class="row-odd"><td><p>trion_t20_bga256_jtag</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-triont20.html">Efinix Trion T20 BGA256 Dev Kit</a></p></td>
|
||||
<td><p>Trion T20BGA256</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>tec0330</p></td>
|
||||
<tr class="row-even"><td><p>tec0330</p></td>
|
||||
<td><p><a class="reference external" href="https://shop.trenz-electronic.de//TEC0330-05-PCIe-FMC-Carrier-with-Xilinx-Virtex-7-FPGA-8-Lane-PCIe-GEN2-SODIMM-SDRAM">PCIe FMC Carrier with Xilinx Virtex-7 FPGA (TEC0330)</a></p></td>
|
||||
<td><p>XC7VX330T-2FFG1157C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>trion_t120_bga576</p></td>
|
||||
<tr class="row-odd"><td><p>trion_t120_bga576</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-triont120bga576.html">Efinix Trion T120 BGA576 Dev Kit (SPI mode)</a></p></td>
|
||||
<td><p>Trion T120BGA576</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>trion_t120_bga576_jtag</p></td>
|
||||
<tr class="row-even"><td><p>trion_t120_bga576_jtag</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-triont120bga576.html">Efinix Trion T120 BGA576 Dev Kit (JTAG mode)</a></p></td>
|
||||
<td><p>Trion T120BGA576</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>trion_ti60_f225</p></td>
|
||||
<tr class="row-odd"><td><p>trion_ti60_f225</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-titaniumti60f225.html">Efinix Titanium F225 Dev Kit (SPI mode)</a></p></td>
|
||||
<td><p>Titanium Ti60F225</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>trion_ti60_f225_jtag</p></td>
|
||||
<tr class="row-even"><td><p>trion_ti60_f225_jtag</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-titaniumti60f225.html">Efinix Titanium F225 Dev Kit (JTAG mode)</a></p></td>
|
||||
<td><p>Titanium Ti60F225</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ulx3s</p></td>
|
||||
<tr class="row-odd"><td><p>ulx3s</p></td>
|
||||
<td><p><a class="reference external" href="https://radiona.org/ulx3s/">Radiona ULX3S</a></p></td>
|
||||
<td><p>ECP5 LFE5U</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ulx3s-12f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ULX3S-12F ➚</span></a> <a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ulx3s-25f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ULX3S-25F ➚</span></a> <a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ulx3s-45f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ULX3S-45F ➚</span></a> <a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-ulx3s-85f" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ULX3S-85F ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>ulx3s_dfu</p></td>
|
||||
<tr class="row-even"><td><p>ulx3s_dfu</p></td>
|
||||
<td><p><a class="reference external" href="https://github.com/emard/had2019-playground">Radiona ULX3S DFU mode</a></p></td>
|
||||
<td><p>ECP5 LFE5U</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ulx4m_dfu</p></td>
|
||||
<tr class="row-odd"><td><p>ulx4m_dfu</p></td>
|
||||
<td><p><a class="reference external" href="https://github.com/intergalaktik/ulx4m-ls">Radiona ULX4M LD/LS DFU mode</a></p></td>
|
||||
<td><p>ECP5 LFE5U</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>vec_v6</p></td>
|
||||
<tr class="row-even"><td><p>vec_v6</p></td>
|
||||
<td><p><a class="reference external" href="https://vmm-srs.docs.cern.ch/">Xilinx VCU118</a></p></td>
|
||||
<td><p>xc6vlx130tff784</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>vc709</p></td>
|
||||
<tr class="row-odd"><td><p>vc709</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/dk-v7-vc709-g.html">AMD Virtex-7 FPGA VC709 Connectivity Kit</a></p></td>
|
||||
<td><p>Virtex7 xc7vx690tffg1761</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>vcu108</p></td>
|
||||
<tr class="row-even"><td><p>vcu108</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/vcu108.html">Xilinx VCU108</a></p></td>
|
||||
<td><p>Virtex UltraScale xcvu095-ffva2104</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>TBD</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>vcu118</p></td>
|
||||
<tr class="row-odd"><td><p>vcu118</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/vcu118.html">Xilinx VCU118</a></p></td>
|
||||
<td><p>Virtex UltraScale+ xcvu9p-flga2104</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>vcu128</p></td>
|
||||
<tr class="row-even"><td><p>vcu128</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/vcu128.html">Xilinx VCU128</a></p></td>
|
||||
<td><p>Virtex UltraScale+ xcvu37p-fsvh2892</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>vcu1525</p></td>
|
||||
<tr class="row-odd"><td><p>vcu1525</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/vcu1525-a.html">AMD Virtex UltraScale+ FPGA VCU1525 Acceleration Development Kit</a></p></td>
|
||||
<td><p>Virtex UltraScale+ xcvu9p-fsgd2104</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NT</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>xtrx</p></td>
|
||||
<tr class="row-even"><td><p>xtrx</p></td>
|
||||
<td><p><a class="reference external" href="https://www.crowdsupply.com/fairwaves/xtrx">FairWaves XTRXPro</a></p></td>
|
||||
<td><p>Artix xc7a50tcpg236</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>xyloni_spi</p></td>
|
||||
<tr class="row-odd"><td><p>xyloni_spi</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-xyloni.html">Efinix Xyloni</a></p></td>
|
||||
<td><p>Trion T8F81</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p>AS</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>usrpx300</p></td>
|
||||
<tr class="row-even"><td><p>usrpx300</p></td>
|
||||
<td><p><a class="reference external" href="https://www.ettus.com/all-products/x300-kit/">Ettus Research USRP X300</a></p></td>
|
||||
<td><p>Kintex xc7k325tffg900</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>usrpx310</p></td>
|
||||
<tr class="row-odd"><td><p>usrpx310</p></td>
|
||||
<td><p><a class="reference external" href="https://www.ettus.com/all-products/x310-kit/">Ettus Research USRP X300</a></p></td>
|
||||
<td><p>Kintex xc7k410tffg900</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>xmf3</p></td>
|
||||
<tr class="row-even"><td><p>xmf3</p></td>
|
||||
<td><p><a class="reference external" href="https://pldkit.com/xilinx/xmf3">PLDkit XMF3</a></p></td>
|
||||
<td><p>Xilinx xc3s200ft256, xcf01s</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>ypcb003381p1</p></td>
|
||||
<tr class="row-odd"><td><p>ypcb003381p1</p></td>
|
||||
<td><p><a class="reference external" href="https://www.tiferking.cn/index.php/2024/12/19/650/">YPCB-00338-1P1 Kintex-7 Accelerator Card</a></p></td>
|
||||
<td><p>Kintex7 xc7k480tffg1156</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK. BPI parallel NOR flash (MT28GU512AAA1EGC)</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>zc702</p></td>
|
||||
<tr class="row-even"><td><p>zc702</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html">Xilinx ZC702</a></p></td>
|
||||
<td><p>zynq7000 xc7z020clg484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>zc706</p></td>
|
||||
<tr class="row-odd"><td><p>zc706</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html">Xilinx ZC706</a></p></td>
|
||||
<td><p>zynq7000 xc7z045ffg900</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-zc706" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ZC706 ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>zcu102</p></td>
|
||||
<tr class="row-even"><td><p>zcu102</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html">Xilinx ZCU102</a></p></td>
|
||||
<td><p>zynqMPSoC XCZU9EG</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>zcu106</p></td>
|
||||
<tr class="row-odd"><td><p>zcu106</p></td>
|
||||
<td><p><a class="reference external" href="https://www.xilinx.com/products/boards-and-kits/zcu106.html">Xilinx ZCU106</a></p></td>
|
||||
<td><p>zynqMPSoC XCZU7EV</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>zedboard</p></td>
|
||||
<tr class="row-even"><td><p>zedboard</p></td>
|
||||
<td><p><a class="reference external" href="https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/zedboard/">Avnet ZedBoard</a></p></td>
|
||||
<td><p>zynq7000 xc7z020clg484</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td><p><a class="reference external" href="https://hdl.github.io/constraints/Data/Boards/index.html#boards-zedboard" title="(in FPGA Board Constraints latest)"><span class="xref std std-ref">ZedBoard ➚</span></a></p></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>zybo_z7_10</p></td>
|
||||
<tr class="row-odd"><td><p>zybo_z7_10</p></td>
|
||||
<td><p><a class="reference external" href="https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/start">Digilent Zybo Z7-10</a></p></td>
|
||||
<td><p>zynq7000 xc7z010clg400</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>zybo_z7_20</p></td>
|
||||
<tr class="row-even"><td><p>zybo_z7_20</p></td>
|
||||
<td><p><a class="reference external" href="https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/start">Digilent Zybo Z7-20</a></p></td>
|
||||
<td><p>zynq7000 xc7z020clg400</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>VMM3</p></td>
|
||||
<tr class="row-odd"><td><p>VMM3</p></td>
|
||||
<td><p><a class="reference external" href="https://vmm-srs.docs.cern.ch/">CERN board with VMM3</a></p></td>
|
||||
<td><p>xc7s50csga324?</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>efinix_jtag_ft2232</p></td>
|
||||
<tr class="row-even"><td><p>efinix_jtag_ft2232</p></td>
|
||||
<td><p><a class="reference external" href="https://www.efinixinc.com/products-devkits-titaniumti180j484.html">Efinix FT2232 development boards with JTAG on port 2 (Ti180J484 EVK, etc)</a></p></td>
|
||||
<td><p>Titanium Ti180J484 (and others)</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>step-max10_v1</p></td>
|
||||
<tr class="row-odd"><td><p>step-max10_v1</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.stepfpga.com/step-max10">STEP MAX10 V1</a></p></td>
|
||||
<td><p>Altera 10M02SCM153C8G</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>NA</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-odd"><td><p>step-mxo2_v2</p></td>
|
||||
<tr class="row-even"><td><p>step-mxo2_v2</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.stepfpga.com/xo2-4000hc">STEP MXO2 V2</a></p></td>
|
||||
<td><p>Lattice LCMXO2-4000HC-4MG132C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td><p>OK</p></td>
|
||||
<td></td>
|
||||
</tr>
|
||||
<tr class="row-even"><td><p>step-mxo2_v1.1</p></td>
|
||||
<tr class="row-odd"><td><p>step-mxo2_v1.1</p></td>
|
||||
<td><p><a class="reference external" href="https://wiki.stepfpga.com/step-mxo2%E7%AC%AC%E4%B8%80%E4%BB%A3">STEP MXO2 V1.1</a></p></td>
|
||||
<td><p>Lattice LCMXO2-1200HC-4MG132C</p></td>
|
||||
<td><p>OK</p></td>
|
||||
|
||||
+4
-4
@@ -51,7 +51,7 @@
|
||||
</pre></div>
|
||||
</div>
|
||||
<p>To use openFPGALoader under GuixSystem without root privileges it is necessary to install the necessary udev rules. This can be done by extending <code class="docutils literal notranslate"><span class="pre">udev-service-type</span></code> in the <code class="docutils literal notranslate"><span class="pre">operating-system</span></code> configuration file with this package</p>
|
||||
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="o">(</span>udev-rules-service<span class="w"> </span><span class="s1">'openfpgaloader openfpgaloader #:groups '</span><span class="o">(</span><span class="se">\"</span>plugdev<span class="se">\"</span><span class="o">)</span>
|
||||
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="o">(</span>udev-rules-service<span class="w"> </span><span class="s1">'openfpgaloader openfpgaloader #:groups '</span><span class="o">(</span><span class="se">\"</span>plugdev<span class="se">\"</span><span class="o">)</span>
|
||||
</pre></div>
|
||||
</div>
|
||||
<p>Additionally, <code class="docutils literal notranslate"><span class="pre">plugdev</span></code> group should be registered in the <code class="docutils literal notranslate"><span class="pre">supplementary-groups</span></code> field of your <code class="docutils literal notranslate"><span class="pre">user-account``declaration.</span>  <span class="pre">Refer</span> <span class="pre">to</span> <span class="pre">``Base</span> <span class="pre">Services</span></code> section in the manual for examples.</p>
|
||||
@@ -113,7 +113,7 @@ If you don’t want this option, use:</p>
|
||||
-DLIBUSB_LIBRARIES<span class="o">=</span><path_to_libusb><span class="w"> </span><span class="se">\</span>
|
||||
-DLIBFTDI_LIBRARIES<span class="o">=</span><path_to_libftdi><span class="w"> </span><span class="se">\</span>
|
||||
-DLIBFTDI_VERSION<span class="o">=</span><version><span class="w"> </span><span class="se">\</span>
|
||||
-DCMAKE_CXX_FLAGS<span class="o">=</span><span class="s2">"-I<libusb_include_dir> -I<libftdi1_include_dir>"</span>
|
||||
-DCMAKE_CXX_FLAGS<span class="o">=</span><span class="s2">"-I<libusb_include_dir> -I<libftdi1_include_dir>"</span>
|
||||
</pre></div>
|
||||
</div>
|
||||
<p>You may also need to add this if you see link errors between <code class="docutils literal notranslate"><span class="pre">libusb</span></code> and <code class="docutils literal notranslate"><span class="pre">pthread</span></code>:</p>
|
||||
@@ -219,12 +219,12 @@ make<span class="w"> </span>-j
|
||||
<span class="w"> </span>p7zip-full
|
||||
|
||||
cmake<span class="w"> </span>-S<span class="w"> </span>.<span class="w"> </span>-B<span class="w"> </span>build-win64-cross<span class="w"> </span><span class="se">\</span>
|
||||
<span class="w"> </span>-DCMAKE_TOOLCHAIN_FILE<span class="o">=</span><span class="s2">"</span><span class="nv">$PWD</span><span class="s2">/cmake/Toolchain-x86_64-w64-mingw32.cmake"</span><span class="w"> </span><span class="se">\</span>
|
||||
<span class="w"> </span>-DCMAKE_TOOLCHAIN_FILE<span class="o">=</span><span class="s2">"</span><span class="nv">$PWD</span><span class="s2">/cmake/Toolchain-x86_64-w64-mingw32.cmake"</span><span class="w"> </span><span class="se">\</span>
|
||||
<span class="w"> </span>-DWINDOWS_CROSSCOMPILE<span class="o">=</span>ON<span class="w"> </span><span class="se">\</span>
|
||||
<span class="w"> </span>-DCROSS_COMPILE_DEPS<span class="o">=</span>ON<span class="w"> </span><span class="se">\</span>
|
||||
<span class="w"> </span>-DCMAKE_BUILD_TYPE<span class="o">=</span>Release
|
||||
|
||||
cmake<span class="w"> </span>--build<span class="w"> </span>build-win64-cross<span class="w"> </span>--parallel<span class="w"> </span><span class="s2">"</span><span class="k">$(</span>nproc<span class="k">)</span><span class="s2">"</span>
|
||||
cmake<span class="w"> </span>--build<span class="w"> </span>build-win64-cross<span class="w"> </span>--parallel<span class="w"> </span><span class="s2">"</span><span class="k">$(</span>nproc<span class="k">)</span><span class="s2">"</span>
|
||||
|
||||
file<span class="w"> </span>build-win64-cross/openFPGALoader.exe
|
||||
</pre></div>
|
||||
|
||||
@@ -109,7 +109,7 @@ JTAG<span class="w"> </span>init<span class="w"> </span>failed<span class="w"> <
|
||||
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># doas config -e -f -o /bsd.nouftdi /bsd</span>
|
||||
OpenBSD<span class="w"> </span><span class="m">7</span>.8<span class="w"> </span><span class="o">(</span>GENERIC<span class="o">)</span><span class="w"> </span><span class="c1">#54: Sun Oct 12 12:45:58 MDT 2025</span>
|
||||
<span class="w"> </span>[email protected]:/usr/src/sys/arch/amd64/compile/GENERIC
|
||||
Enter<span class="w"> </span><span class="s1">'help'</span><span class="w"> </span><span class="k">for</span><span class="w"> </span>information
|
||||
Enter<span class="w"> </span><span class="s1">'help'</span><span class="w"> </span><span class="k">for</span><span class="w"> </span>information
|
||||
ukc><span class="w"> </span>disable<span class="w"> </span>uftdi*
|
||||
<span class="m">356</span><span class="w"> </span>uftdi*<span class="w"> </span>disabled
|
||||
ukc><span class="w"> </span>disable<span class="w"> </span>uftdi0
|
||||
|
||||
+1
-1
File diff suppressed because one or more lines are too long
Vendored
+15
-1
@@ -44,6 +44,7 @@
|
||||
<li><p>C10LP-RefKit</p></li>
|
||||
<li><p>DE0</p></li>
|
||||
<li><p>de0nano</p></li>
|
||||
<li><p>DE23-Lite</p></li>
|
||||
</ul>
|
||||
</div>
|
||||
<section id="loading-a-bitstream">
|
||||
@@ -74,7 +75,20 @@ Keep in mind to disable this option.</p>
|
||||
openFPGALoader<span class="w"> </span>-b<span class="w"> </span>boardname<span class="w"> </span>project_name.rbf
|
||||
</pre></div>
|
||||
</div>
|
||||
<p>with <code class="docutils literal notranslate"><span class="pre">boardname</span></code> = <code class="docutils literal notranslate"><span class="pre">de0</span></code>, <code class="docutils literal notranslate"><span class="pre">cyc1000</span></code>, <code class="docutils literal notranslate"><span class="pre">c10lp-refkit</span></code>, <code class="docutils literal notranslate"><span class="pre">de0nano</span></code>, <code class="docutils literal notranslate"><span class="pre">de0nanoSoc</span></code> or <code class="docutils literal notranslate"><span class="pre">qmtechCycloneV</span></code>.</p>
|
||||
<p>with <code class="docutils literal notranslate"><span class="pre">boardname</span></code> = <code class="docutils literal notranslate"><span class="pre">de0</span></code>, <code class="docutils literal notranslate"><span class="pre">cyc1000</span></code>, <code class="docutils literal notranslate"><span class="pre">c10lp-refkit</span></code>, <code class="docutils literal notranslate"><span class="pre">de0nano</span></code>, <code class="docutils literal notranslate"><span class="pre">de0nanoSoc</span></code>, <code class="docutils literal notranslate"><span class="pre">de23lite</span></code> or <code class="docutils literal notranslate"><span class="pre">qmtechCycloneV</span></code>.</p>
|
||||
<div class="admonition note">
|
||||
<p class="admonition-title">Note</p>
|
||||
<p>Agilex 3 and Agilex 5 devices, including the DE23-Lite, must use an
|
||||
uncompressed <code class="docutils literal notranslate"><span class="pre">rbf</span></code> file for SRAM configuration. SVF loading is not
|
||||
supported for these devices.</p>
|
||||
<p>Quartus Prime Pro 26.1 does not generate RBF files as part of the compilation
|
||||
flow and does not support Agilex 3 with <code class="docutils literal notranslate"><span class="pre">quartus_cpf</span></code>. Generate and check
|
||||
the RBF with the Programming File Generator instead:</p>
|
||||
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>quartus_pfg<span class="w"> </span>-c<span class="w"> </span>project_name.sof<span class="w"> </span>project_name.rbf
|
||||
quartus_pfg<span class="w"> </span>--check_integrity<span class="w"> </span>project_name.rbf
|
||||
</pre></div>
|
||||
</div>
|
||||
</div>
|
||||
</section>
|
||||
<section id="spi-flash">
|
||||
<h3>SPI flash<a class="headerlink" href="#spi-flash" title="Link to this heading">¶</a></h3>
|
||||
|
||||
Vendored
+3
-3
@@ -97,11 +97,11 @@ to GND).</p>
|
||||
</div>
|
||||
<div class="highlight-tcl notranslate"><div class="highlight"><pre><span></span><span class="k">set</span><span class="w"> </span>project<span class="w"> </span><span class="k">[</span><span class="nb">lindex</span><span class="w"> </span><span class="nv">$argv</span><span class="w"> </span><span class="mi">0</span><span class="k">]</span>
|
||||
|
||||
<span class="k">set</span><span class="w"> </span>bitfile<span class="w"> </span><span class="s2">"${project}.runs/impl_1/${project}.bit"</span>
|
||||
<span class="k">set</span><span class="w"> </span>mcsfile<span class="w"> </span><span class="s2">"${project}.runs/impl_1/${project}.mcs"</span>
|
||||
<span class="k">set</span><span class="w"> </span>bitfile<span class="w"> </span><span class="s2">"${project}.runs/impl_1/${project}.bit"</span>
|
||||
<span class="k">set</span><span class="w"> </span>mcsfile<span class="w"> </span><span class="s2">"${project}.runs/impl_1/${project}.mcs"</span>
|
||||
|
||||
<span class="nv">write_cfgmem</span><span class="w"> </span><span class="o">-</span>format<span class="w"> </span>mcs<span class="w"> </span><span class="o">-</span>interface<span class="w"> </span>spix4<span class="w"> </span><span class="o">-</span>size<span class="w"> </span><span class="mi">16</span><span class="w"> </span><span class="err">\</span>
|
||||
<span class="w"> </span><span class="nv">-loadbit</span><span class="w"> </span><span class="s2">"up 0x0 $bitfile"</span><span class="w"> </span><span class="o">-</span>loaddata<span class="w"> </span><span class="s2">""</span><span class="w"> </span><span class="err">\</span>
|
||||
<span class="w"> </span><span class="nv">-loadbit</span><span class="w"> </span><span class="s2">"up 0x0 $bitfile"</span><span class="w"> </span><span class="o">-</span>loaddata<span class="w"> </span><span class="s2">""</span><span class="w"> </span><span class="err">\</span>
|
||||
<span class="w"> </span><span class="nv">-file</span><span class="w"> </span><span class="nv">$mcsfile</span><span class="w"> </span><span class="o">-</span>force
|
||||
</pre></div>
|
||||
</div>
|
||||
|
||||
Reference in New Issue
Block a user