update readme with spartan7 and digilent hs2 cable
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@ -16,10 +16,12 @@ __Supported (tested) FPGA:__
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* Lattice [MachXO3LF](http://www.latticesemi.com/en/Products/FPGAandCPLD/MachXO3.aspx) (SRAM and Flash)
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* Lattice [ECP5 5G](http://www.latticesemi.com/Products/FPGAandCPLD/ECP5) (SRAM)
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* Xilinx Artix 7 [xc7a35ti](https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html) (memory and spi flash)
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* Xilinx Spartan 7 [xc7s15](https://www.xilinx.com/products/silicon-devices/fpga/spartan-7.html) (memory)
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* Intel Cyclone 10 LP [10CL025](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-10.html)
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__Supported cables:__
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* [digilent_hs2](https://store.digilentinc.com/jtag-hs2-programming-cable/): jtag programmer cable from digilent
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* JTAG-HS3: jtag programmer cable from digilent
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* FT2232: generic programmer cable based on Ftdi FT2232
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* Tang Nano USB-JTAG interface: FT2232C clone based on CH552 microcontroler
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