Merge in upstream
This commit is contained in:
blurbdust
commit
0205c3d5c5
264
CMakeLists.txt
264
CMakeLists.txt
|
|
@ -37,6 +37,7 @@ option(ENABLE_JLINK "enable JLink cable (requires libUSB)" ${
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|||
option(ENABLE_DFU "enable DFU support (requires libUSB)" ${ENABLE_CABLE_ALL})
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option(ENABLE_FTDI_BASED_CABLE "enable cables based on FTDI (requires libFTDI" ${ENABLE_CABLE_ALL})
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option(ENABLE_GOWIN_GWU2X "enable Gowin GWU2X interface" ${ENABLE_CABLE_ALL})
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option(ENABLE_SVF_JTAG "enable SVF support" ${ENABLE_CABLE_ALL})
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option(ENABLE_USB_BLASTERI "enable Altera USB Blaster I support" ${ENABLE_CABLE_ALL})
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option(ENABLE_USB_BLASTERII "enable Altera USB Blaster II support" ${ENABLE_CABLE_ALL})
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@ -54,6 +55,23 @@ else()
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set(ENABLE_XILINX_VIRTUAL_CABLE OFF)
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endif()
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||||
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####################################################################################################
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# VENDORS Options
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####################################################################################################
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# set all vendor on by default
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option(ENABLE_VENDORS_ALL "Enable all vendors support" ON)
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option(ENABLE_ALTERA_SUPPORT "enable Altera FPGAs Support" ${ENABLE_VENDORS_ALL})
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option(ENABLE_ANLOGIC_SUPPORT "enable Anlogic FPGAs Support" ${ENABLE_VENDORS_ALL})
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option(ENABLE_COLOGNECHIP_SUPPORT "enable CologneChip FPGAs Support (requires libftdi)" ${ENABLE_VENDORS_ALL})
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option(ENABLE_EFINIX_SUPPORT "enable Efinix FPGAs Support (requires libftdi)" ${ENABLE_VENDORS_ALL})
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option(ENABLE_GOWIN_SUPPORT "enable Gowin FPGAs Support" ${ENABLE_VENDORS_ALL})
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option(ENABLE_ICE40_SUPPORT "enable Ice40 FPGAs Support (requires libftdi)" ${ENABLE_VENDORS_ALL})
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option(ENABLE_LATTICE_SUPPORT "enable Lattice FPGAs Support" ${ENABLE_VENDORS_ALL})
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option(ENABLE_LATTICESSPI_SUPPORT "enable Lattice FPGAs Support (SSPI / requires libftdi)" ${ENABLE_VENDORS_ALL})
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option(ENABLE_XILINX_SUPPORT "enable Xilinx FPGAs Support" ${ENABLE_VENDORS_ALL})
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####################################################################################################
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# Variables
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####################################################################################################
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@ -114,11 +132,23 @@ add_definitions(-DISE_DIR=\"${ISE_PATH}\")
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# Dependencies check/search
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####################################################################################################
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if (USE_LIBFTDI)
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# Try to find the LibFTDI1 with cmake
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find_package(LibFTDI1 QUIET)
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endif()
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if (USE_PKGCONFIG)
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find_package(PkgConfig REQUIRED)
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# Backward compat when the libftdi is not found
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# by using cmake
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if (USE_LIBFTDI)
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pkg_check_modules(LIBFTDI REQUIRED libftdi1)
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if (NOT LIBFTDI_FOUND)
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pkg_check_modules(LIBFTDI REQUIRED libftdi1)
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string(REPLACE "." ";" VERSION_LIST ${LIBFTDI_VERSION})
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list(GET VERSION_LIST 0 LIBFTDI_VERSION_MAJOR)
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list(GET VERSION_LIST 1 LIBFTDI_VERSION_MINOR)
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endif()
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else()
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set(LIBFTDI_LIBRARY_DIRS "")
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set(LIBFTDI_INCLUDE_DIRS "")
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@ -134,7 +164,7 @@ if (USE_PKGCONFIG)
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endif(USE_LIBUSB)
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if(ENABLE_CMSISDAP)
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pkg_check_modules(HIDAPI hidapi-libusb)
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pkg_check_modules(HIDAPI hidapi-libusb)
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# if libusb not found try with hidraw
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if (NOT HIDAPI_FOUND)
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pkg_check_modules(HIDAPI hidapi-hidraw)
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@ -143,6 +173,7 @@ if (USE_PKGCONFIG)
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pkg_check_modules(HIDAPI hidapi)
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endif()
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endif()
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# zlib support (gzip)
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pkg_check_modules(ZLIB zlib)
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if (NOT ZLIB_FOUND)
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@ -205,47 +236,33 @@ set(OPENFPGALOADER_HEADERS
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# ===========================
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# Parsers classes
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# ===========================
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list(APPEND OPENFPGALOADER_SOURCE
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src/anlogicBitParser.cpp
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src/bitparser.cpp
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src/fsparser.cpp
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src/ihexParser.cpp
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src/mcsParser.cpp
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src/pofParser.cpp
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src/rawParser.cpp
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src/xilinxMapParser.cpp
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)
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list(APPEND OPENFPGALOADER_SOURCE src/rawParser.cpp)
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list(APPEND OPENFPGALOADER_HEADERS src/rawParser.hpp)
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list(APPEND OPENFPGALOADER_HEADERS
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src/anlogicBitParser.hpp
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src/bitparser.hpp
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src/fsparser.hpp
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src/ihexParser.hpp
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src/mcsParser.hpp
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src/pofParser.hpp
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src/rawParser.hpp
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src/xilinxMapParser.hpp
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)
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if (${ENABLE_LATTICE_SUPPORT} OR ${ENABLE_XILINX_SUPPORT})
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list(APPEND OPENFPGALOADER_SOURCE
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src/jedParser.cpp
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src/mcsParser.cpp
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)
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list(APPEND OPENFPGALOADER_HEADERS
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src/jedParser.hpp
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src/mcsParser.hpp
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)
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endif()
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# ===========================
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# To be sorted
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# ===========================
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list(APPEND OPENFPGALOADER_SOURCE
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src/anlogic.cpp
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src/bpiFlash.cpp
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src/spiFlash.cpp
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src/spiInterface.cpp
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src/epcq.cpp
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src/svf_jtag.cpp
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src/jtag.cpp
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src/gowin.cpp
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src/altera.cpp
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src/xilinx.cpp
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)
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list(APPEND OPENFPGALOADER_HEADERS
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src/altera.hpp
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src/anlogic.hpp
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src/bpiFlash.hpp
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src/jtag.hpp
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src/jtagInterface.hpp
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@ -253,9 +270,6 @@ list(APPEND OPENFPGALOADER_HEADERS
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src/spiFlashdb.hpp
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src/epcq.hpp
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src/spiInterface.hpp
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src/svf_jtag.hpp
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src/gowin.hpp
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src/xilinx.hpp
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)
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# FTDI Based cables
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@ -279,52 +293,148 @@ if (${USE_LIBFTDI})
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)
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# CologneChip Drivers / Files parsers.
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list(APPEND OPENFPGALOADER_SOURCE
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src/colognechip.cpp
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src/colognechipCfgParser.cpp
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)
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if (ENABLE_COLOGNECHIP_SUPPORT)
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list(APPEND OPENFPGALOADER_SOURCE
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src/colognechip.cpp
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src/colognechipCfgParser.cpp
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)
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list(APPEND OPENFPGALOADER_HEADERS
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src/colognechip.hpp
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src/colognechipCfgParser.hpp
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)
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list(APPEND OPENFPGALOADER_HEADERS
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src/colognechip.hpp
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src/colognechipCfgParser.hpp
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)
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add_definitions(-DENABLE_COLOGNECHIP_SUPPORT=1)
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message("CologneChip support enabled")
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else()
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message("CologneChip support disabled")
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endif(ENABLE_COLOGNECHIP_SUPPORT)
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||||
# Efinix Drivers / Files parsers.
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list(APPEND OPENFPGALOADER_SOURCE
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src/efinix.cpp
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src/efinixHexParser.cpp
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)
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if (ENABLE_EFINIX_SUPPORT)
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list(APPEND OPENFPGALOADER_SOURCE
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src/efinix.cpp
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||||
src/efinixHexParser.cpp
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||||
)
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||||
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list(APPEND OPENFPGALOADER_HEADERS
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||||
src/efinix.hpp
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||||
src/efinixHexParser.hpp
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||||
)
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||||
list(APPEND OPENFPGALOADER_HEADERS
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||||
src/efinix.hpp
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||||
src/efinixHexParser.hpp
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||||
)
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||||
add_definitions(-DENABLE_EFINIX_SUPPORT=1)
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||||
message("Efinix support enabled")
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else()
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message("Efinix support disabled")
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||||
endif(ENABLE_EFINIX_SUPPORT)
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||||
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||||
# Lattice Drivers / Files parsers.
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||||
list(APPEND OPENFPGALOADER_SOURCE
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src/ice40.cpp
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||||
src/latticeSSPI.cpp
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||||
)
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||||
list(APPEND OPENFPGALOADER_HEADERS
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||||
src/ice40.hpp
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||||
src/latticeSSPI.hpp
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||||
)
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# ICE40 Driver.
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||||
if (ENABLE_ICE40_SUPPORT)
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||||
list(APPEND OPENFPGALOADER_SOURCE src/ice40.cpp)
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list(APPEND OPENFPGALOADER_HEADERS src/ice40.hpp)
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add_definitions(-DENABLE_ICE40_SUPPORT=1)
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message("ICE40 support enabled")
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else()
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message("ICE40 support disabled")
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||||
endif(ENABLE_ICE40_SUPPORT)
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||||
|
||||
# Lattice SSPI Driver.
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||||
if (ENABLE_LATTICESSPI_SUPPORT)
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||||
list(APPEND OPENFPGALOADER_SOURCE src/latticeSSPI.cpp)
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||||
list(APPEND OPENFPGALOADER_HEADERS src/latticeSSPI.hpp)
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||||
add_definitions(-DENABLE_LATTICESSPI_SUPPORT=1)
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message("Lattice SSPI support enabled")
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||||
else()
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||||
message("Lattice SSPI support disabled")
|
||||
endif(ENABLE_LATTICESSPI_SUPPORT)
|
||||
endif()
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||||
|
||||
# Lattice Drivers / Files parsers.
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||||
list(APPEND OPENFPGALOADER_SOURCE
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||||
src/lattice.cpp
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||||
src/feaparser.cpp
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||||
src/jedParser.cpp
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||||
src/latticeBitParser.cpp
|
||||
)
|
||||
# Altera Drivers / Files parsers.
|
||||
if (ENABLE_ALTERA_SUPPORT)
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||||
list(APPEND OPENFPGALOADER_SOURCE
|
||||
src/altera.cpp
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||||
src/pofParser.cpp
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||||
)
|
||||
|
||||
list(APPEND OPENFPGALOADER_HEADERS
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||||
src/lattice.hpp
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||||
src/jedParser.hpp
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||||
src/feaparser.hpp
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||||
src/latticeBitParser.hpp
|
||||
)
|
||||
list(APPEND OPENFPGALOADER_HEADERS
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||||
src/altera.hpp
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||||
src/pofParser.hpp
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||||
)
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||||
add_definitions(-DENABLE_ALTERA_SUPPORT=1)
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message("Altera support enabled")
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||||
else()
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||||
message("Altera support disabled")
|
||||
endif(ENABLE_ALTERA_SUPPORT)
|
||||
|
||||
# Anlogic Drivers / Files parsers.
|
||||
if (ENABLE_ANLOGIC_SUPPORT)
|
||||
list(APPEND OPENFPGALOADER_SOURCE
|
||||
src/anlogic.cpp
|
||||
src/anlogicBitParser.cpp
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||||
)
|
||||
|
||||
list(APPEND OPENFPGALOADER_HEADERS
|
||||
src/anlogic.hpp
|
||||
src/anlogicBitParser.hpp
|
||||
)
|
||||
add_definitions(-DENABLE_ANLOGIC_SUPPORT=1)
|
||||
message("Anlogic support enabled")
|
||||
else()
|
||||
message("Anlogic support disabled")
|
||||
endif(ENABLE_ANLOGIC_SUPPORT)
|
||||
|
||||
# Gowin Drivers / Files parsers.
|
||||
if (ENABLE_GOWIN_SUPPORT)
|
||||
list(APPEND OPENFPGALOADER_SOURCE
|
||||
src/gowin.cpp
|
||||
src/fsparser.cpp
|
||||
)
|
||||
|
||||
list(APPEND OPENFPGALOADER_HEADERS
|
||||
src/gowin.hpp
|
||||
src/fsparser.hpp
|
||||
)
|
||||
add_definitions(-DENABLE_GOWIN_SUPPORT=1)
|
||||
message("Gowin support enabled")
|
||||
else()
|
||||
message("Gowin support disabled")
|
||||
endif(ENABLE_GOWIN_SUPPORT)
|
||||
|
||||
# Xilinx Drivers / Files parsers.
|
||||
if (ENABLE_XILINX_SUPPORT)
|
||||
list(APPEND OPENFPGALOADER_SOURCE
|
||||
src/bitparser.cpp
|
||||
src/xilinx.cpp
|
||||
src/xilinxMapParser.cpp
|
||||
)
|
||||
|
||||
list(APPEND OPENFPGALOADER_HEADERS
|
||||
src/bitparser.hpp
|
||||
src/xilinx.hpp
|
||||
src/xilinxMapParser.hpp
|
||||
)
|
||||
add_definitions(-DENABLE_XILINX_SUPPORT=1)
|
||||
message("Xilinx support enabled")
|
||||
else()
|
||||
message("Xilinx support disabled")
|
||||
endif(ENABLE_XILINX_SUPPORT)
|
||||
|
||||
# Lattice Drivers / Files parsers.
|
||||
if (ENABLE_LATTICE_SUPPORT)
|
||||
list(APPEND OPENFPGALOADER_SOURCE
|
||||
src/lattice.cpp
|
||||
src/feaparser.cpp
|
||||
src/latticeBitParser.cpp
|
||||
)
|
||||
|
||||
list(APPEND OPENFPGALOADER_HEADERS
|
||||
src/lattice.hpp
|
||||
src/feaparser.hpp
|
||||
src/latticeBitParser.hpp
|
||||
)
|
||||
add_definitions(-DENABLE_LATTICE_SUPPORT=1)
|
||||
message("Lattice support enabled")
|
||||
else()
|
||||
message("Lattice support disabled")
|
||||
endif(ENABLE_LATTICE_SUPPORT)
|
||||
|
||||
# Cables select
|
||||
|
||||
|
|
@ -395,6 +505,13 @@ list (APPEND OPENFPGALOADER_SOURCE src/remoteBitbang_client.cpp)
|
|||
list (APPEND OPENFPGALOADER_HEADERS src/remoteBitbang_client.hpp)
|
||||
endif()
|
||||
|
||||
# SVF JTAG file type support
|
||||
if (ENABLE_SVF_JTAG)
|
||||
list (APPEND OPENFPGALOADER_SOURCE src/svf_jtag.cpp)
|
||||
list (APPEND OPENFPGALOADER_HEADERS src/svf_jtag.hpp)
|
||||
add_definitions(-DENABLE_SVF_JTAG)
|
||||
endif()
|
||||
|
||||
# Xilinx Virtual Cable
|
||||
if (ENABLE_XILINX_VIRTUAL_CABLE)
|
||||
list (APPEND OPENFPGALOADER_SOURCE src/xvc_client.cpp src/xvc_server.cpp)
|
||||
|
|
@ -437,8 +554,8 @@ list(APPEND OPENFPGALOADER_HEADERS src/libusb_ll.hpp)
|
|||
endif()
|
||||
|
||||
if (USE_FX2_LL)
|
||||
list(APPEND OPENFPGALOADER_SOURCE src/fx2_ll.cpp)
|
||||
list(APPEND OPENFPGALOADER_HEADERS src/fx2_ll.hpp)
|
||||
list(APPEND OPENFPGALOADER_SOURCE src/fx2_ll.cpp src/ihexParser.cpp)
|
||||
list(APPEND OPENFPGALOADER_HEADERS src/fx2_ll.hpp src/ihexParser.hpp)
|
||||
endif()
|
||||
|
||||
add_executable(openFPGALoader
|
||||
|
|
@ -606,9 +723,6 @@ endif()
|
|||
if (USE_LIBFTDI)
|
||||
# libftdi < 1.4 as no usb_addr
|
||||
# libftdi >= 1.5 as purge_buffer obsolete
|
||||
string(REPLACE "." ";" VERSION_LIST ${LIBFTDI_VERSION})
|
||||
list(GET VERSION_LIST 0 LIBFTDI_VERSION_MAJOR)
|
||||
list(GET VERSION_LIST 1 LIBFTDI_VERSION_MINOR)
|
||||
math(EXPR FTDI_VAL "${LIBFTDI_VERSION_MAJOR} * 100 + ${LIBFTDI_VERSION_MINOR}")
|
||||
add_definitions(-DFTDI_VERSION=${FTDI_VAL})
|
||||
endif()
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ XILINX_PARTS := xc3s500evq100 \
|
|||
xcau15p-ffvb676
|
||||
XILINX_BIT_FILES := $(addsuffix .bit.gz,$(addprefix spiOverJtag_, $(XILINX_PARTS)))
|
||||
|
||||
ALTERA_PARTS := 10cl025256 10cl016484 10cl055484 \
|
||||
ALTERA_PARTS := 10cl025256 10cl016484 10cl055484 10cl006144 \
|
||||
ep4ce622 ep4ce1017 ep4ce2217 ep4ce1523 ep4ce11523 ep4cgx15027 5ce215 5ce223 5ce423 5ce523 5ce927 5sgsd5
|
||||
ALTERA_BIT_FILES := $(addsuffix .rbf.gz, $(addprefix spiOverJtag_, $(ALTERA_PARTS)))
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,11 @@
|
|||
module altclkctrl_inst (
|
||||
input wire inclk,
|
||||
input wire ena,
|
||||
output wire outclk
|
||||
);
|
||||
altclkctrl u (
|
||||
.inclk(inclk),
|
||||
.ena(ena),
|
||||
.outclk(outclk)
|
||||
);
|
||||
endmodule
|
||||
|
|
@ -222,6 +222,7 @@ else:
|
|||
"10cl016484" : "10CL016YU484C8G",
|
||||
"10cl025256" : "10CL025YU256C8G",
|
||||
"10cl055484" : "10CL055YU484C8G",
|
||||
"10cl006144" : "10CL006YE144C8G",
|
||||
"ep4cgx15027": "EP4CGX150DF27I7",
|
||||
"ep4ce11523" : "EP4CE115F23C7",
|
||||
"ep4ce2217" : "EP4CE22F17C6",
|
||||
|
|
@ -238,6 +239,8 @@ else:
|
|||
"5sgsd5" : "5SGSMD5K2F40I3"}[part]
|
||||
files.append({'name': currDir + 'altera_spiOverJtag.v',
|
||||
'file_type': 'verilogSource'})
|
||||
files.append({'name': currDir + 'altclkctrl_inst.v',
|
||||
'file_type': 'verilogSource'})
|
||||
files.append({'name': currDir + 'altera_spiOverJtag.sdc',
|
||||
'file_type': 'SDC'})
|
||||
tool_options = {'device': full_part, 'family':family}
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -249,14 +249,17 @@ int CH347Jtag::_setClkFreq(uint32_t clkHZ)
|
|||
uint32_t *ptr = _is_largerPack ? speed_clock_larger_pack : speed_clock_standard_pack;
|
||||
int size = (_is_largerPack?sizeof(speed_clock_larger_pack):sizeof(speed_clock_standard_pack)) / sizeof(uint32_t);
|
||||
for (int i = 0; i < size; ++i) {
|
||||
if (clkHZ > ptr[i] && clkHZ <= ptr[i+1]){
|
||||
setClk_index = i + 1;
|
||||
}
|
||||
if (clkHZ >= ptr[i] ){
|
||||
setClk_index = i;
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (setClk(setClk_index)) {
|
||||
printError("failed to set clock rate");
|
||||
return 0;
|
||||
}
|
||||
_clkHZ = ptr[setClk_index];
|
||||
char mess[256];
|
||||
snprintf(mess, 256, "JTAG TCK frequency set to %.3f MHz\n\n", (double)ptr[setClk_index] / MHZ(1));
|
||||
printInfo(mess);
|
||||
|
|
@ -333,7 +336,7 @@ int CH347Jtag::toggleClk(uint8_t tms, uint8_t tdi, uint32_t len)
|
|||
ptr = obuf;
|
||||
}
|
||||
}
|
||||
return EXIT_SUCCESS;
|
||||
return len;
|
||||
}
|
||||
|
||||
int CH347Jtag::writeTDI(const uint8_t *tx, uint8_t *rx, uint32_t len, bool end)
|
||||
|
|
@ -381,7 +384,7 @@ int CH347Jtag::writeTDI(const uint8_t *tx, uint8_t *rx, uint32_t len, bool end)
|
|||
}
|
||||
unsigned actual_length;
|
||||
if (bits == 0)
|
||||
return EXIT_SUCCESS;
|
||||
return len;
|
||||
cmd = (rx) ? CMD_BITS_WR : CMD_BITS_WO;
|
||||
if (get_obuf_length() < (int)(4 + bits * 2)) {
|
||||
flush();
|
||||
|
|
@ -427,5 +430,5 @@ int CH347Jtag::writeTDI(const uint8_t *tx, uint8_t *rx, uint32_t len, bool end)
|
|||
*rptr &= ~(0x01 << i);
|
||||
}
|
||||
}
|
||||
return EXIT_SUCCESS;
|
||||
return len;
|
||||
}
|
||||
|
|
|
|||
94
src/main.cpp
94
src/main.cpp
|
|
@ -13,11 +13,17 @@
|
|||
#include <sstream>
|
||||
#include <vector>
|
||||
|
||||
#ifdef ENABLE_ALTERA_SUPPORT
|
||||
#include "altera.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_ANLOGIC_SUPPORT
|
||||
#include "anlogic.hpp"
|
||||
#endif
|
||||
#include "board.hpp"
|
||||
#include "cable.hpp"
|
||||
#ifdef ENABLE_COLOGNECHIP_SUPPORT
|
||||
#include "colognechip.hpp"
|
||||
#endif
|
||||
#include "common.hpp"
|
||||
#include "cxxopts.hpp"
|
||||
#include "device.hpp"
|
||||
|
|
@ -25,12 +31,24 @@
|
|||
#include "dfu.hpp"
|
||||
#endif
|
||||
#include "display.hpp"
|
||||
#ifdef ENABLE_EFINIX_SUPPORT
|
||||
#include "efinix.hpp"
|
||||
#endif
|
||||
#ifdef USE_LIBFTDI
|
||||
#include "ftdispi.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_GOWIN_SUPPORT
|
||||
#include "gowin.hpp"
|
||||
#include "ice40.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_LATTICE_SUPPORT
|
||||
#include "lattice.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_ICE40_SUPPORT
|
||||
#include "ice40.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_LATTICESSPI_SUPPORT
|
||||
#include "latticeSSPI.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_USB_SCAN
|
||||
#include "libusb_ll.hpp"
|
||||
#endif
|
||||
|
|
@ -38,8 +56,12 @@
|
|||
#include "part.hpp"
|
||||
#include "spiFlash.hpp"
|
||||
#include "rawParser.hpp"
|
||||
#ifdef ENABLE_XILINX_SUPPORT
|
||||
#include "xilinx.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_SVF_JTAG
|
||||
#include "svf_jtag.hpp"
|
||||
#endif
|
||||
#ifdef ENABLE_XVC
|
||||
#include "xvc_server.hpp"
|
||||
#endif
|
||||
|
|
@ -298,25 +320,45 @@ int main(int argc, char **argv)
|
|||
if (board && board->manufacturer != "none") {
|
||||
Device *target;
|
||||
if (board->manufacturer == "efinix") {
|
||||
#ifdef ENABLE_EFINIX_SUPPORT
|
||||
target = new Efinix(spi, args.bit_file, args.file_type,
|
||||
board->reset_pin, board->done_pin, board->oe_pin,
|
||||
args.verify, args.verbose);
|
||||
#else
|
||||
printError("Support for Efinix FPGAs was not enabled at compile time");
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (board->manufacturer == "lattice") {
|
||||
if (board->fpga_part == "ice40") {
|
||||
#ifdef ENABLE_ICE40_SUPPORT
|
||||
target = new Ice40(spi, args.bit_file, args.file_type,
|
||||
args.prg_type,
|
||||
board->reset_pin, board->done_pin, args.verify, args.verbose);
|
||||
#else
|
||||
printError("Support for ICE40 FPGAs was not enabled at compile time");
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (board->fpga_part == "ecp5") {
|
||||
#ifdef ENABLE_LATTICESSPI_SUPPORT
|
||||
target = new LatticeSSPI(spi, args.bit_file, args.file_type, args.verbose);
|
||||
#else
|
||||
printError("Support for Lattice FPGAs (SSPI mode) was not enabled at compile time");
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else {
|
||||
printError("Error (SPI mode): " + board->fpga_part +
|
||||
" is an unsupported/unknown Lattice Model");
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
} else if (board->manufacturer == "colognechip") {
|
||||
#ifdef ENABLE_COLOGNECHIP_SUPPORT
|
||||
target = new CologneChip(spi, args.bit_file, args.file_type, args.prg_type,
|
||||
board->reset_pin, board->done_pin, DBUS6, board->oe_pin,
|
||||
args.verify, args.verbose);
|
||||
#else
|
||||
printError("Support for Gowin FPGAs was not enabled at compile time");
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else {
|
||||
printError("Error (SPI mode): " + board->manufacturer +
|
||||
" is an unsupported/unknown target");
|
||||
|
|
@ -468,7 +510,7 @@ int main(int argc, char **argv)
|
|||
|
||||
return EXIT_SUCCESS;
|
||||
#else
|
||||
throw std::runtime_error("DFU support: disabled at build time");
|
||||
printError("DFU support: disabled at build time");
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
}
|
||||
|
|
@ -582,6 +624,7 @@ int main(int argc, char **argv)
|
|||
/* detect svf file and program the device */
|
||||
if (!args.file_type.compare("svf") ||
|
||||
args.bit_file.find(".svf") != string::npos) {
|
||||
#ifdef ENABLE_SVF_JTAG
|
||||
SVF_jtag *svf = new SVF_jtag(jtag, args.verbose);
|
||||
try {
|
||||
svf->parse(args.bit_file);
|
||||
|
|
@ -589,6 +632,11 @@ int main(int argc, char **argv)
|
|||
return EXIT_FAILURE;
|
||||
}
|
||||
return EXIT_SUCCESS;
|
||||
#else
|
||||
printError("Support for SVF Jtag was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* check if selected device is supported
|
||||
|
|
@ -606,33 +654,71 @@ int main(int argc, char **argv)
|
|||
Device *fpga;
|
||||
try {
|
||||
if (fab == "xilinx") {
|
||||
#ifdef ENABLE_XILINX_SUPPORT
|
||||
fpga = new Xilinx(jtag, args.bit_file, args.secondary_bit_file,
|
||||
args.file_type, args.prg_type, args.fpga_part, args.bridge_path,
|
||||
args.target_flash, args.verify, args.verbose, args.skip_load_bridge, args.skip_reset,
|
||||
args.read_dna, args.read_xadc);
|
||||
#else
|
||||
printError("Support for Xilinx FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (fab == "altera") {
|
||||
#ifdef ENABLE_ALTERA_SUPPORT
|
||||
fpga = new Altera(jtag, args.bit_file, args.file_type,
|
||||
args.prg_type, args.fpga_part, args.bridge_path, args.verify,
|
||||
args.verbose, args.flash_sector, args.skip_load_bridge, args.skip_reset);
|
||||
#else
|
||||
printError("Support for Altera FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (fab == "anlogic") {
|
||||
#ifdef ENABLE_ANLOGIC_SUPPORT
|
||||
fpga = new Anlogic(jtag, args.bit_file, args.file_type,
|
||||
args.prg_type, args.verify, args.verbose);
|
||||
#ifdef USE_LIBFTDI
|
||||
#else
|
||||
printError("Support for Anlogic FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (fab == "efinix") {
|
||||
#ifdef ENABLE_EFINIX_SUPPORT
|
||||
fpga = new Efinix(jtag, args.bit_file, args.file_type,
|
||||
args.prg_type, args.board, args.fpga_part, args.bridge_path,
|
||||
args.verify, args.verbose);
|
||||
#else
|
||||
printError("Support for Efinix FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (fab == "Gowin") {
|
||||
#ifdef ENABLE_GOWIN_SUPPORT
|
||||
fpga = new Gowin(jtag, args.bit_file, args.file_type, args.mcufw,
|
||||
args.prg_type, args.external_flash, args.verify, args.verbose, args.user_flash);
|
||||
#else
|
||||
printError("Support for Gowin FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (fab == "lattice") {
|
||||
#ifdef ENABLE_LATTICE_SUPPORT
|
||||
fpga = new Lattice(jtag, args.bit_file, args.file_type,
|
||||
args.prg_type, args.flash_sector, args.verify, args.verbose, args.skip_load_bridge, args.skip_reset);
|
||||
#ifdef USE_LIBFTDI
|
||||
#else
|
||||
printError("Support for Lattice FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else if (fab == "colognechip") {
|
||||
#ifdef ENABLE_COLOGNECHIP_SUPPORT
|
||||
fpga = new CologneChip(jtag, args.bit_file, args.file_type,
|
||||
args.prg_type, args.board, args.cable, args.verify, args.verbose);
|
||||
#else
|
||||
printError("Support for Gowin FPGAs was not enabled at compile time");
|
||||
delete(jtag);
|
||||
return EXIT_FAILURE;
|
||||
#endif
|
||||
} else {
|
||||
printError("Error: manufacturer " + fab + " not supported");
|
||||
|
|
|
|||
73
src/part.hpp
73
src/part.hpp
|
|
@ -72,11 +72,13 @@ static std::map <uint32_t, fpga_model> fpga_list = {
|
|||
{0x037c4093, {"xilinx", "spartan7", "xc7s25", 6}},
|
||||
{0x0362f093, {"xilinx", "spartan7", "xc7s50", 6}},
|
||||
{0x037c8093, {"xilinx", "spartan7", "xc7s75", 6}},
|
||||
{0x037c7093, {"xilinx", "spartan7", "xc7s100", 6}},
|
||||
|
||||
/* Xilinx Virtex6 */
|
||||
{0x8424a093, {"xilinx", "virtex6", "xc6vlx130t", 10}},
|
||||
|
||||
/* Xilinx 7-Series / Artix7 */
|
||||
{0x037c3093, {"xilinx", "artix a7 12t", "xc7a12t", 6}},
|
||||
{0x0362e093, {"xilinx", "artix a7 15t", "xc7a15", 6}},
|
||||
{0x037c2093, {"xilinx", "artix a7 25t", "xc7a25", 6}},
|
||||
{0x0362D093, {"xilinx", "artix a7 35t", "xc7a35", 6}},
|
||||
|
|
@ -89,15 +91,29 @@ static std::map <uint32_t, fpga_model> fpga_list = {
|
|||
{0x03647093, {"xilinx", "kintex7", "xc7k70t", 6}},
|
||||
{0x0364c093, {"xilinx", "kintex7", "xc7k160t", 6}},
|
||||
{0x03651093, {"xilinx", "kintex7", "xc7k325t", 6}},
|
||||
{0x03747093, {"xilinx", "kintex7", "xc7k355t", 6}},
|
||||
{0x03656093, {"xilinx", "kintex7", "xc7k410t", 6}},
|
||||
{0x23752093, {"xilinx", "kintex7", "xc7k420t", 6}},
|
||||
{0x23751093, {"xilinx", "kintex7", "xc7k480t", 6}},
|
||||
|
||||
/* Xilinx 7-Series / Virtex7 */
|
||||
{0x03667093, {"xilinx", "virtex7", "xc7vx330t", 6}},
|
||||
{0x33691093, {"xilinx", "virtex7", "xc7vx690t", 6}},
|
||||
{0x03671093, {"xilinx", "virtex7", "xc7v585t", 6}},
|
||||
{0x03667093, {"xilinx", "virtex7", "xc7vx330t", 6}},
|
||||
{0x03682093, {"xilinx", "virtex7", "xc7vx415t", 6}},
|
||||
{0x03687093, {"xilinx", "virtex7", "xc7vx485t", 6}},
|
||||
{0x03692093, {"xilinx", "virtex7", "xc7vx550t", 6}},
|
||||
{0x33691093, {"xilinx", "virtex7", "xc7vx690t", 6}},
|
||||
{0x03696093, {"xilinx", "virtex7", "xc7vx980t", 6}},
|
||||
|
||||
{0x036d9093, {"xilinx", "virtex7", "xc7vh580t", 22}},
|
||||
|
||||
{0x036b3093, {"xilinx", "virtex7", "xc7v2000t", 24}},
|
||||
{0x036d5093, {"xilinx", "virtex7", "xc7vx1140t", 24}},
|
||||
|
||||
{0x036db093, {"xilinx", "virtex7", "xc7vh870t", 38}},
|
||||
|
||||
/* Xilinx 7-Series / Zynq */
|
||||
{0x13723093, {"xilinx", "zynq", "xc7z007s", 6}},
|
||||
{0x03722093, {"xilinx", "zynq", "xc7z010", 6}},
|
||||
{0x03727093, {"xilinx", "zynq", "xc7z020", 6}},
|
||||
{0x1372c093, {"xilinx", "zynq", "xc7z030", 6}},
|
||||
|
|
@ -114,19 +130,58 @@ static std::map <uint32_t, fpga_model> fpga_list = {
|
|||
{0x03842093, {"xilinx", "virtexus", "xcvu095", 6}},
|
||||
|
||||
/* Xilinx Ultrascale+ / Artix */
|
||||
{0x04AC2093, {"xilinx", "artixusp", "xcau15p", 6}},
|
||||
{0x04A64093, {"xilinx", "artixusp", "xcau25p", 6}},
|
||||
{0x04AC4033, {"xilinx", "artixusp", "xcau10p", 6}},
|
||||
{0x04AC4093, {"xilinx", "artixusp", "xcau10p", 6}},
|
||||
{0x04AC2093, {"xilinx", "artixusp", "xcau15p", 6}},
|
||||
{0x04A65093, {"xilinx", "artixusp", "xcau20p", 6}},
|
||||
{0x04A64093, {"xilinx", "artixusp", "xcau25p", 6}},
|
||||
|
||||
/* Xilinx Ultrascale+ / Kintex */
|
||||
{0x04a63093, {"xilinx", "kintexusp", "xcku3p", 6}},
|
||||
{0x04a62093, {"xilinx", "kintexusp", "xcku5p", 6}},
|
||||
{0x04A63093, {"xilinx", "kintexusp", "xcku3p", 6}},
|
||||
{0x04A62093, {"xilinx", "kintexusp", "xcku5p", 6}},
|
||||
{0x0484A093, {"xilinx", "kintexusp", "xcku9p", 6}},
|
||||
{0x04A4E093, {"xilinx", "kintexusp", "xcku11p", 6}},
|
||||
{0x04A51093, {"xilinx", "kintexusp", "xcku11p", 6}},
|
||||
{0x04A52093, {"xilinx", "kintexusp", "xcku13p", 6}},
|
||||
{0x04A56093, {"xilinx", "kintexusp", "xcku15p", 6}},
|
||||
{0x04A59093, {"xilinx", "kintexusp", "xcku15p", 6}},
|
||||
{0x04ACF093, {"xilinx", "kintexusp", "xcku19p", 6}},
|
||||
{0x04AD3093, {"xilinx", "kintexusp", "xcku19p", 6}},
|
||||
|
||||
/* Xilinx Ultrascale+ / Virtex */
|
||||
{0x04b31093, {"xilinx", "virtexusp", "xcvu9p", 18}},
|
||||
{0x14b79093, {"xilinx", "virtexusp", "xcvu37p", 18}},
|
||||
{0x04AEA093, {"xilinx", "virtexusp", "xcvu2p", 6}},
|
||||
{0x04B39093, {"xilinx", "virtexusp", "xcvu3p", 6}},
|
||||
{0x04B3D093, {"xilinx", "virtexusp", "xcvu3p", 6}},
|
||||
|
||||
{0x04B2B093, {"xilinx", "virtexusp", "xcvu5p", 12}},
|
||||
{0x04B2F093, {"xilinx", "virtexusp", "xcvu5p", 12}},
|
||||
{0x04B29093, {"xilinx", "virtexusp", "xcvu7p", 12}},
|
||||
{0x04B2D093, {"xilinx", "virtexusp", "xcvu7p", 12}},
|
||||
|
||||
{0x04B31093, {"xilinx", "virtexusp", "xcvu9p", 18}},
|
||||
{0x04B35093, {"xilinx", "virtexusp", "xcvu9p", 18}},
|
||||
{0x14B79093, {"xilinx", "virtexusp", "xcvu37p", 18}},
|
||||
{0x04B49093, {"xilinx", "virtexusp", "xcvu11p", 18}},
|
||||
{0x04B4F093, {"xilinx", "virtexusp", "xcvu11p", 18}},
|
||||
|
||||
{0x04B51093, {"xilinx", "virtexusp", "xcvu13p", 24}},
|
||||
{0x04B55093, {"xilinx", "virtexusp", "xcvu13p", 24}},
|
||||
|
||||
{0x04BA3093, {"xilinx", "virtexusp", "xcvu15p", 24}},
|
||||
{0x04BA1093, {"xilinx", "virtexusp", "xcvu19p", 24}},
|
||||
{0x04BA5093, {"xilinx", "virtexusp", "xcvu19p", 24}},
|
||||
|
||||
/* Xilinx Ultrascale+ / Spartan */
|
||||
{0x04e80093, {"xilinx", "spartanusp", "xcsu35p", 6}},
|
||||
{0x04E81093, {"xilinx", "spartanusp", "xcsu10p", 6}},
|
||||
{0x04E82093, {"xilinx", "spartanusp", "xcsu25p", 6}},
|
||||
{0x04E80093, {"xilinx", "spartanusp", "xcsu35p", 6}},
|
||||
{0x04EB1093, {"xilinx", "spartanusp", "xcsu45p", 6}},
|
||||
{0x04E90093, {"xilinx", "spartanusp", "xcsu55p", 6}},
|
||||
{0x04EB2093, {"xilinx", "spartanusp", "xcsu60p", 6}},
|
||||
{0x04E99093, {"xilinx", "spartanusp", "xcsu65p", 6}},
|
||||
{0x04E98093, {"xilinx", "spartanusp", "xcsu100p", 6}},
|
||||
{0x04EA1093, {"xilinx", "spartanusp", "xcsu150p", 6}},
|
||||
{0x04EA0093, {"xilinx", "spartanusp", "xcsu200p", 6}},
|
||||
|
||||
/* Xilinx Ultrascale+ / ZynqMP */
|
||||
/* When powering a zynq ultrascale+ MPSoC, PL Tap and ARM dap
|
||||
|
|
|
|||
|
|
@ -585,6 +585,23 @@ static std::map <uint32_t, flash_t> flash_list = {
|
|||
.quad_mask = 0,
|
||||
.global_lock = false,
|
||||
}},
|
||||
{0xc22314, {
|
||||
/* https://datasheet4u.com/pdf-down/M/X/2/MX25V8035F-MACRONIX.pdf */
|
||||
.manufacturer = "Macronix",
|
||||
.model = "MX25V8035F",
|
||||
.nr_sector = 16,
|
||||
.sector_erase = true,
|
||||
.subsector_erase = true,
|
||||
.has_extended = false,
|
||||
.tb_otp = true,
|
||||
.tb_offset = (1 << 3),
|
||||
.tb_register = CONFR,
|
||||
.bp_len = 4,
|
||||
.bp_offset = {(1 << 2), (1 << 3), (1 << 4), (1 << 5)},
|
||||
.quad_register = STATR,
|
||||
.quad_mask = (1 << 6),
|
||||
.global_lock = false,
|
||||
}},
|
||||
{0xef4014, {
|
||||
/* https://cdn-shop.adafruit.com/datasheets/W25Q80BV.pdf */
|
||||
.manufacturer = "Winbond",
|
||||
|
|
|
|||
|
|
@ -914,7 +914,7 @@ void Xilinx::program_mem(ConfigBitstreamParser *bitfile)
|
|||
const uint8_t *data = bitfile->getData();
|
||||
int tx_len;
|
||||
Jtag::tapState_t tx_end;
|
||||
int burst_len = byte_length / 100;
|
||||
const int burst_len = (byte_length < 100) ? byte_length : byte_length / 100;
|
||||
|
||||
ProgressBar progress("Load SRAM", byte_length, 50, _quiet);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue