Holger Vogt f45103b3ab Update to filesource ... Move tprev out of the loop to enable storing the previous time value. Add some general warning message that an error might have occurred during reading the time or data values from the data input file. Allow empty lines in the data input file. Guard early data values (TIME < time offset) against false reading. Add some simple examples.		2025-08-11 18:47:00 +02:00
..
d_lut	Obtain memory and simulation time	2022-01-03 22:11:15 +01:00
d_process	Fix d_process named pipes example. Use the correct gtkwave command for MacOS.	2025-01-26 22:57:20 +01:00
d_source	Obtain memory and simulation time	2022-01-03 22:11:15 +01:00
delay	Obtain memory and simulation time	2022-01-03 22:11:15 +01:00
delta-sigma	add y-axis label	2022-02-01 12:21:08 +01:00
filesource	Update to filesource	2025-08-11 18:47:00 +02:00
ghdl	Add co-simulation with VHDL, using the GHDL compiler and d_cosim.	2025-01-30 09:45:35 +00:00
icarus_verilog	Fix ordering of parameter definition and use.	2025-01-20 09:28:09 +01:00
original-examples	Add null-pointer checks to some code that crashed when trying	2023-11-09 12:07:31 +00:00
pll	Re-make pll-xspice.cir as a wrapper around shared-pll-xspice.cir,	2025-04-12 18:20:20 +02:00
pwm-osc	Examples for d_pwm and d_osc	2022-12-11 15:27:42 +01:00
see	Tiny modifications of SEE examples	2025-06-24 10:32:41 +02:00
state	Fix d_process named pipes example. Use the correct gtkwave command for MacOS.	2025-01-26 22:57:20 +01:00
table	New tables for MOS devices	2022-10-07 13:11:18 +02:00
transmission_lines	Fix the xspice transmission_line examples.	2025-07-16 17:29:02 +02:00
various	Various filter examples using Laplace expression x_fer	2023-01-20 15:07:37 +01:00
verilator	Fix ordering of parameter definition and use.	2025-01-20 09:28:09 +01:00