luke
/
ngspice
mirror of https://git.code.sf.net/p/ngspice/ngspice
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
ngspice/examples
History
Giles Atkinson 35968d1da6 Add additional examples of Verilog co-simulation and share the Verilog 
source and large parts of the example circuits between Verilator and
Icarus Verilog.  Verilog source file adc.v has improved style:
all assignments in the always block are now non-blocking.
 		2024-11-02 22:30:32 +01:00
..
Monte_Carlo Fix internet address 2022-04-25 21:30:07 +02:00
TransImpedanceAmp Some hints how to use this file 2018-08-18 11:28:27 +02:00
TransmissionLines Better visibility of the results 2023-07-15 11:11:48 +02:00
adms Comment out non-ngspice compatible commands 2021-12-16 08:12:29 +01:00
cider When Cider models are present, a normal batch mode sp_shutdown (for example, ngspice -b cmosinv.cir) will call com_quit(NULL). This cleans up so that valgrind will find no leaks in Cider devices after sp_shutdown. To disable this feature, set the environment variable CIDER_COM_QUIT="OFF". Even though it really does not matter that Cider memory is cleared just before exit, it makes it cleaner for valgrind checks. 2023-07-15 11:32:37 +02:00
control_structs S-parameters: Replace S11 by S_1_1 etc. to avoid ambiguity 2022-04-29 07:29:14 +02:00
ddt Remove unused variable debarr. 2022-12-11 15:39:10 +01:00
digital Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE. 2023-07-31 14:27:59 +02:00
hicum2 prevent non-monotonic scale 2020-12-22 11:12:54 +01:00
inductive-systems examples/inductive-systems/*, add test files 2017-01-02 20:02:19 +01:00
klu/Circuits Added missing ISCAS85 libraries 2023-08-16 11:14:18 +02:00
loops Repeat loop requires plain number, transformed vector, or transformed variable 2024-03-19 17:05:10 +01:00
measure measure example with expression evaluation 2024-03-29 17:12:40 +01:00
memristor Obtain memory and simulation time 2022-01-03 22:11:15 +01:00
mos File encoding is now UTF-8 2024-11-02 22:22:22 +01:00
noise implement osdi noise support 2023-11-04 19:36:30 +01:00
numparam Add a simple example of using string-valued parameters. 2023-01-09 16:33:53 +01:00
optran special ngbehavior needed 2023-01-09 16:31:01 +01:00
osdi add examples for OSDI noise 2023-11-04 19:36:30 +01:00
p-to-n-examples Use sparse, as KLU will fail. 2023-09-10 13:43:09 +02:00
paranoia Fix some typos. 2023-12-18 20:13:06 +01:00
plot plotting/grid.c, bug fix, avoid string buffer overflow 2018-01-27 21:58:15 +01:00
probe Enable power measurement for W switch 2022-10-07 13:18:51 +02:00
proc2mod Added some examples. 2004-08-09 16:20:23 +00:00
pss move to the actual bsim4 version to avoid needless warnings 2014-09-10 13:33:22 +02:00
snapshot examples/snapshot: start, interrupt and resume simulation 2012-11-03 20:08:23 +01:00
soa Add a comment to say that LT/PSPICE compatability is needed. 2023-07-31 14:29:50 +02:00
soi remove warnings 2019-08-13 23:16:12 +02:00
sp better visibility 2023-07-31 14:30:37 +02:00
svg File encoding is now UTF-8 2024-11-02 22:22:22 +01:00
tclspice tcl-testbench[x].sh: Use bash within shebang 2022-01-02 13:51:44 +01:00
transient-noise noisy ring-oszillator now using transistors with different W/L 2018-08-25 23:21:49 +02:00
utf-8/стекло Upgrade due to recent ngspice enhancements 2021-07-05 14:03:55 +02:00
various Add a transformer with parameters on the .subckt line 2024-01-24 10:11:44 +01:00
vbic vbic: rm obsolete regression test 2024-05-01 10:34:01 +02:00
vdmos Add vto model parameter (the default has changed!), add .ic 2023-05-27 10:47:43 +02:00
xspice Add additional examples of Verilog co-simulation and share the Verilog 2024-11-02 22:30:32 +01:00