deb880c090
Merge branch 'pre-master' into bt_dev
2022-11-08 12:23:07 -08:00
5d5b62685c
Add more vectors to behavioral 283 circuit. Add tristate buffer circuit which shows glitches until inertial delays are implemented.
2022-11-08 12:09:13 -08:00
4a4dee88af
When the gen_tab has only one entry, do not call optimize_gen_tab, it is not necessary.
2022-11-08 04:42:04 -08:00
5cecd039f6
Check that the bparse gen_tab optimization loop finishes when no more improvements occur.
2022-11-07 13:47:45 -08:00
104afe77cb
Remove asserts, replace fixed size lexer_buf.
2022-11-07 14:47:57 +01:00
d05689eed8
Add pindly tristate example. Cleanup error handling.
2022-11-07 14:47:36 +01:00
f6386bda0c
Remove most asserts.
2022-11-07 14:47:29 +01:00
1200092250
Add behavioral (LOGICEXP, PINDLY) test for 283 circuit. There are glitches in the simulation for some of the s* outputs. Probably due to not having inertial delays. And why not set 'zero' delays as close to zero as permitted by XSPICE.
2022-11-07 14:47:18 +01:00
ab7634e72e
Reduce the delays of 'zero' delay gates to 1.0e-11. Add decoder test for logicexpr and pindly.
2022-11-07 14:47:13 +01:00
77d56eb184
Fix a typo, add more comments.
2022-11-07 14:47:02 +01:00
7e4b10a9db
Add support for TRISTATE: in PINDLY.
2022-11-07 14:46:53 +01:00
50e3c7eadd
Fix potential memory leak, clean out debug code.
2022-11-07 14:46:48 +01:00
3bdb6ee151
Better estimates of rise/fall delays in PINDLYs with outputs separated by CASE.
2022-11-07 14:46:34 +01:00
5717b2b2fc
Fix visualc compiler warnings.
2022-11-07 14:46:27 +01:00
629010b1cb
Improve delay estimates for pindly output buffers.
2022-11-07 14:46:14 +01:00
3eb0a089e5
Initial handling of PINDLY. Output buffers without rise/fall delay estimates.
2022-11-07 14:46:04 +01:00
9d239dc2f7
Move f_logicexp, f_pindly calls to u_process_instance. Use u_add_instance to copy gate instances and models to the replacement cards.
2022-11-07 14:45:57 +01:00
a27ae48e27
Fix potential memory leak.
2022-11-07 14:45:51 +01:00
67369f1c67
Initial logicexp parser and gate generator.
2022-11-07 14:45:45 +01:00
db81d7ca28
Add drive 0/1 for $d_lo/$d_hi.
2022-11-07 14:45:33 +01:00
2e064db79a
Add STATIC_VAR_TABLE locdata
...
Add CALLBACK cm_d_pwm_callback
Reserve memory for x, y arrays only once during INIT
2022-11-07 12:16:58 +01:00
e533079954
Merge branch 'pre-master' into bt_dev
2022-11-06 10:14:06 -08:00
11cda1cdfe
Remove asserts, replace fixed size lexer_buf.
2022-11-06 10:09:04 -08:00
9bab229e7b
We are developing towards ngspice-39
2022-11-06 11:31:21 +01:00
5bf6894d58
Add info on new function ngCM_Input_Path
2022-11-06 11:30:00 +01:00
0b466bd115
Add pindly tristate example. Cleanup error handling.
2022-11-03 09:36:56 -07:00
6295cba81c
Remove most asserts.
2022-11-02 10:59:25 -07:00
5c68f4c02c
Add behavioral (LOGICEXP, PINDLY) test for 283 circuit. There are glitches in the simulation for some of the s* outputs. Probably due to not having inertial delays. And why not set 'zero' delays as close to zero as permitted by XSPICE.
2022-11-01 11:29:43 -07:00
9ca9b48af4
Reduce the delays of 'zero' delay gates to 1.0e-11. Add decoder test for logicexpr and pindly.
2022-10-31 17:44:07 -07:00
f8834a06a3
Fix a typo, add more comments.
2022-10-30 13:03:56 -07:00
0e7226c824
Add support for TRISTATE: in PINDLY.
2022-10-29 16:33:58 -07:00
7c1bc4c897
Fix potential memory leak, clean out debug code.
2022-10-26 23:27:06 -07:00
3037aa2838
Merge branch 'pre-master' into bt_dev
2022-10-26 19:34:42 -07:00
a3419821df
Better estimates of rise/fall delays in PINDLYs with outputs separated by CASE.
2022-10-26 19:31:06 -07:00
159e36d23b
Add function
...
char* ngCM_Input_Path(const char* path);
to shared ngspice API
to send file path for code model input files (e.g. dsource).
Such path cannot be extracted automatically when netlist has
been sent by ngSpice_Circ
2022-10-26 23:34:10 +02:00
ce2e95f32d
Fix typo
2022-10-26 16:23:36 +02:00
39316ea3c6
Function ngSpice_Circ() may send empty lines to shared ngspice.
...
Skip these lines while processing the netlist array.
2022-10-26 16:23:00 +02:00
07da7d07d0
Fix visualc compiler warnings.
2022-10-25 10:59:00 -07:00
a25f5b4cb2
Merge branch 'pre-master' into bt_dev
2022-10-24 15:47:16 -07:00
d19199009a
Improve delay estimates for pindly output buffers.
2022-10-24 15:37:24 -07:00
364c123aa8
Initial handling of PINDLY. Output buffers without rise/fall delay estimates.
2022-10-23 17:04:37 -07:00
8bcea45f1c
Add a guard on parameter 'position', limit to
...
1e-9 to 0.999999999
FIXME: the given parameter limits from ifspec.ifs are not recognized.
2022-10-22 13:31:38 +02:00
4a222d74c1
Update on author
2022-10-22 13:29:48 +02:00
9f740ea88a
Move f_logicexp, f_pindly calls to u_process_instance. Use u_add_instance to copy gate instances and models to the replacement cards.
2022-10-21 22:14:41 -07:00
fd3c576058
Fix potential memory leak.
2022-10-21 15:49:12 -07:00
4f128bb529
Initial logicexp parser and gate generator.
2022-10-21 15:21:18 -07:00
28e5da661d
Add drive 0/1 for $d_lo/$d_hi.
2022-10-21 11:27:57 -07:00
ec43c65f56
Patch required to allow compiling at Fedora with -Werror=format-security
...
Provided by Mamoru Tasaka
2022-10-21 15:26:20 +02:00
3864edb941
Typo
2022-10-19 12:25:00 +02:00
16b95ecda2
Small correction to previous commit.
2022-10-17 20:32:44 +02:00
Brian Taylor
Holger Vogt