4 Commits

Author	SHA1	Message	Date
dwarning	96dd397251	correct the plot output	2012-08-05 12:06:11 +02:00
h_vogt	19a67fb7c5	pll: just include one of the two vco available ... (avoid a bug which has been removed only recently)	2012-08-04 00:22:25 +02:00
h_vogt	a0db6f0ccd	update to XSPICE phase-locked loop example	2012-08-03 23:22:54 +02:00
h_vogt	85ece25a3a	new XSPICE example: mixed mode pll circuit	2012-07-29 13:52:23 +02:00