Giles Atkinson
98333ee89a
Fix a memory leak reported by Brian Taylor that was introduced
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by commit 4d8e17487b .
2023-03-22 14:30:11 +01:00
Holger Vogt
82de3db8ad
VBIC: Add bvbe, bvbc, and bvce as redundant SOA parameters
2023-03-22 14:30:01 +01:00
Holger Vogt
f121c433a7
Check for buggy diode instance line, avoid crash
2023-03-22 14:29:48 +01:00
Holger Vogt
2ce18ab184
Add VDMOS default junction cap IRF540 IRF9540
2023-03-22 14:29:37 +01:00
Holger Vogt
2a647f8462
Set default VDMOS model parameters to resemble IRF540, 9540
2023-03-22 14:29:22 +01:00
Giles Atkinson
e25f8bd522
Add inertial delay to missed d_xnor and tidy blank lines in d_xor.
2023-03-22 14:29:03 +01:00
Giles Atkinson
cecce5163e
Inertial delay for remaining simple gates and buffers:
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nand or xor open_c open_e, but not tristate.
2023-03-22 14:28:51 +01:00
Giles Atkinson
db38d4ad54
Correct timing of transitions to UNKNOWN.
2023-03-22 14:28:37 +01:00
Giles Atkinson
240a2b9406
Add missed file inertial.h.
2023-03-22 14:28:23 +01:00
Giles Atkinson
4623a04615
Interim version of inertial delay for tristate buffer.
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This does not handle three-way or mixed transitions.
2023-03-22 14:28:15 +01:00
Giles Atkinson
e3b4df6a51
First group of digital code models with improved implementation
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of inertial delay: buffer, inverter, and, nor. Also adds
utility function cm_is_inertial(().
2023-03-22 14:27:54 +01:00
Giles Atkinson
2643e3b17f
New code-model library functions cm_schedule_output() and cm_getvar().
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To be used in the inertial delay code for digital code models.
2023-03-22 14:27:35 +01:00
Giles Atkinson
c1659a64c3
Change output event setup in evtload.c so that, when making an event call
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to a code model, there is no longer a reference to the value of the event
at the head of the free list. That allows all such free lists (with the
same data type) to be combined, probably improving performance.
This is in preparation for full implementation of inertial delay for
digital nodes.
2023-03-22 14:27:19 +01:00
Giles Atkinson
2d0561f386
Allow string-valued parameters to XSPICE device models with no default.
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The code model then sees the value NULL. Needed for the "family"
parameter on logic models, used by automatic bridge insertion.
2023-03-22 14:27:06 +01:00
Brian Taylor
8c69ada5b5
The logicexp example in the PSpice ref. manual has a name with a '+' character (LCN+4). Update lexer_scan.
2023-03-22 14:26:43 +01:00
Brian Taylor
40a540a2ff
Add inertial_delay=true to .model statements generated when U* instances in PSpice library subckts are translated to Xspice. Any other Xspice A* digital instances might have different inertial_delay settings in their models, so potentially there could be a mixture of delay types. For example, if a user wishes to model a DLYLINE using a d_buffer with inertial_delay=false and equal rise/fall delays.
2023-03-22 14:26:18 +01:00
Brian Taylor
164db58404
The intent now is to rely on a variable setting in .spiceinit to control the use of inertial delay XSPICE digital models. This will apply to U* instances in subcircuits which are translated to XSPICE.
2023-03-22 14:25:51 +01:00
Holger Vogt
86951501a7
Add eprvcd to the commands which set node names to lower case,
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but not the file names after >
Does not work for manually entered eprvcd commands, where the user
has to provide lower case node names.
2023-03-19 15:24:27 +01:00
Holger Vogt
3632a6b4ae
We need to translate from degree to rad
2023-03-18 22:32:25 +01:00
Holger Vogt
2a6052517b
Fix prvious commit: allow access to all vector elements of cc
2023-03-18 22:32:19 +01:00
Holger Vogt
68156fa62c
Complex number handling other than MSVC
2023-03-18 22:32:07 +01:00
Holger Vogt
71571a1432
Add function atanh to .control section
2023-03-18 22:31:48 +01:00
Holger Vogt
3996d27b29
Make code a little more efficient
2023-03-18 22:31:33 +01:00
Holger Vogt
7af6c4a661
Re-enable single line parameter lists, separated by commas
2023-03-18 22:31:27 +01:00
dwarning
f34ff7e63c
Revert "implement typedpnjlim as optional limiter for verilog-a models"
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This reverts commit f73d3b20a0 .
2023-03-18 22:31:04 +01:00
Holger Vogt
63d86f5af8
Prevent a crash in strchr
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Reported by KiCad Sentry
2023-03-18 14:37:59 +01:00
Holger Vogt
e4202ea181
The tc for R, L, C may include an expression
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like tc={expression} or tc={expression}, 1.3u or
tc={expression}, {expression2}
2023-03-18 14:37:53 +01:00
Holger Vogt
d8505f0069
Make error message more verbose by a hint to the line (fragment).
2023-03-18 14:37:47 +01:00
R. Timothy Edwards
c12296182c
The code in src/frontend/subckt.c has a fixed-size structure called table at the top with a size set to N_GLOBAL_NODES = 1005. If the number of items passed in formal and actual exceeds 1005, then ngspice exits immediately with an error.
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This patch lets table be reallocated on the fly as needed to accommodate the number of subcircuit arguments, instead of being a fixed value.
2023-03-18 14:37:40 +01:00
Holger Vogt
e4601c16ee
Not a warning but an error, stopping the simulation
2023-03-18 14:37:33 +01:00
Holger Vogt
f32f3ac8cd
Improve previous commit: A bad .model line leads to a breakup
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of the simulation.
2023-03-18 14:37:26 +01:00
Holger Vogt
c61acefef7
Prevent crash when a bad .model line is given, like
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.model
.model xxx
2023-03-18 14:37:19 +01:00
Holger Vogt
247562c096
Update copyright notice
2023-03-18 14:37:08 +01:00
Holger Vogt
bcec3cb5e3
Updating links to ngspice web pages
2023-03-18 14:37:02 +01:00
Holger Vogt
4cc63494db
Improve error message
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Typo
2023-03-18 14:36:55 +01:00
Brian Taylor
4111aaf110
When logicexp has a ugate timing model other than d0_gate, use its delays for an inverter or buffer.
2023-03-18 14:36:45 +01:00
Brian Taylor
a6b2773c90
For a ugate timing model, when tphlXX/tplhXX is not found, set the fall/rise delay to zero (1.0e-12).
2023-03-18 14:36:35 +01:00
Brian Taylor
0e5a5a62ac
74F550 and 74F551 have only fall delays on the inverters. Use the fall delay for both rise and fall.
2023-03-18 14:36:23 +01:00
Brian Taylor
3a76a1ef52
Prepare for inertial_delay model parameter.
2023-03-18 14:36:17 +01:00
Brian Taylor
4b30113f60
Check current_subckt is set when printing TRANS_OUT.
2023-03-18 14:36:00 +01:00
Giles Atkinson
ae6375c519
Prevent a crash when "portnum" is used in a voltage source without "z0".
2023-03-18 14:35:51 +01:00
Holger Vogt
8915d42241
Prevent crash during .probe p(...) when no subcircuits are given.
2023-03-18 14:35:33 +01:00
Holger Vogt
5ee7a0ad2d
prevent crash when defect .model line is given
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(no model name or no model type)
2023-03-18 14:35:11 +01:00
Holger Vogt
d2fb3fb16b
Prevent memory leak.
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Remove use controls.
Safeguard against NULL.
2023-03-18 14:34:57 +01:00
Giles Atkinson
79fcb5d4bd
Fix plotting bug reported by Robert Turnbull: ngspice-devel 2023-02-10.
2023-03-18 14:34:50 +01:00
Markus Mueller
0caf1aa815
(fix) CALC_OP during transient analysis in OSDI interface
2023-03-18 14:34:37 +01:00
Holger Vogt
d4ee9af2e6
We are developing towards ngspice-40
2023-03-18 14:34:27 +01:00
Giles Atkinson
2233e2f825
Fix Bug #624 - "Destroy All Fails with an Open Plot Window" for X11.
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Move XftDrawDestroy() call to a point where the window still exists.
2023-03-18 14:34:20 +01:00
Holger Vogt
f83c89cce7
When path is NULL, we don't need to free it.
2023-03-18 14:33:59 +01:00
Holger Vogt
75f9451702
Fix bug 624 also for MS Windows
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by moving DestroyGraph() from WM_CLOSE to RemoveWindow()
2023-03-18 14:33:51 +01:00