de7ae6e678
Fix bug 711 reported by Sonia Edward
2024-11-02 22:44:21 +01:00
3d6d0d880a
Improve comment
2024-11-02 22:44:11 +01:00
27db91480b
Fix bug no. 708, reported by Philip Sauvage.
2024-11-02 22:43:57 +01:00
16798edb36
Minor change.
2024-11-02 22:43:35 +01:00
5f8ab0eb67
Minor change.
2024-11-02 22:43:28 +01:00
9d2e2f77c0
Minor change.
2024-11-02 22:43:22 +01:00
b40dcaa18d
OpenVAF-reloaded compiled model support.
2024-11-02 22:43:06 +01:00
368c59466b
Allow plotting a single point in an ascii plot
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(command .asciiplot)
2024-11-02 22:42:42 +01:00
e3f7cf3e0a
Fix Bug #698 -
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"Initial transient solution assumes voltage source=0 even if it is not."
Cause was another error in ad5bb9eb8d#607 , which uncovered
an earlier latent bug.
2024-11-02 22:42:22 +01:00
537d55d80b
Improve an error message.
2024-11-02 22:42:12 +01:00
cf812da363
Try to clarify the mechanism of parameter substitution and add
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an example of substituting an XSPICE vector parameter.
2024-11-02 22:41:59 +01:00
e130371410
Added: Error: Pole/zero analysis is not (yet) supported with 'option KLU'.
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Use 'option sparse' instead.
2024-11-02 22:41:42 +01:00
09d352be12
This does not fix noise analysis with klu.
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It does add missing { and } when event-driven instances are not present.
Without this change CKTop will always be called again directly in NOISEan even
if CKTop was previously called by EVTop. This matches the intended
behavior before #ifdef KLU was added.
2024-11-02 22:41:21 +01:00
b350786c48
Some cosmetics
2024-11-02 22:40:54 +01:00
bafa3ff8a3
Revert the sign of ac_gain.real
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Fix bug no 697, reported by Matthieu Guerquin-Kern
2024-11-02 22:40:43 +01:00
0fadbdc488
Don't compile with OpenMP support, as it is not used in KLU.
2024-11-02 22:40:28 +01:00
2d9e5fede6
/openmp:llvm removed from additional options for the 'Release' builds
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(however keep it in the 'ReleaseOMP' builds).
2024-11-02 22:40:05 +01:00
f300154922
Insert correct conversion sections for KLU matrices
2024-11-02 22:39:50 +01:00
c8959ba072
ignore visualc xspice verilog dir
2024-11-02 22:39:34 +01:00
2129ac26fd
Add optional series resistance or junction capacitance, if non
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is defined in the .model statement. This may help achieving
convergence if subcircut models of opamps etc use simple diodes
as voltage limiters. Example call:
.options diode_cj0=20p diode_rser=20m
2024-11-02 22:39:24 +01:00
d5f0c6598f
Fix commit 09685dde1
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("Set lower case for variables or vectors in command 'echo'.
Tokens starting with '$' will get lower-casing.", 2024-09-07)
Don't use s as name for temporary string, as s has been set
already and is used later.
2024-11-02 22:39:03 +01:00
b62528d7e5
Set lower case for variables or vectors in command 'echo'.
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Tokens starting with '$' will get lower-casing.
2024-11-02 22:38:49 +01:00
82af46085d
Enable using fftw3 as a build option of shared ngspice on Windows
2024-11-02 22:38:28 +01:00
d425d38c44
Old deprecated ADMS examples removed.
2024-11-02 22:38:17 +01:00
419e821a09
Fixed KLU conversion to complex for SP Analysis
2024-11-02 22:38:03 +01:00
287280c3db
Make error messages more verbose:
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add line number and source file name.
2024-11-02 22:37:47 +01:00
bce621680b
Add line number and source file to some error messages
2024-11-02 22:37:31 +01:00
8e8716abc7
Fix warning message
2024-11-02 22:37:12 +01:00
c2c35b56a4
More on verbose error and warning messages
2024-11-02 22:36:46 +01:00
4e6af5a55f
Allow KiCad special token V(/xyz) by quoting
2024-11-02 22:36:26 +01:00
c33fd66a21
Make error messages more verbose:
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add line number and source file name.
2024-11-02 22:36:11 +01:00
3528156d14
Fix bug #680 . Check that src/dest memcpy arguments are non-NULL.
2024-11-02 22:35:57 +01:00
4e318c7a23
no built-in model for bsimbulk, so no qa test needed
2024-11-02 22:35:44 +01:00
8fbd357fdd
extend bsim4 operating point info list
2024-11-02 22:35:10 +01:00
123ed0aada
Add simulator version info to raw file ('write' commad)
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using an extra line 'Command: ...').
The old sequence (adding commands manually to raw file) is
still available.
The 'Command: anycommand' will not be executed if loading
an ngspice-generated raw file. Raw files from other simulators may
generate a warning that the command is not available.
2024-11-02 22:34:59 +01:00
1087c6a0c2
Add simulator version info to raw file in batch mode,
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using the line 'Command:...'
2024-11-02 22:34:41 +01:00
14844af175
Fix #686 : "XSpice Verilog Vector Input Bug".
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Bug report and fix by Aodhan Murray.
2024-11-02 22:34:23 +01:00
5f059abdca
Improve debugging using shared ngspice:
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print out each command received.
2024-11-02 22:34:05 +01:00
f495431509
Add a comment
2024-11-02 22:33:52 +01:00
a96237061d
Copy the correct spinit to ngspice/visualc
2024-11-02 22:33:36 +01:00
9e571d7df1
git ignore vcd files
2024-11-02 22:33:21 +01:00
984cd9cc10
extend unwanted output list
2024-11-02 22:32:56 +01:00
4cffcd96ce
add missing klu bindings
2024-11-02 22:32:33 +01:00
606c6d0df7
Notes go to stdout.
2024-11-02 22:32:14 +01:00
232101af10
Don't dereference a NULL pointer.
2024-11-02 22:32:03 +01:00
501a64470f
Error and warning messages to stderr
2024-11-02 22:31:47 +01:00
34549c4524
Note directed to stdout
2024-11-02 22:31:27 +01:00
4a1698c22d
enable compiling with CYGWIN
2024-11-02 22:31:13 +01:00
f4c7202130
Fix gcc warnings.
2024-11-02 22:30:45 +01:00
35968d1da6
Add additional examples of Verilog co-simulation and share the Verilog
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source and large parts of the example circuits between Verilator and
Icarus Verilog. Verilog source file adc.v has improved style:
all assignments in the always block are now non-blocking.
2024-11-02 22:30:32 +01:00
Holger Vogt
Árpád Bűrmen
Giles Atkinson
Brian Taylor
Alessio Cacciatori
dwarning
Francesco Lannutti
Vogt