Brian Taylor
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0da3f3504d
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Remove dead code.
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2023-02-04 16:33:39 -08:00 |
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Brian Taylor
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dcafbbcf90
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Add port directions when logicexp or pindly are present.
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2023-01-30 14:41:49 -08:00 |
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Brian Taylor
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c72781584a
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ERROR messages should be printed to stderr.
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2023-01-09 12:23:38 -08:00 |
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Brian Taylor
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7af21d1f5f
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Fix some comments.
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2023-01-03 09:38:57 -08:00 |
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Brian Taylor
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f137cc0c5c
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Ensure that amatch output is not binary data.
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2022-12-27 20:48:53 -08:00 |
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Brian Taylor
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d35491fa8f
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Return errors from f_logicexp and f_pindly without calling exit.
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2022-12-26 21:47:38 -08:00 |
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Brian Taylor
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a340515e77
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Add more error checks for f_logicexp and f_pindly.
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2022-12-24 12:27:57 -08:00 |
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Brian Taylor
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7581ed554e
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Remove the old inverter code.
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2022-12-20 10:43:15 -08:00 |
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Brian Taylor
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5f94c556fd
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Refactor new_gen_output_models.
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2022-12-19 13:10:32 -08:00 |
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Brian Taylor
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8e7c23d89e
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Added xor/xnor for logicexp timing models.
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2022-11-28 08:15:34 -08:00 |
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Brian Taylor
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e5bf2db785
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Handle cases where logicexp has a timing model but no pindly. This is rare, only 22 tests from the digital libraries. Move digital examples, add missing .spiceint file.
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2022-11-26 09:40:35 -08:00 |
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Brian Taylor
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96a9726b19
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Add more debug instrumentation.
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2022-11-15 14:59:58 -08:00 |
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Brian Taylor
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84833ccc97
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Use tilde '~' inputs instead of creating inverters.
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2022-11-12 22:53:49 -08:00 |
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Brian Taylor
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8165f35953
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Add safety braces.
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2022-11-09 14:41:27 -08:00 |
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Brian Taylor
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69c1f9605c
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Tidy up debug tracing code.
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2022-11-09 13:26:44 -08:00 |
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Brian Taylor
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5765f30d8d
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Fix memory leaks.
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2022-11-08 19:28:23 -08:00 |
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Brian Taylor
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5d5b62685c
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Add more vectors to behavioral 283 circuit. Add tristate buffer circuit which shows glitches until inertial delays are implemented.
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2022-11-08 12:09:13 -08:00 |
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Brian Taylor
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4a4dee88af
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When the gen_tab has only one entry, do not call optimize_gen_tab, it is not necessary.
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2022-11-08 04:42:04 -08:00 |
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Brian Taylor
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5cecd039f6
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Check that the bparse gen_tab optimization loop finishes when no more improvements occur.
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2022-11-07 13:47:45 -08:00 |
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Brian Taylor
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11cda1cdfe
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Remove asserts, replace fixed size lexer_buf.
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2022-11-06 10:09:04 -08:00 |
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Brian Taylor
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0b466bd115
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Add pindly tristate example. Cleanup error handling.
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2022-11-03 09:36:56 -07:00 |
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Brian Taylor
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6295cba81c
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Remove most asserts.
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2022-11-02 10:59:25 -07:00 |
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Brian Taylor
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5c68f4c02c
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Add behavioral (LOGICEXP, PINDLY) test for 283 circuit. There are glitches in the simulation for some of the s* outputs. Probably due to not having inertial delays. And why not set 'zero' delays as close to zero as permitted by XSPICE.
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2022-11-01 11:29:43 -07:00 |
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Brian Taylor
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9ca9b48af4
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Reduce the delays of 'zero' delay gates to 1.0e-11. Add decoder test for logicexpr and pindly.
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2022-10-31 17:44:07 -07:00 |
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Brian Taylor
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f8834a06a3
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Fix a typo, add more comments.
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2022-10-30 13:03:56 -07:00 |
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Brian Taylor
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0e7226c824
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Add support for TRISTATE: in PINDLY.
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2022-10-29 16:33:58 -07:00 |
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Brian Taylor
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7c1bc4c897
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Fix potential memory leak, clean out debug code.
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2022-10-26 23:27:06 -07:00 |
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Brian Taylor
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a3419821df
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Better estimates of rise/fall delays in PINDLYs with outputs separated by CASE.
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2022-10-26 19:31:06 -07:00 |
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Brian Taylor
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07da7d07d0
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Fix visualc compiler warnings.
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2022-10-25 10:59:00 -07:00 |
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Brian Taylor
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d19199009a
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Improve delay estimates for pindly output buffers.
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2022-10-24 15:37:24 -07:00 |
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Brian Taylor
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364c123aa8
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Initial handling of PINDLY. Output buffers without rise/fall delay estimates.
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2022-10-23 17:04:37 -07:00 |
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Brian Taylor
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9f740ea88a
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Move f_logicexp, f_pindly calls to u_process_instance. Use u_add_instance to copy gate instances and models to the replacement cards.
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2022-10-21 22:14:41 -07:00 |
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Brian Taylor
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fd3c576058
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Fix potential memory leak.
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2022-10-21 15:49:12 -07:00 |
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Brian Taylor
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4f128bb529
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Initial logicexp parser and gate generator.
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2022-10-21 15:21:18 -07:00 |