Holger Vogt
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ccb0319022
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An example for non-convergence of the pll if the stepszelimit is removed.
Adding a somewhat relaxed limit by TMAX in the tran command will speed
up the simulation by a factor of 1.5 without compromising the result.
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2019-02-02 09:46:07 +01:00 |
h_vogt
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5d0c3182d3
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add BSIM3 model parameters for loop filer with transistor charge pump
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2012-08-05 20:15:53 +02:00 |
dwarning
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96dd397251
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correct the plot output
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2012-08-05 12:06:11 +02:00 |
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h_vogt
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19a67fb7c5
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pll: just include one of the two vco available
(avoid a bug which has been removed only recently)
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2012-08-04 00:22:25 +02:00 |
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h_vogt
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a0db6f0ccd
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update to XSPICE phase-locked loop example
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2012-08-03 23:22:54 +02:00 |
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h_vogt
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6cd13e0475
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pll-xspice-fstep.cir: pll with ref frequency steps
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2012-07-31 18:05:10 +02:00 |
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h_vogt
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c31fc334f6
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pll-xspice.cir: save command added
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2012-07-31 17:31:28 +02:00 |
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h_vogt
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c0b5a78097
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new XSPICE example: use trtol=1
less ripple, but longer simulation time
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2012-07-30 00:01:56 +02:00 |
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h_vogt
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85ece25a3a
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new XSPICE example: mixed mode pll circuit
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2012-07-29 13:52:23 +02:00 |