 Brian Taylor
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68f1015075
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Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.
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2023-07-31 14:27:59 +02:00 |
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Brian Taylor
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14a403e193
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Use ~ on the input of a tristate buffer for INV3, and avoid creating an extra inverter. For ff/latch use ~ on set/reset and jkff clock inputs to avoid creating extra inverters.
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2023-05-27 10:38:40 +02:00 |
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Brian Taylor
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4936fa2b1d
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Add serial load to 74f524 example.
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2023-01-09 16:33:10 +01:00 |
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Brian Taylor
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c7fd3bcaee
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Add example for 74f524.
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2023-01-09 16:30:42 +01:00 |
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Brian Taylor
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7ff8f3773f
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Handle cases where logicexp has a timing model but no pindly. This is rare, only 22 tests from the digital libraries. Move digital examples, add missing .spiceint file.
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2022-12-11 15:34:33 +01:00 |
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 Holger Vogt
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5324319edb
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Move digital examples to new locations
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2022-12-11 15:33:08 +01:00 |
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