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table-model-test, polishing comments

This commit is contained in:
h_vogt 2016-08-21 23:14:41 +02:00
parent 8b54de2472
commit c6b32bee5b
3 changed files with 0 additions and 6 deletions
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2
src/xspice/examples/table/table-model-test-3d-3.sp
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@ -49,7 +49,6 @@ amos1 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable1
* NMOS L=0.13u W=10.0u rgeoMod=1
* BSIM 4.7
* change width of transistor by modifying parameter "gain"
* source is always tied to bulk (we not yet have a 3D table model!)
.ends
.subckt tbmosp d g s b
@ -61,7 +60,6 @@ amos2 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable2
* PMOS L=0.13u W=10.0u rgeoMod=1
* BSIM 4.7
* change width of transistor by modifying parameter "gain"
* source is always tied to bulk (we not yet have a 3D table model!)
.ends
.include ./modelcards/modelcard.nmos

2
src/xspice/examples/table/table-model-test-3d-4.sp
View File

@ -45,7 +45,6 @@ amos1 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable1
* NMOS L=0.13u W=10.0u rgeoMod=1
* BSIM 4.7
* change width of transistor by modifying parameter "gain"
* source is always tied to bulk (we not yet have a 3D table model!)
.ends
.subckt tbmosp d g s b
@ -57,7 +56,6 @@ amos2 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable2
* PMOS L=0.13u W=10.0u rgeoMod=1
* BSIM 4.7
* change width of transistor by modifying parameter "gain"
* source is always tied to bulk (we not yet have a 3D table model!)
.ends
.include ./modelcards/modelcard.nmos

2
src/xspice/examples/table/table-model-test-3d-5.sp
View File

@ -51,7 +51,6 @@ amos1 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable1
* NMOS L=0.13u W=10.0u rgeoMod=1
* BSIM 4.7
* change width of transistor by modifying parameter "gain"
* source is always tied to bulk (we not yet have a 3D table model!)
.ends
.subckt tbmosp d g s b
@ -63,7 +62,6 @@ amos2 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable2
* PMOS L=0.13u W=10.0u rgeoMod=1
* BSIM 4.7
* change width of transistor by modifying parameter "gain"
* source is always tied to bulk (we not yet have a 3D table model!)
.ends
.include ./modelcards/modelcard.nmos