From c6b32bee5b21d73f4633625dbbdaac25853efd3f Mon Sep 17 00:00:00 2001 From: h_vogt Date: Sun, 21 Aug 2016 23:14:41 +0200 Subject: [PATCH] table-model-test, polishing comments --- src/xspice/examples/table/table-model-test-3d-3.sp | 2 -- src/xspice/examples/table/table-model-test-3d-4.sp | 2 -- src/xspice/examples/table/table-model-test-3d-5.sp | 2 -- 3 files changed, 6 deletions(-) diff --git a/src/xspice/examples/table/table-model-test-3d-3.sp b/src/xspice/examples/table/table-model-test-3d-3.sp index afbee03f1..1e1feb57e 100644 --- a/src/xspice/examples/table/table-model-test-3d-3.sp +++ b/src/xspice/examples/table/table-model-test-3d-3.sp @@ -49,7 +49,6 @@ amos1 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable1 * NMOS L=0.13u W=10.0u rgeoMod=1 * BSIM 4.7 * change width of transistor by modifying parameter "gain" -* source is always tied to bulk (we not yet have a 3D table model!) .ends .subckt tbmosp d g s b @@ -61,7 +60,6 @@ amos2 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable2 * PMOS L=0.13u W=10.0u rgeoMod=1 * BSIM 4.7 * change width of transistor by modifying parameter "gain" -* source is always tied to bulk (we not yet have a 3D table model!) .ends .include ./modelcards/modelcard.nmos diff --git a/src/xspice/examples/table/table-model-test-3d-4.sp b/src/xspice/examples/table/table-model-test-3d-4.sp index 553cc9a72..af77a9e9b 100644 --- a/src/xspice/examples/table/table-model-test-3d-4.sp +++ b/src/xspice/examples/table/table-model-test-3d-4.sp @@ -45,7 +45,6 @@ amos1 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable1 * NMOS L=0.13u W=10.0u rgeoMod=1 * BSIM 4.7 * change width of transistor by modifying parameter "gain" -* source is always tied to bulk (we not yet have a 3D table model!) .ends .subckt tbmosp d g s b @@ -57,7 +56,6 @@ amos2 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable2 * PMOS L=0.13u W=10.0u rgeoMod=1 * BSIM 4.7 * change width of transistor by modifying parameter "gain" -* source is always tied to bulk (we not yet have a 3D table model!) .ends .include ./modelcards/modelcard.nmos diff --git a/src/xspice/examples/table/table-model-test-3d-5.sp b/src/xspice/examples/table/table-model-test-3d-5.sp index f3f5ffee8..378517512 100644 --- a/src/xspice/examples/table/table-model-test-3d-5.sp +++ b/src/xspice/examples/table/table-model-test-3d-5.sp @@ -51,7 +51,6 @@ amos1 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable1 * NMOS L=0.13u W=10.0u rgeoMod=1 * BSIM 4.7 * change width of transistor by modifying parameter "gain" -* source is always tied to bulk (we not yet have a 3D table model!) .ends .subckt tbmosp d g s b @@ -63,7 +62,6 @@ amos2 %vd(d s) %vd(g s) %vd(b s) %id(d s) mostable2 * PMOS L=0.13u W=10.0u rgeoMod=1 * BSIM 4.7 * change width of transistor by modifying parameter "gain" -* source is always tied to bulk (we not yet have a 3D table model!) .ends .include ./modelcards/modelcard.nmos