BSIM3v3.2.x shifted to folder bsim3v32
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The terms under which the software is provided are as the following.
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Software is distributed as is, completely without warranty or service
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support. The University of California and its employees are not liable
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for the condition or performance of the software.
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The University owns the copyright but shall not be liable for any
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infringement of copyright or other proprietary rights brought by third
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parties against the users of the software.
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The University of California hereby disclaims all implied warranties.
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The University of California grants the users the right to modify, copy,
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and redistribute the software and documentation, both within the user's
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organization and externally, subject to the following restrictions:
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1. The users agree not to charge for the University of California code
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itself but may charge for additions, extensions, or support.
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2. In any product based on the software, the users agree to acknowledge
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the UC Berkeley BSIM Research Group that developed the software. This
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acknowledgment shall appear in the product documentation.
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3. The users agree to obey all U.S. Government restrictions governing
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redistribution or export of the software.
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4. The users agree to reproduce any copyright notice which appears on
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the software on any copy or modification of such made available
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to others.
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## Process this file with automake to produce Makefile.in
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noinst_LIBRARIES = libbsim3v32.a
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libbsim3v32_a_SOURCES = \
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b3v32.c \
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b3v32acld.c \
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b3v32ask.c \
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b3v32check.c \
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b3v32cvtest.c \
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b3v32del.c \
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b3v32dest.c \
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b3v32getic.c \
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b3v32ld.c \
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b3v32mask.c \
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b3v32mdel.c \
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b3v32mpar.c \
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b3v32noi.c \
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b3v32par.c \
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b3v32pzld.c \
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b3v32set.c \
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b3v32temp.c \
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b3v32trunc.c \
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bsim3v32def.h \
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bsim3v32ext.h \
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bsim3v32init.c \
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bsim3v32init.h \
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bsim3v32itf.h
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INCLUDES = -I$(top_srcdir)/src/include
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MAINTAINERCLEANFILES = Makefile.in
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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
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/**********
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* Copyright 2001 Regents of the University of California. All rights reserved.
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* File: b3.c of BSIM3v3.2.4
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* Author: 1995 Min-Chie Jeng and Mansun Chan
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* Author: 1997-1999 Weidong Liu.
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* Author: 2001 Xuemei Xi
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* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
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**********/
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#include "ngspice.h"
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#include "devdefs.h"
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#include "bsim3v32def.h"
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#include "suffix.h"
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IFparm BSIM3v32pTable[] = { /* parameters */
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IOP( "l", BSIM3v32_L, IF_REAL , "Length"),
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IOP( "w", BSIM3v32_W, IF_REAL , "Width"),
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IOP( "m", BSIM3v32_M, IF_REAL , "Parallel multiplier"),
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IOP( "ad", BSIM3v32_AD, IF_REAL , "Drain area"),
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IOP( "as", BSIM3v32_AS, IF_REAL , "Source area"),
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IOP( "pd", BSIM3v32_PD, IF_REAL , "Drain perimeter"),
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IOP( "ps", BSIM3v32_PS, IF_REAL , "Source perimeter"),
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IOP( "nrd", BSIM3v32_NRD, IF_REAL , "Number of squares in drain"),
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IOP( "nrs", BSIM3v32_NRS, IF_REAL , "Number of squares in source"),
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IOP( "off", BSIM3v32_OFF, IF_FLAG , "Device is initially off"),
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IOP( "nqsmod", BSIM3v32_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"),
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IP( "ic", BSIM3v32_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"),
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OP( "gmbs", BSIM3v32_GMBS, IF_REAL, "Gmb"),
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OP( "gm", BSIM3v32_GM, IF_REAL, "Gm"),
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OP( "gds", BSIM3v32_GDS, IF_REAL, "Gds"),
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OP( "vdsat", BSIM3v32_VDSAT, IF_REAL, "Vdsat"),
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OP( "vth", BSIM3v32_VON, IF_REAL, "Vth"),
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OP( "id", BSIM3v32_CD, IF_REAL, "Ids"),
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OP( "vbs", BSIM3v32_VBS, IF_REAL, "Vbs"),
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OP( "vgs", BSIM3v32_VGS, IF_REAL, "Vgs"),
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OP( "vds", BSIM3v32_VDS, IF_REAL, "Vds"),
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};
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IFparm BSIM3v32mPTable[] = { /* model parameters */
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IOP( "capmod", BSIM3v32_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"),
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IOP( "mobmod", BSIM3v32_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"),
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IOP( "noimod", BSIM3v32_MOD_NOIMOD, IF_INTEGER, "Noise model selector"),
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IOP( "acm", BSIM3v32_MOD_ACMMOD, IF_INTEGER, "Area calculation method selector"),
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IOP( "paramchk", BSIM3v32_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"),
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IOP( "binunit", BSIM3v32_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"),
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IOP( "version", BSIM3v32_MOD_VERSION, IF_STRING, " parameter for model version"),
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IOP( "tox", BSIM3v32_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"),
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IOP( "toxm", BSIM3v32_MOD_TOXM, IF_REAL, "Gate oxide thickness used in extraction"),
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IOP( "cdsc", BSIM3v32_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"),
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IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"),
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IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"),
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IOP( "cit", BSIM3v32_MOD_CIT, IF_REAL, "Interface state capacitance"),
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IOP( "nfactor", BSIM3v32_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"),
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IOP( "xj", BSIM3v32_MOD_XJ, IF_REAL, "Junction depth in meters"),
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IOP( "vsat", BSIM3v32_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"),
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IOP( "at", BSIM3v32_MOD_AT, IF_REAL, "Temperature coefficient of vsat"),
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IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."),
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IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."),
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IOP( "a1", BSIM3v32_MOD_A1, IF_REAL, "Non-saturation effect coefficient"),
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IOP( "a2", BSIM3v32_MOD_A2, IF_REAL, "Non-saturation effect coefficient"),
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IOP( "keta", BSIM3v32_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."),
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IOP( "nsub", BSIM3v32_MOD_NSUB, IF_REAL, "Substrate doping concentration"),
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IOP( "nch", BSIM3v32_MOD_NPEAK, IF_REAL, "Channel doping concentration"),
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IOP( "ngate", BSIM3v32_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"),
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IOP( "gamma1", BSIM3v32_MOD_GAMMA1, IF_REAL, "Vth body coefficient"),
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IOP( "gamma2", BSIM3v32_MOD_GAMMA2, IF_REAL, "Vth body coefficient"),
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IOP( "vbx", BSIM3v32_MOD_VBX, IF_REAL, "Vth transition body Voltage"),
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IOP( "vbm", BSIM3v32_MOD_VBM, IF_REAL, "Maximum body voltage"),
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IOP( "xt", BSIM3v32_MOD_XT, IF_REAL, "Doping depth"),
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IOP( "k1", BSIM3v32_MOD_K1, IF_REAL, "Bulk effect coefficient 1"),
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IOP( "kt1", BSIM3v32_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"),
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IOP( "kt1l", BSIM3v32_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"),
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IOP( "kt2", BSIM3v32_MOD_KT2, IF_REAL, "Body-coefficient of kt1"),
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IOP( "k2", BSIM3v32_MOD_K2, IF_REAL, "Bulk effect coefficient 2"),
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IOP( "k3", BSIM3v32_MOD_K3, IF_REAL, "Narrow width effect coefficient"),
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IOP( "k3b", BSIM3v32_MOD_K3B, IF_REAL, "Body effect coefficient of k3"),
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IOP( "w0", BSIM3v32_MOD_W0, IF_REAL, "Narrow width effect parameter"),
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IOP( "nlx", BSIM3v32_MOD_NLX, IF_REAL, "Lateral non-uniform doping effect"),
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IOP( "dvt0", BSIM3v32_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"),
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IOP( "dvt1", BSIM3v32_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"),
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IOP( "dvt2", BSIM3v32_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"),
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IOP( "dvt0w", BSIM3v32_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"),
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IOP( "dvt1w", BSIM3v32_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"),
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IOP( "dvt2w", BSIM3v32_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"),
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IOP( "drout", BSIM3v32_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"),
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IOP( "dsub", BSIM3v32_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"),
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IOP( "vth0", BSIM3v32_MOD_VTH0, IF_REAL,"Threshold voltage"),
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IOP( "vtho", BSIM3v32_MOD_VTH0, IF_REAL,"Threshold voltage"),
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IOP( "ua", BSIM3v32_MOD_UA, IF_REAL, "Linear gate dependence of mobility"),
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IOP( "ua1", BSIM3v32_MOD_UA1, IF_REAL, "Temperature coefficient of ua"),
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IOP( "ub", BSIM3v32_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"),
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IOP( "ub1", BSIM3v32_MOD_UB1, IF_REAL, "Temperature coefficient of ub"),
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IOP( "uc", BSIM3v32_MOD_UC, IF_REAL, "Body-bias dependence of mobility"),
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IOP( "uc1", BSIM3v32_MOD_UC1, IF_REAL, "Temperature coefficient of uc"),
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IOP( "u0", BSIM3v32_MOD_U0, IF_REAL, "Low-field mobility at Tnom"),
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IOP( "ute", BSIM3v32_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"),
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IOP( "voff", BSIM3v32_MOD_VOFF, IF_REAL, "Threshold voltage offset"),
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IOP( "tnom", BSIM3v32_MOD_TNOM, IF_REAL, "Parameter measurement temperature"),
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IOP( "cgso", BSIM3v32_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"),
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IOP( "cgdo", BSIM3v32_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"),
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IOP( "cgbo", BSIM3v32_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"),
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IOP( "xpart", BSIM3v32_MOD_XPART, IF_REAL, "Channel charge partitioning"),
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IOP( "elm", BSIM3v32_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"),
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IOP( "delta", BSIM3v32_MOD_DELTA, IF_REAL, "Effective Vds parameter"),
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IOP( "rsh", BSIM3v32_MOD_RSH, IF_REAL, "Source-drain sheet resistance"),
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IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"),
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IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "),
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IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "),
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IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "),
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IOP( "eta0", BSIM3v32_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"),
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IOP( "etab", BSIM3v32_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"),
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IOP( "pclm", BSIM3v32_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"),
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IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"),
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IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"),
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IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"),
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IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"),
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IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"),
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IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"),
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IOP( "js", BSIM3v32_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"),
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IOP( "jsw", BSIM3v32_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"),
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IOP( "pb", BSIM3v32_MOD_PB, IF_REAL, "Source/drain junction built-in potential"),
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IOP( "nj", BSIM3v32_MOD_NJ, IF_REAL, "Source/drain junction emission coefficient"),
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IOP( "xti", BSIM3v32_MOD_XTI, IF_REAL, "Junction current temperature exponent"),
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IOP( "mj", BSIM3v32_MOD_MJ, IF_REAL, "Source/drain bottom junction capacitance grading coefficient"),
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IOP( "pbsw", BSIM3v32_MOD_PBSW, IF_REAL, "Source/drain sidewall junction capacitance built in potential"),
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IOP( "mjsw", BSIM3v32_MOD_MJSW, IF_REAL, "Source/drain sidewall junction capacitance grading coefficient"),
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IOP( "pbswg", BSIM3v32_MOD_PBSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance built in potential"),
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IOP( "mjswg", BSIM3v32_MOD_MJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance grading coefficient"),
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IOP( "cj", BSIM3v32_MOD_CJ, IF_REAL, "Source/drain bottom junction capacitance per unit area"),
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IOP( "vfbcv", BSIM3v32_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"),
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IOP( "vfb", BSIM3v32_MOD_VFB, IF_REAL, "Flat Band Voltage"),
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IOP( "cjsw", BSIM3v32_MOD_CJSW, IF_REAL, "Source/drain sidewall junction capacitance per unit periphery"),
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IOP( "cjswg", BSIM3v32_MOD_CJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance per unit width"),
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IOP( "tpb", BSIM3v32_MOD_TPB, IF_REAL, "Temperature coefficient of pb"),
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IOP( "tcj", BSIM3v32_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"),
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IOP( "tpbsw", BSIM3v32_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"),
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IOP( "tcjsw", BSIM3v32_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"),
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IOP( "tpbswg", BSIM3v32_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"),
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IOP( "tcjswg", BSIM3v32_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"),
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IOP( "acde", BSIM3v32_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"),
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IOP( "moin", BSIM3v32_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"),
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IOP( "noff", BSIM3v32_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"),
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IOP( "voffcv", BSIM3v32_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"),
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IOP( "lint", BSIM3v32_MOD_LINT, IF_REAL, "Length reduction parameter"),
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IOP( "ll", BSIM3v32_MOD_LL, IF_REAL, "Length reduction parameter"),
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IOP( "llc", BSIM3v32_MOD_LLC, IF_REAL, "Length reduction parameter for CV"),
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IOP( "lln", BSIM3v32_MOD_LLN, IF_REAL, "Length reduction parameter"),
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IOP( "lw", BSIM3v32_MOD_LW, IF_REAL, "Length reduction parameter"),
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IOP( "lwc", BSIM3v32_MOD_LWC, IF_REAL, "Length reduction parameter for CV"),
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IOP( "lwn", BSIM3v32_MOD_LWN, IF_REAL, "Length reduction parameter"),
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IOP( "lwl", BSIM3v32_MOD_LWL, IF_REAL, "Length reduction parameter"),
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IOP( "lwlc", BSIM3v32_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"),
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IOP( "lmin", BSIM3v32_MOD_LMIN, IF_REAL, "Minimum length for the model"),
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IOP( "lmax", BSIM3v32_MOD_LMAX, IF_REAL, "Maximum length for the model"),
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IOP( "xl", BSIM3v32_MOD_XL, IF_REAL, "Length correction parameter"),
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IOP( "xw", BSIM3v32_MOD_XW, IF_REAL, "Width correction parameter"),
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IOP( "wr", BSIM3v32_MOD_WR, IF_REAL, "Width dependence of rds"),
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IOP( "wint", BSIM3v32_MOD_WINT, IF_REAL, "Width reduction parameter"),
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IOP( "dwg", BSIM3v32_MOD_DWG, IF_REAL, "Width reduction parameter"),
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IOP( "dwb", BSIM3v32_MOD_DWB, IF_REAL, "Width reduction parameter"),
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IOP( "wl", BSIM3v32_MOD_WL, IF_REAL, "Width reduction parameter"),
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IOP( "wlc", BSIM3v32_MOD_WLC, IF_REAL, "Width reduction parameter for CV"),
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IOP( "wln", BSIM3v32_MOD_WLN, IF_REAL, "Width reduction parameter"),
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IOP( "ww", BSIM3v32_MOD_WW, IF_REAL, "Width reduction parameter"),
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IOP( "wwc", BSIM3v32_MOD_WWC, IF_REAL, "Width reduction parameter for CV"),
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IOP( "wwn", BSIM3v32_MOD_WWN, IF_REAL, "Width reduction parameter"),
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IOP( "wwl", BSIM3v32_MOD_WWL, IF_REAL, "Width reduction parameter"),
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IOP( "wwlc", BSIM3v32_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"),
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IOP( "wmin", BSIM3v32_MOD_WMIN, IF_REAL, "Minimum width for the model"),
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IOP( "wmax", BSIM3v32_MOD_WMAX, IF_REAL, "Maximum width for the model"),
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IOP( "b0", BSIM3v32_MOD_B0, IF_REAL, "Abulk narrow width parameter"),
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IOP( "b1", BSIM3v32_MOD_B1, IF_REAL, "Abulk narrow width parameter"),
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IOP( "cgsl", BSIM3v32_MOD_CGSL, IF_REAL, "New C-V model parameter"),
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IOP( "cgdl", BSIM3v32_MOD_CGDL, IF_REAL, "New C-V model parameter"),
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IOP( "ckappa", BSIM3v32_MOD_CKAPPA, IF_REAL, "New C-V model parameter"),
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IOP( "cf", BSIM3v32_MOD_CF, IF_REAL, "Fringe capacitance parameter"),
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IOP( "clc", BSIM3v32_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"),
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IOP( "cle", BSIM3v32_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"),
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IOP( "dwc", BSIM3v32_MOD_DWC, IF_REAL, "Delta W for C-V model"),
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IOP( "dlc", BSIM3v32_MOD_DLC, IF_REAL, "Delta L for C-V model"),
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IOP( "hdif", BSIM3v32_MOD_HDIF, IF_REAL, "ACM Parameter: Distance Gate - contact"),
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IOP( "ldif", BSIM3v32_MOD_LDIF, IF_REAL, "ACM Parameter: Length of LDD Gate-Source/Drain"),
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IOP( "ld", BSIM3v32_MOD_LD, IF_REAL, "ACM Parameter: Length of LDD under Gate"),
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IOP( "rd", BSIM3v32_MOD_RD, IF_REAL, "ACM Parameter: Resistance of LDD drain side"),
|
||||
IOP( "rs", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance of LDD source side"),
|
||||
IOP( "rdc", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance contact drain side"),
|
||||
IOP( "rsc", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance contact source side"),
|
||||
|
||||
IOP( "alpha0", BSIM3v32_MOD_ALPHA0, IF_REAL, "substrate current model parameter"),
|
||||
IOP( "alpha1", BSIM3v32_MOD_ALPHA1, IF_REAL, "substrate current model parameter"),
|
||||
IOP( "beta0", BSIM3v32_MOD_BETA0, IF_REAL, "substrate current model parameter"),
|
||||
IOP( "ijth", BSIM3v32_MOD_IJTH, IF_REAL, "Diode limiting current"),
|
||||
|
||||
IOP( "lcdsc", BSIM3v32_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"),
|
||||
IOP( "lcdscb", BSIM3v32_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"),
|
||||
IOP( "lcdscd", BSIM3v32_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"),
|
||||
IOP( "lcit", BSIM3v32_MOD_LCIT, IF_REAL, "Length dependence of cit"),
|
||||
IOP( "lnfactor", BSIM3v32_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"),
|
||||
IOP( "lxj", BSIM3v32_MOD_LXJ, IF_REAL, "Length dependence of xj"),
|
||||
IOP( "lvsat", BSIM3v32_MOD_LVSAT, IF_REAL, "Length dependence of vsat"),
|
||||
IOP( "lat", BSIM3v32_MOD_LAT, IF_REAL, "Length dependence of at"),
|
||||
IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"),
|
||||
IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"),
|
||||
IOP( "la1", BSIM3v32_MOD_LA1, IF_REAL, "Length dependence of a1"),
|
||||
IOP( "la2", BSIM3v32_MOD_LA2, IF_REAL, "Length dependence of a2"),
|
||||
IOP( "lketa", BSIM3v32_MOD_LKETA, IF_REAL, "Length dependence of keta"),
|
||||
IOP( "lnsub", BSIM3v32_MOD_LNSUB, IF_REAL, "Length dependence of nsub"),
|
||||
IOP( "lnch", BSIM3v32_MOD_LNPEAK, IF_REAL, "Length dependence of nch"),
|
||||
IOP( "lngate", BSIM3v32_MOD_LNGATE, IF_REAL, "Length dependence of ngate"),
|
||||
IOP( "lgamma1", BSIM3v32_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"),
|
||||
IOP( "lgamma2", BSIM3v32_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"),
|
||||
IOP( "lvbx", BSIM3v32_MOD_LVBX, IF_REAL, "Length dependence of vbx"),
|
||||
IOP( "lvbm", BSIM3v32_MOD_LVBM, IF_REAL, "Length dependence of vbm"),
|
||||
IOP( "lxt", BSIM3v32_MOD_LXT, IF_REAL, "Length dependence of xt"),
|
||||
IOP( "lk1", BSIM3v32_MOD_LK1, IF_REAL, "Length dependence of k1"),
|
||||
IOP( "lkt1", BSIM3v32_MOD_LKT1, IF_REAL, "Length dependence of kt1"),
|
||||
IOP( "lkt1l", BSIM3v32_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"),
|
||||
IOP( "lkt2", BSIM3v32_MOD_LKT2, IF_REAL, "Length dependence of kt2"),
|
||||
IOP( "lk2", BSIM3v32_MOD_LK2, IF_REAL, "Length dependence of k2"),
|
||||
IOP( "lk3", BSIM3v32_MOD_LK3, IF_REAL, "Length dependence of k3"),
|
||||
IOP( "lk3b", BSIM3v32_MOD_LK3B, IF_REAL, "Length dependence of k3b"),
|
||||
IOP( "lw0", BSIM3v32_MOD_LW0, IF_REAL, "Length dependence of w0"),
|
||||
IOP( "lnlx", BSIM3v32_MOD_LNLX, IF_REAL, "Length dependence of nlx"),
|
||||
IOP( "ldvt0", BSIM3v32_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"),
|
||||
IOP( "ldvt1", BSIM3v32_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"),
|
||||
IOP( "ldvt2", BSIM3v32_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"),
|
||||
IOP( "ldvt0w", BSIM3v32_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"),
|
||||
IOP( "ldvt1w", BSIM3v32_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"),
|
||||
IOP( "ldvt2w", BSIM3v32_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"),
|
||||
IOP( "ldrout", BSIM3v32_MOD_LDROUT, IF_REAL, "Length dependence of drout"),
|
||||
IOP( "ldsub", BSIM3v32_MOD_LDSUB, IF_REAL, "Length dependence of dsub"),
|
||||
IOP( "lvth0", BSIM3v32_MOD_LVTH0, IF_REAL,"Length dependence of vto"),
|
||||
IOP( "lvtho", BSIM3v32_MOD_LVTH0, IF_REAL,"Length dependence of vto"),
|
||||
IOP( "lua", BSIM3v32_MOD_LUA, IF_REAL, "Length dependence of ua"),
|
||||
IOP( "lua1", BSIM3v32_MOD_LUA1, IF_REAL, "Length dependence of ua1"),
|
||||
IOP( "lub", BSIM3v32_MOD_LUB, IF_REAL, "Length dependence of ub"),
|
||||
IOP( "lub1", BSIM3v32_MOD_LUB1, IF_REAL, "Length dependence of ub1"),
|
||||
IOP( "luc", BSIM3v32_MOD_LUC, IF_REAL, "Length dependence of uc"),
|
||||
IOP( "luc1", BSIM3v32_MOD_LUC1, IF_REAL, "Length dependence of uc1"),
|
||||
IOP( "lu0", BSIM3v32_MOD_LU0, IF_REAL, "Length dependence of u0"),
|
||||
IOP( "lute", BSIM3v32_MOD_LUTE, IF_REAL, "Length dependence of ute"),
|
||||
IOP( "lvoff", BSIM3v32_MOD_LVOFF, IF_REAL, "Length dependence of voff"),
|
||||
IOP( "lelm", BSIM3v32_MOD_LELM, IF_REAL, "Length dependence of elm"),
|
||||
IOP( "ldelta", BSIM3v32_MOD_LDELTA, IF_REAL, "Length dependence of delta"),
|
||||
IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "),
|
||||
|
||||
IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "),
|
||||
IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "),
|
||||
|
||||
IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "),
|
||||
IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"),
|
||||
IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"),
|
||||
IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"),
|
||||
IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"),
|
||||
IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"),
|
||||
IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"),
|
||||
IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"),
|
||||
IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"),
|
||||
IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"),
|
||||
IOP( "lwr", BSIM3v32_MOD_LWR, IF_REAL, "Length dependence of wr"),
|
||||
IOP( "ldwg", BSIM3v32_MOD_LDWG, IF_REAL, "Length dependence of dwg"),
|
||||
IOP( "ldwb", BSIM3v32_MOD_LDWB, IF_REAL, "Length dependence of dwb"),
|
||||
IOP( "lb0", BSIM3v32_MOD_LB0, IF_REAL, "Length dependence of b0"),
|
||||
IOP( "lb1", BSIM3v32_MOD_LB1, IF_REAL, "Length dependence of b1"),
|
||||
IOP( "lcgsl", BSIM3v32_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"),
|
||||
IOP( "lcgdl", BSIM3v32_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"),
|
||||
IOP( "lckappa", BSIM3v32_MOD_LCKAPPA, IF_REAL, "Length dependence of ckappa"),
|
||||
IOP( "lcf", BSIM3v32_MOD_LCF, IF_REAL, "Length dependence of cf"),
|
||||
IOP( "lclc", BSIM3v32_MOD_LCLC, IF_REAL, "Length dependence of clc"),
|
||||
IOP( "lcle", BSIM3v32_MOD_LCLE, IF_REAL, "Length dependence of cle"),
|
||||
IOP( "lalpha0", BSIM3v32_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"),
|
||||
IOP( "lalpha1", BSIM3v32_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"),
|
||||
IOP( "lbeta0", BSIM3v32_MOD_LBETA0, IF_REAL, "Length dependence of beta0"),
|
||||
IOP( "lvfbcv", BSIM3v32_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"),
|
||||
IOP( "lvfb", BSIM3v32_MOD_LVFB, IF_REAL, "Length dependence of vfb"),
|
||||
IOP( "lacde", BSIM3v32_MOD_LACDE, IF_REAL, "Length dependence of acde"),
|
||||
IOP( "lmoin", BSIM3v32_MOD_LMOIN, IF_REAL, "Length dependence of moin"),
|
||||
IOP( "lnoff", BSIM3v32_MOD_LNOFF, IF_REAL, "Length dependence of noff"),
|
||||
IOP( "lvoffcv", BSIM3v32_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"),
|
||||
IOP( "wcdsc", BSIM3v32_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"),
|
||||
IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"),
|
||||
IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"),
|
||||
IOP( "wcit", BSIM3v32_MOD_WCIT, IF_REAL, "Width dependence of cit"),
|
||||
IOP( "wnfactor", BSIM3v32_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"),
|
||||
IOP( "wxj", BSIM3v32_MOD_WXJ, IF_REAL, "Width dependence of xj"),
|
||||
IOP( "wvsat", BSIM3v32_MOD_WVSAT, IF_REAL, "Width dependence of vsat"),
|
||||
IOP( "wat", BSIM3v32_MOD_WAT, IF_REAL, "Width dependence of at"),
|
||||
IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"),
|
||||
IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"),
|
||||
IOP( "wa1", BSIM3v32_MOD_WA1, IF_REAL, "Width dependence of a1"),
|
||||
IOP( "wa2", BSIM3v32_MOD_WA2, IF_REAL, "Width dependence of a2"),
|
||||
IOP( "wketa", BSIM3v32_MOD_WKETA, IF_REAL, "Width dependence of keta"),
|
||||
IOP( "wnsub", BSIM3v32_MOD_WNSUB, IF_REAL, "Width dependence of nsub"),
|
||||
IOP( "wnch", BSIM3v32_MOD_WNPEAK, IF_REAL, "Width dependence of nch"),
|
||||
IOP( "wngate", BSIM3v32_MOD_WNGATE, IF_REAL, "Width dependence of ngate"),
|
||||
IOP( "wgamma1", BSIM3v32_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"),
|
||||
IOP( "wgamma2", BSIM3v32_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"),
|
||||
IOP( "wvbx", BSIM3v32_MOD_WVBX, IF_REAL, "Width dependence of vbx"),
|
||||
IOP( "wvbm", BSIM3v32_MOD_WVBM, IF_REAL, "Width dependence of vbm"),
|
||||
IOP( "wxt", BSIM3v32_MOD_WXT, IF_REAL, "Width dependence of xt"),
|
||||
IOP( "wk1", BSIM3v32_MOD_WK1, IF_REAL, "Width dependence of k1"),
|
||||
IOP( "wkt1", BSIM3v32_MOD_WKT1, IF_REAL, "Width dependence of kt1"),
|
||||
IOP( "wkt1l", BSIM3v32_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"),
|
||||
IOP( "wkt2", BSIM3v32_MOD_WKT2, IF_REAL, "Width dependence of kt2"),
|
||||
IOP( "wk2", BSIM3v32_MOD_WK2, IF_REAL, "Width dependence of k2"),
|
||||
IOP( "wk3", BSIM3v32_MOD_WK3, IF_REAL, "Width dependence of k3"),
|
||||
IOP( "wk3b", BSIM3v32_MOD_WK3B, IF_REAL, "Width dependence of k3b"),
|
||||
IOP( "ww0", BSIM3v32_MOD_WW0, IF_REAL, "Width dependence of w0"),
|
||||
IOP( "wnlx", BSIM3v32_MOD_WNLX, IF_REAL, "Width dependence of nlx"),
|
||||
IOP( "wdvt0", BSIM3v32_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"),
|
||||
IOP( "wdvt1", BSIM3v32_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"),
|
||||
IOP( "wdvt2", BSIM3v32_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"),
|
||||
IOP( "wdvt0w", BSIM3v32_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"),
|
||||
IOP( "wdvt1w", BSIM3v32_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"),
|
||||
IOP( "wdvt2w", BSIM3v32_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"),
|
||||
IOP( "wdrout", BSIM3v32_MOD_WDROUT, IF_REAL, "Width dependence of drout"),
|
||||
IOP( "wdsub", BSIM3v32_MOD_WDSUB, IF_REAL, "Width dependence of dsub"),
|
||||
IOP( "wvth0", BSIM3v32_MOD_WVTH0, IF_REAL,"Width dependence of vto"),
|
||||
IOP( "wvtho", BSIM3v32_MOD_WVTH0, IF_REAL,"Width dependence of vto"),
|
||||
IOP( "wua", BSIM3v32_MOD_WUA, IF_REAL, "Width dependence of ua"),
|
||||
IOP( "wua1", BSIM3v32_MOD_WUA1, IF_REAL, "Width dependence of ua1"),
|
||||
IOP( "wub", BSIM3v32_MOD_WUB, IF_REAL, "Width dependence of ub"),
|
||||
IOP( "wub1", BSIM3v32_MOD_WUB1, IF_REAL, "Width dependence of ub1"),
|
||||
IOP( "wuc", BSIM3v32_MOD_WUC, IF_REAL, "Width dependence of uc"),
|
||||
IOP( "wuc1", BSIM3v32_MOD_WUC1, IF_REAL, "Width dependence of uc1"),
|
||||
IOP( "wu0", BSIM3v32_MOD_WU0, IF_REAL, "Width dependence of u0"),
|
||||
IOP( "wute", BSIM3v32_MOD_WUTE, IF_REAL, "Width dependence of ute"),
|
||||
IOP( "wvoff", BSIM3v32_MOD_WVOFF, IF_REAL, "Width dependence of voff"),
|
||||
IOP( "welm", BSIM3v32_MOD_WELM, IF_REAL, "Width dependence of elm"),
|
||||
IOP( "wdelta", BSIM3v32_MOD_WDELTA, IF_REAL, "Width dependence of delta"),
|
||||
IOP( "wrdsw", BSIM3v32_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "),
|
||||
|
||||
IOP( "wprwg", BSIM3v32_MOD_WPRWG, IF_REAL, "Width dependence of prwg "),
|
||||
IOP( "wprwb", BSIM3v32_MOD_WPRWB, IF_REAL, "Width dependence of prwb "),
|
||||
|
||||
IOP( "wprt", BSIM3v32_MOD_WPRT, IF_REAL, "Width dependence of prt"),
|
||||
IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"),
|
||||
IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"),
|
||||
IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"),
|
||||
IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"),
|
||||
IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"),
|
||||
IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"),
|
||||
IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"),
|
||||
IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"),
|
||||
IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"),
|
||||
IOP( "wwr", BSIM3v32_MOD_WWR, IF_REAL, "Width dependence of wr"),
|
||||
IOP( "wdwg", BSIM3v32_MOD_WDWG, IF_REAL, "Width dependence of dwg"),
|
||||
IOP( "wdwb", BSIM3v32_MOD_WDWB, IF_REAL, "Width dependence of dwb"),
|
||||
IOP( "wb0", BSIM3v32_MOD_WB0, IF_REAL, "Width dependence of b0"),
|
||||
IOP( "wb1", BSIM3v32_MOD_WB1, IF_REAL, "Width dependence of b1"),
|
||||
IOP( "wcgsl", BSIM3v32_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"),
|
||||
IOP( "wcgdl", BSIM3v32_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"),
|
||||
IOP( "wckappa", BSIM3v32_MOD_WCKAPPA, IF_REAL, "Width dependence of ckappa"),
|
||||
IOP( "wcf", BSIM3v32_MOD_WCF, IF_REAL, "Width dependence of cf"),
|
||||
IOP( "wclc", BSIM3v32_MOD_WCLC, IF_REAL, "Width dependence of clc"),
|
||||
IOP( "wcle", BSIM3v32_MOD_WCLE, IF_REAL, "Width dependence of cle"),
|
||||
IOP( "walpha0", BSIM3v32_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"),
|
||||
IOP( "walpha1", BSIM3v32_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"),
|
||||
IOP( "wbeta0", BSIM3v32_MOD_WBETA0, IF_REAL, "Width dependence of beta0"),
|
||||
IOP( "wvfbcv", BSIM3v32_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"),
|
||||
IOP( "wvfb", BSIM3v32_MOD_WVFB, IF_REAL, "Width dependence of vfb"),
|
||||
IOP( "wacde", BSIM3v32_MOD_WACDE, IF_REAL, "Width dependence of acde"),
|
||||
IOP( "wmoin", BSIM3v32_MOD_WMOIN, IF_REAL, "Width dependence of moin"),
|
||||
IOP( "wnoff", BSIM3v32_MOD_WNOFF, IF_REAL, "Width dependence of noff"),
|
||||
IOP( "wvoffcv", BSIM3v32_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"),
|
||||
|
||||
IOP( "pcdsc", BSIM3v32_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"),
|
||||
IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"),
|
||||
IOP( "pcdscd", BSIM3v32_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"),
|
||||
IOP( "pcit", BSIM3v32_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"),
|
||||
IOP( "pnfactor", BSIM3v32_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"),
|
||||
IOP( "pxj", BSIM3v32_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"),
|
||||
IOP( "pvsat", BSIM3v32_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"),
|
||||
IOP( "pat", BSIM3v32_MOD_PAT, IF_REAL, "Cross-term dependence of at"),
|
||||
IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"),
|
||||
IOP( "pags", BSIM3v32_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"),
|
||||
IOP( "pa1", BSIM3v32_MOD_PA1, IF_REAL, "Cross-term dependence of a1"),
|
||||
IOP( "pa2", BSIM3v32_MOD_PA2, IF_REAL, "Cross-term dependence of a2"),
|
||||
IOP( "pketa", BSIM3v32_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"),
|
||||
IOP( "pnsub", BSIM3v32_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"),
|
||||
IOP( "pnch", BSIM3v32_MOD_PNPEAK, IF_REAL, "Cross-term dependence of nch"),
|
||||
IOP( "pngate", BSIM3v32_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"),
|
||||
IOP( "pgamma1", BSIM3v32_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"),
|
||||
IOP( "pgamma2", BSIM3v32_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"),
|
||||
IOP( "pvbx", BSIM3v32_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"),
|
||||
IOP( "pvbm", BSIM3v32_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"),
|
||||
IOP( "pxt", BSIM3v32_MOD_PXT, IF_REAL, "Cross-term dependence of xt"),
|
||||
IOP( "pk1", BSIM3v32_MOD_PK1, IF_REAL, "Cross-term dependence of k1"),
|
||||
IOP( "pkt1", BSIM3v32_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"),
|
||||
IOP( "pkt1l", BSIM3v32_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"),
|
||||
IOP( "pkt2", BSIM3v32_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"),
|
||||
IOP( "pk2", BSIM3v32_MOD_PK2, IF_REAL, "Cross-term dependence of k2"),
|
||||
IOP( "pk3", BSIM3v32_MOD_PK3, IF_REAL, "Cross-term dependence of k3"),
|
||||
IOP( "pk3b", BSIM3v32_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"),
|
||||
IOP( "pw0", BSIM3v32_MOD_PW0, IF_REAL, "Cross-term dependence of w0"),
|
||||
IOP( "pnlx", BSIM3v32_MOD_PNLX, IF_REAL, "Cross-term dependence of nlx"),
|
||||
IOP( "pdvt0", BSIM3v32_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"),
|
||||
IOP( "pdvt1", BSIM3v32_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"),
|
||||
IOP( "pdvt2", BSIM3v32_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"),
|
||||
IOP( "pdvt0w", BSIM3v32_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"),
|
||||
IOP( "pdvt1w", BSIM3v32_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"),
|
||||
IOP( "pdvt2w", BSIM3v32_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"),
|
||||
IOP( "pdrout", BSIM3v32_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"),
|
||||
IOP( "pdsub", BSIM3v32_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"),
|
||||
IOP( "pvth0", BSIM3v32_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"),
|
||||
IOP( "pvtho", BSIM3v32_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"),
|
||||
IOP( "pua", BSIM3v32_MOD_PUA, IF_REAL, "Cross-term dependence of ua"),
|
||||
IOP( "pua1", BSIM3v32_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"),
|
||||
IOP( "pub", BSIM3v32_MOD_PUB, IF_REAL, "Cross-term dependence of ub"),
|
||||
IOP( "pub1", BSIM3v32_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"),
|
||||
IOP( "puc", BSIM3v32_MOD_PUC, IF_REAL, "Cross-term dependence of uc"),
|
||||
IOP( "puc1", BSIM3v32_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"),
|
||||
IOP( "pu0", BSIM3v32_MOD_PU0, IF_REAL, "Cross-term dependence of u0"),
|
||||
IOP( "pute", BSIM3v32_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"),
|
||||
IOP( "pvoff", BSIM3v32_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"),
|
||||
IOP( "pelm", BSIM3v32_MOD_PELM, IF_REAL, "Cross-term dependence of elm"),
|
||||
IOP( "pdelta", BSIM3v32_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"),
|
||||
IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "),
|
||||
|
||||
IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "),
|
||||
IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "),
|
||||
|
||||
IOP( "pprt", BSIM3v32_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "),
|
||||
IOP( "peta0", BSIM3v32_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"),
|
||||
IOP( "petab", BSIM3v32_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"),
|
||||
IOP( "ppclm", BSIM3v32_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"),
|
||||
IOP( "ppdiblc1", BSIM3v32_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"),
|
||||
IOP( "ppdiblc2", BSIM3v32_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"),
|
||||
IOP( "ppdiblcb", BSIM3v32_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"),
|
||||
IOP( "ppscbe1", BSIM3v32_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"),
|
||||
IOP( "ppscbe2", BSIM3v32_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"),
|
||||
IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"),
|
||||
IOP( "pwr", BSIM3v32_MOD_PWR, IF_REAL, "Cross-term dependence of wr"),
|
||||
IOP( "pdwg", BSIM3v32_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"),
|
||||
IOP( "pdwb", BSIM3v32_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"),
|
||||
IOP( "pb0", BSIM3v32_MOD_PB0, IF_REAL, "Cross-term dependence of b0"),
|
||||
IOP( "pb1", BSIM3v32_MOD_PB1, IF_REAL, "Cross-term dependence of b1"),
|
||||
IOP( "pcgsl", BSIM3v32_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"),
|
||||
IOP( "pcgdl", BSIM3v32_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"),
|
||||
IOP( "pckappa", BSIM3v32_MOD_PCKAPPA, IF_REAL, "Cross-term dependence of ckappa"),
|
||||
IOP( "pcf", BSIM3v32_MOD_PCF, IF_REAL, "Cross-term dependence of cf"),
|
||||
IOP( "pclc", BSIM3v32_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"),
|
||||
IOP( "pcle", BSIM3v32_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"),
|
||||
IOP( "palpha0", BSIM3v32_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"),
|
||||
IOP( "palpha1", BSIM3v32_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"),
|
||||
IOP( "pbeta0", BSIM3v32_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"),
|
||||
IOP( "pvfbcv", BSIM3v32_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"),
|
||||
IOP( "pvfb", BSIM3v32_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"),
|
||||
IOP( "pacde", BSIM3v32_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"),
|
||||
IOP( "pmoin", BSIM3v32_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"),
|
||||
IOP( "pnoff", BSIM3v32_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"),
|
||||
IOP( "pvoffcv", BSIM3v32_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"),
|
||||
|
||||
IOP( "noia", BSIM3v32_MOD_NOIA, IF_REAL, "Flicker noise parameter"),
|
||||
IOP( "noib", BSIM3v32_MOD_NOIB, IF_REAL, "Flicker noise parameter"),
|
||||
IOP( "noic", BSIM3v32_MOD_NOIC, IF_REAL, "Flicker noise parameter"),
|
||||
IOP( "em", BSIM3v32_MOD_EM, IF_REAL, "Flicker noise parameter"),
|
||||
IOP( "ef", BSIM3v32_MOD_EF, IF_REAL, "Flicker noise frequency exponent"),
|
||||
IOP( "af", BSIM3v32_MOD_AF, IF_REAL, "Flicker noise exponent"),
|
||||
IOP( "kf", BSIM3v32_MOD_KF, IF_REAL, "Flicker noise coefficient"),
|
||||
|
||||
IP( "nmos", BSIM3v32_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"),
|
||||
IP( "pmos", BSIM3v32_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"),
|
||||
};
|
||||
|
||||
char *BSIM3v32names[] = {
|
||||
"Drain",
|
||||
"Gate",
|
||||
"Source",
|
||||
"Bulk",
|
||||
"Charge"
|
||||
};
|
||||
|
||||
int BSIM3v32nSize = NUMELEMS(BSIM3v32names);
|
||||
int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable);
|
||||
int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable);
|
||||
int BSIM3v32iSize = sizeof(BSIM3v32instance);
|
||||
int BSIM3v32mSize = sizeof(BSIM3v32model);
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,364 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3acld.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "cktdefs.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM3v32acLoad (GENmodel *inModel, CKTcircuit *ckt)
|
||||
{
|
||||
BSIM3v32model *model = (BSIM3v32model*)inModel;
|
||||
BSIM3v32instance *here;
|
||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
||||
double GSoverlapCap, GDoverlapCap, GBoverlapCap, FwdSum, RevSum, Gm, Gmbs;
|
||||
double dxpart, sxpart, xgtg, xgtd, xgts, xgtb;
|
||||
double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0;
|
||||
double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
|
||||
double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
|
||||
double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs;
|
||||
double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs;
|
||||
double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
|
||||
double ScalingFactor = 1.0e-9;
|
||||
double m;
|
||||
|
||||
omega = ckt->CKTomega;
|
||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||
{ for (here = model->BSIM3v32instances; here!= NULL;
|
||||
here = here->BSIM3v32nextInstance)
|
||||
{
|
||||
if (here->BSIM3v32owner != ARCHme)
|
||||
continue;
|
||||
|
||||
if (here->BSIM3v32mode >= 0)
|
||||
{ Gm = here->BSIM3v32gm;
|
||||
Gmbs = here->BSIM3v32gmbs;
|
||||
FwdSum = Gm + Gmbs;
|
||||
RevSum = 0.0;
|
||||
|
||||
gbbdp = -here->BSIM3v32gbds;
|
||||
gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
|
||||
|
||||
gbdpg = here->BSIM3v32gbgs;
|
||||
gbdpb = here->BSIM3v32gbbs;
|
||||
gbdpdp = here->BSIM3v32gbds;
|
||||
gbdpsp = -(gbdpg + gbdpb + gbdpdp);
|
||||
|
||||
gbspdp = 0.0;
|
||||
gbspg = 0.0;
|
||||
gbspb = 0.0;
|
||||
gbspsp = 0.0;
|
||||
|
||||
if (here->BSIM3v32nqsMod == 0)
|
||||
{ cggb = here->BSIM3v32cggb;
|
||||
cgsb = here->BSIM3v32cgsb;
|
||||
cgdb = here->BSIM3v32cgdb;
|
||||
|
||||
cbgb = here->BSIM3v32cbgb;
|
||||
cbsb = here->BSIM3v32cbsb;
|
||||
cbdb = here->BSIM3v32cbdb;
|
||||
|
||||
cdgb = here->BSIM3v32cdgb;
|
||||
cdsb = here->BSIM3v32cdsb;
|
||||
cddb = here->BSIM3v32cddb;
|
||||
|
||||
xgtg = xgtd = xgts = xgtb = 0.0;
|
||||
sxpart = 0.6;
|
||||
dxpart = 0.4;
|
||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||
= ddxpart_dVs = 0.0;
|
||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||
= dsxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ cggb = cgdb = cgsb = 0.0;
|
||||
cbgb = cbdb = cbsb = 0.0;
|
||||
cdgb = cddb = cdsb = 0.0;
|
||||
|
||||
xgtg = here->BSIM3v32gtg;
|
||||
xgtd = here->BSIM3v32gtd;
|
||||
xgts = here->BSIM3v32gts;
|
||||
xgtb = here->BSIM3v32gtb;
|
||||
|
||||
xcqgb = here->BSIM3v32cqgb * omega;
|
||||
xcqdb = here->BSIM3v32cqdb * omega;
|
||||
xcqsb = here->BSIM3v32cqsb * omega;
|
||||
xcqbb = here->BSIM3v32cqbb * omega;
|
||||
|
||||
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
||||
* here->pParam->BSIM3v32leffCV;
|
||||
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
||||
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
||||
{ if (model->BSIM3v32xpart < 0.5)
|
||||
{ dxpart = 0.4;
|
||||
}
|
||||
else if (model->BSIM3v32xpart > 0.5)
|
||||
{ dxpart = 0.0;
|
||||
}
|
||||
else
|
||||
{ dxpart = 0.5;
|
||||
}
|
||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||
= ddxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ dxpart = here->BSIM3v32qdrn / qcheq;
|
||||
Cdd = here->BSIM3v32cddb;
|
||||
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
||||
+ here->BSIM3v32cbdb);
|
||||
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
|
||||
Cdg = here->BSIM3v32cdgb;
|
||||
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
||||
+ here->BSIM3v32cbgb);
|
||||
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
|
||||
|
||||
Cds = here->BSIM3v32cdsb;
|
||||
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
||||
+ here->BSIM3v32cbsb);
|
||||
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
|
||||
|
||||
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
|
||||
+ ddxpart_dVs);
|
||||
}
|
||||
sxpart = 1.0 - dxpart;
|
||||
dsxpart_dVd = -ddxpart_dVd;
|
||||
dsxpart_dVg = -ddxpart_dVg;
|
||||
dsxpart_dVs = -ddxpart_dVs;
|
||||
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ Gm = -here->BSIM3v32gm;
|
||||
Gmbs = -here->BSIM3v32gmbs;
|
||||
FwdSum = 0.0;
|
||||
RevSum = -(Gm + Gmbs);
|
||||
|
||||
gbbsp = -here->BSIM3v32gbds;
|
||||
gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
|
||||
|
||||
gbdpg = 0.0;
|
||||
gbdpsp = 0.0;
|
||||
gbdpb = 0.0;
|
||||
gbdpdp = 0.0;
|
||||
|
||||
gbspg = here->BSIM3v32gbgs;
|
||||
gbspsp = here->BSIM3v32gbds;
|
||||
gbspb = here->BSIM3v32gbbs;
|
||||
gbspdp = -(gbspg + gbspsp + gbspb);
|
||||
|
||||
if (here->BSIM3v32nqsMod == 0)
|
||||
{ cggb = here->BSIM3v32cggb;
|
||||
cgsb = here->BSIM3v32cgdb;
|
||||
cgdb = here->BSIM3v32cgsb;
|
||||
|
||||
cbgb = here->BSIM3v32cbgb;
|
||||
cbsb = here->BSIM3v32cbdb;
|
||||
cbdb = here->BSIM3v32cbsb;
|
||||
|
||||
cdgb = -(here->BSIM3v32cdgb + cggb + cbgb);
|
||||
cdsb = -(here->BSIM3v32cddb + cgsb + cbsb);
|
||||
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
|
||||
|
||||
xgtg = xgtd = xgts = xgtb = 0.0;
|
||||
sxpart = 0.4;
|
||||
dxpart = 0.6;
|
||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||
= ddxpart_dVs = 0.0;
|
||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||
= dsxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ cggb = cgdb = cgsb = 0.0;
|
||||
cbgb = cbdb = cbsb = 0.0;
|
||||
cdgb = cddb = cdsb = 0.0;
|
||||
|
||||
xgtg = here->BSIM3v32gtg;
|
||||
xgtd = here->BSIM3v32gts;
|
||||
xgts = here->BSIM3v32gtd;
|
||||
xgtb = here->BSIM3v32gtb;
|
||||
|
||||
xcqgb = here->BSIM3v32cqgb * omega;
|
||||
xcqdb = here->BSIM3v32cqsb * omega;
|
||||
xcqsb = here->BSIM3v32cqdb * omega;
|
||||
xcqbb = here->BSIM3v32cqbb * omega;
|
||||
|
||||
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
||||
* here->pParam->BSIM3v32leffCV;
|
||||
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
||||
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
||||
{ if (model->BSIM3v32xpart < 0.5)
|
||||
{ sxpart = 0.4;
|
||||
}
|
||||
else if (model->BSIM3v32xpart > 0.5)
|
||||
{ sxpart = 0.0;
|
||||
}
|
||||
else
|
||||
{ sxpart = 0.5;
|
||||
}
|
||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||
= dsxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ sxpart = here->BSIM3v32qdrn / qcheq;
|
||||
Css = here->BSIM3v32cddb;
|
||||
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
||||
+ here->BSIM3v32cbdb);
|
||||
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
|
||||
Csg = here->BSIM3v32cdgb;
|
||||
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
||||
+ here->BSIM3v32cbgb);
|
||||
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
|
||||
|
||||
Csd = here->BSIM3v32cdsb;
|
||||
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
||||
+ here->BSIM3v32cbsb);
|
||||
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
|
||||
|
||||
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
|
||||
+ dsxpart_dVs);
|
||||
}
|
||||
dxpart = 1.0 - sxpart;
|
||||
ddxpart_dVd = -dsxpart_dVd;
|
||||
ddxpart_dVg = -dsxpart_dVg;
|
||||
ddxpart_dVs = -dsxpart_dVs;
|
||||
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
|
||||
}
|
||||
}
|
||||
|
||||
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
|
||||
gdpr = here->BSIM3v32drainConductance;
|
||||
gspr = here->BSIM3v32sourceConductance;
|
||||
gds = here->BSIM3v32gds;
|
||||
gbd = here->BSIM3v32gbd;
|
||||
gbs = here->BSIM3v32gbs;
|
||||
capbd = here->BSIM3v32capbd;
|
||||
capbs = here->BSIM3v32capbs;
|
||||
|
||||
GSoverlapCap = here->BSIM3v32cgso;
|
||||
GDoverlapCap = here->BSIM3v32cgdo;
|
||||
GBoverlapCap = here->pParam->BSIM3v32cgbo;
|
||||
|
||||
xcdgb = (cdgb - GDoverlapCap) * omega;
|
||||
xcddb = (cddb + capbd + GDoverlapCap) * omega;
|
||||
xcdsb = cdsb * omega;
|
||||
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap) * omega;
|
||||
xcsdb = -(cgdb + cbdb + cddb) * omega;
|
||||
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega;
|
||||
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap)
|
||||
* omega;
|
||||
xcgdb = (cgdb - GDoverlapCap ) * omega;
|
||||
xcgsb = (cgsb - GSoverlapCap) * omega;
|
||||
xcbgb = (cbgb - GBoverlapCap) * omega;
|
||||
xcbdb = (cbdb - capbd ) * omega;
|
||||
xcbsb = (cbsb - capbs ) * omega;
|
||||
|
||||
m = here->BSIM3v32m;
|
||||
|
||||
*(here->BSIM3v32GgPtr + 1) += m * xcggb;
|
||||
*(here->BSIM3v32BbPtr + 1) -=
|
||||
m * (xcbgb + xcbdb + xcbsb);
|
||||
*(here->BSIM3v32DPdpPtr + 1) += m * xcddb;
|
||||
*(here->BSIM3v32SPspPtr + 1) += m * xcssb;
|
||||
*(here->BSIM3v32GbPtr + 1) -=
|
||||
m * (xcggb + xcgdb + xcgsb);
|
||||
*(here->BSIM3v32GdpPtr + 1) += m * xcgdb;
|
||||
*(here->BSIM3v32GspPtr + 1) += m * xcgsb;
|
||||
*(here->BSIM3v32BgPtr + 1) += m * xcbgb;
|
||||
*(here->BSIM3v32BdpPtr + 1) += m * xcbdb;
|
||||
*(here->BSIM3v32BspPtr + 1) += m * xcbsb;
|
||||
*(here->BSIM3v32DPgPtr + 1) += m * xcdgb;
|
||||
*(here->BSIM3v32DPbPtr + 1) -=
|
||||
m * (xcdgb + xcddb + xcdsb);
|
||||
*(here->BSIM3v32DPspPtr + 1) += m * xcdsb;
|
||||
*(here->BSIM3v32SPgPtr + 1) += m * xcsgb;
|
||||
*(here->BSIM3v32SPbPtr + 1) -=
|
||||
m * (xcsgb + xcsdb + xcssb);
|
||||
*(here->BSIM3v32SPdpPtr + 1) += m * xcsdb;
|
||||
|
||||
*(here->BSIM3v32DdPtr) += m * gdpr;
|
||||
*(here->BSIM3v32SsPtr) += m * gspr;
|
||||
*(here->BSIM3v32BbPtr) +=
|
||||
m * (gbd + gbs - here->BSIM3v32gbbs);
|
||||
*(here->BSIM3v32DPdpPtr) +=
|
||||
m * (gdpr + gds + gbd + RevSum +
|
||||
dxpart * xgtd + T1 * ddxpart_dVd +
|
||||
gbdpdp);
|
||||
*(here->BSIM3v32SPspPtr) +=
|
||||
m * (gspr + gds + gbs + FwdSum +
|
||||
sxpart * xgts + T1 * dsxpart_dVs +
|
||||
gbspsp);
|
||||
|
||||
*(here->BSIM3v32DdpPtr) -= m * gdpr;
|
||||
*(here->BSIM3v32SspPtr) -= m * gspr;
|
||||
|
||||
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
|
||||
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
|
||||
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
|
||||
|
||||
*(here->BSIM3v32DPdPtr) -= m * gdpr;
|
||||
*(here->BSIM3v32DPgPtr) +=
|
||||
m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg +
|
||||
gbdpg);
|
||||
*(here->BSIM3v32DPbPtr) -=
|
||||
m * (gbd - Gmbs - dxpart * xgtb -
|
||||
T1 * ddxpart_dVb - gbdpb);
|
||||
*(here->BSIM3v32DPspPtr) -=
|
||||
m * (gds + FwdSum - dxpart * xgts -
|
||||
T1 * ddxpart_dVs - gbdpsp);
|
||||
|
||||
*(here->BSIM3v32SPgPtr) -=
|
||||
m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg -
|
||||
gbspg);
|
||||
*(here->BSIM3v32SPsPtr) -= m * gspr;
|
||||
*(here->BSIM3v32SPbPtr) -=
|
||||
m * (gbs + Gmbs - sxpart * xgtb -
|
||||
T1 * dsxpart_dVb - gbspb);
|
||||
*(here->BSIM3v32SPdpPtr) -=
|
||||
m * (gds + RevSum - sxpart * xgtd -
|
||||
T1 * dsxpart_dVd - gbspdp);
|
||||
|
||||
*(here->BSIM3v32GgPtr) -= m * xgtg;
|
||||
*(here->BSIM3v32GbPtr) -= m * xgtb;
|
||||
*(here->BSIM3v32GdpPtr) -= m * xgtd;
|
||||
*(here->BSIM3v32GspPtr) -= m * xgts;
|
||||
|
||||
if (here->BSIM3v32nqsMod)
|
||||
{
|
||||
*(here->BSIM3v32QqPtr + 1) +=
|
||||
m * omega * ScalingFactor;
|
||||
*(here->BSIM3v32QgPtr + 1) -= m * xcqgb;
|
||||
*(here->BSIM3v32QdpPtr + 1) -= m * xcqdb;
|
||||
*(here->BSIM3v32QspPtr + 1) -= m * xcqsb;
|
||||
*(here->BSIM3v32QbPtr + 1) -= m * xcqbb;
|
||||
|
||||
*(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau;
|
||||
|
||||
*(here->BSIM3v32DPqPtr) +=
|
||||
m * (dxpart * here->BSIM3v32gtau);
|
||||
*(here->BSIM3v32SPqPtr) +=
|
||||
m * (sxpart * here->BSIM3v32gtau);
|
||||
*(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau;
|
||||
|
||||
*(here->BSIM3v32QgPtr) += m * xgtg;
|
||||
*(here->BSIM3v32QdpPtr) += m * xgtd;
|
||||
*(here->BSIM3v32QspPtr) += m * xgts;
|
||||
*(here->BSIM3v32QbPtr) += m * xgtb;
|
||||
}
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,226 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3ask.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified bt Paolo Nenzi 2002 and Dietmar Warning 2003
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "ifsim.h"
|
||||
#include "cktdefs.h"
|
||||
#include "devdefs.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
|
||||
IFvalue *select)
|
||||
{
|
||||
BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||
|
||||
switch(which)
|
||||
{ case BSIM3v32_L:
|
||||
value->rValue = here->BSIM3v32l;
|
||||
return(OK);
|
||||
case BSIM3v32_W:
|
||||
value->rValue = here->BSIM3v32w;
|
||||
return(OK);
|
||||
case BSIM3v32_M:
|
||||
value->rValue = here->BSIM3v32m;
|
||||
return (OK);
|
||||
case BSIM3v32_AS:
|
||||
value->rValue = here->BSIM3v32sourceArea;
|
||||
return(OK);
|
||||
case BSIM3v32_AD:
|
||||
value->rValue = here->BSIM3v32drainArea;
|
||||
return(OK);
|
||||
case BSIM3v32_PS:
|
||||
value->rValue = here->BSIM3v32sourcePerimeter;
|
||||
return(OK);
|
||||
case BSIM3v32_PD:
|
||||
value->rValue = here->BSIM3v32drainPerimeter;
|
||||
return(OK);
|
||||
case BSIM3v32_NRS:
|
||||
value->rValue = here->BSIM3v32sourceSquares;
|
||||
return(OK);
|
||||
case BSIM3v32_NRD:
|
||||
value->rValue = here->BSIM3v32drainSquares;
|
||||
return(OK);
|
||||
case BSIM3v32_OFF:
|
||||
value->rValue = here->BSIM3v32off;
|
||||
return(OK);
|
||||
case BSIM3v32_NQSMOD:
|
||||
value->iValue = here->BSIM3v32nqsMod;
|
||||
return(OK);
|
||||
case BSIM3v32_IC_VBS:
|
||||
value->rValue = here->BSIM3v32icVBS;
|
||||
return(OK);
|
||||
case BSIM3v32_IC_VDS:
|
||||
value->rValue = here->BSIM3v32icVDS;
|
||||
return(OK);
|
||||
case BSIM3v32_IC_VGS:
|
||||
value->rValue = here->BSIM3v32icVGS;
|
||||
return(OK);
|
||||
case BSIM3v32_DNODE:
|
||||
value->iValue = here->BSIM3v32dNode;
|
||||
return(OK);
|
||||
case BSIM3v32_GNODE:
|
||||
value->iValue = here->BSIM3v32gNode;
|
||||
return(OK);
|
||||
case BSIM3v32_SNODE:
|
||||
value->iValue = here->BSIM3v32sNode;
|
||||
return(OK);
|
||||
case BSIM3v32_BNODE:
|
||||
value->iValue = here->BSIM3v32bNode;
|
||||
return(OK);
|
||||
case BSIM3v32_DNODEPRIME:
|
||||
value->iValue = here->BSIM3v32dNodePrime;
|
||||
return(OK);
|
||||
case BSIM3v32_SNODEPRIME:
|
||||
value->iValue = here->BSIM3v32sNodePrime;
|
||||
return(OK);
|
||||
case BSIM3v32_SOURCECONDUCT:
|
||||
value->rValue = here->BSIM3v32sourceConductance;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_DRAINCONDUCT:
|
||||
value->rValue = here->BSIM3v32drainConductance;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_VBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd);
|
||||
return(OK);
|
||||
case BSIM3v32_VBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbs);
|
||||
return(OK);
|
||||
case BSIM3v32_VGS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vgs);
|
||||
return(OK);
|
||||
case BSIM3v32_VDS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vds);
|
||||
return(OK);
|
||||
case BSIM3v32_CD:
|
||||
value->rValue = here->BSIM3v32cd;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CBS:
|
||||
value->rValue = here->BSIM3v32cbs;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CBD:
|
||||
value->rValue = here->BSIM3v32cbd;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_GM:
|
||||
value->rValue = here->BSIM3v32gm;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_GDS:
|
||||
value->rValue = here->BSIM3v32gds;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_GMBS:
|
||||
value->rValue = here->BSIM3v32gmbs;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_GBD:
|
||||
value->rValue = here->BSIM3v32gbd;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_GBS:
|
||||
value->rValue = here->BSIM3v32gbs;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_QB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CQB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_QG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CQG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_QD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CQD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CGG:
|
||||
value->rValue = here->BSIM3v32cggb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CGD:
|
||||
value->rValue = here->BSIM3v32cgdb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CGS:
|
||||
value->rValue = here->BSIM3v32cgsb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CDG:
|
||||
value->rValue = here->BSIM3v32cdgb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CDD:
|
||||
value->rValue = here->BSIM3v32cddb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CDS:
|
||||
value->rValue = here->BSIM3v32cdsb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CBG:
|
||||
value->rValue = here->BSIM3v32cbgb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CBDB:
|
||||
value->rValue = here->BSIM3v32cbdb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CBSB:
|
||||
value->rValue = here->BSIM3v32cbsb;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CAPBD:
|
||||
value->rValue = here->BSIM3v32capbd;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_CAPBS:
|
||||
value->rValue = here->BSIM3v32capbs;
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_VON:
|
||||
value->rValue = here->BSIM3v32von;
|
||||
return(OK);
|
||||
case BSIM3v32_VDSAT:
|
||||
value->rValue = here->BSIM3v32vdsat;
|
||||
return(OK);
|
||||
case BSIM3v32_QBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
case BSIM3v32_QBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd);
|
||||
value->rValue *= here->BSIM3v32m;
|
||||
return(OK);
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
}
|
||||
/* NOTREACHED */
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,449 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3check.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Xuemei Xi, 10/05, 12/14, 2001.
|
||||
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "cktdefs.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "trandefs.h"
|
||||
#include "const.h"
|
||||
#include "sperror.h"
|
||||
#include "devdefs.h"
|
||||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM3v32checkModel (BSIM3v32model *model, BSIM3v32instance *here, CKTcircuit *ckt)
|
||||
{
|
||||
struct bsim3SizeDependParam *pParam;
|
||||
int Fatal_Flag = 0;
|
||||
FILE *fplog;
|
||||
|
||||
if ((fplog = fopen("b3v3check.log", "w")) != NULL)
|
||||
{ pParam = here->pParam;
|
||||
|
||||
fprintf (fplog,
|
||||
"BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n");
|
||||
fprintf (fplog, "Parameter Checking.\n");
|
||||
fprintf (fplog, "Model = %s\n", model->BSIM3v32modName);
|
||||
fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w,
|
||||
here->BSIM3v32l, here->BSIM3v32m);
|
||||
|
||||
if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24"))
|
||||
&& (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23"))
|
||||
&& (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22"))
|
||||
&& (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20")))
|
||||
{
|
||||
fprintf (fplog,
|
||||
"Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
|
||||
fprintf (fplog,
|
||||
"You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
|
||||
printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
|
||||
printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff)
|
||||
{ fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n",
|
||||
pParam->BSIM3v32nlx);
|
||||
printf("Fatal: Nlx = %g is less than -Leff.\n",
|
||||
pParam->BSIM3v32nlx);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (model->BSIM3v32tox <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Tox = %g is not positive.\n",
|
||||
model->BSIM3v32tox);
|
||||
printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (model->BSIM3v32toxm <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Toxm = %g is not positive.\n",
|
||||
model->BSIM3v32toxm);
|
||||
printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32npeak <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Nch = %g is not positive.\n",
|
||||
pParam->BSIM3v32npeak);
|
||||
printf("Fatal: Nch = %g is not positive.\n",
|
||||
pParam->BSIM3v32npeak);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
if (pParam->BSIM3v32nsub <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Nsub = %g is not positive.\n",
|
||||
pParam->BSIM3v32nsub);
|
||||
printf("Fatal: Nsub = %g is not positive.\n",
|
||||
pParam->BSIM3v32nsub);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
if (pParam->BSIM3v32ngate < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Ngate = %g is not positive.\n",
|
||||
pParam->BSIM3v32ngate);
|
||||
printf("Fatal: Ngate = %g Ngate is not positive.\n",
|
||||
pParam->BSIM3v32ngate);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
if (pParam->BSIM3v32ngate > 1.e25)
|
||||
{ fprintf(fplog, "Fatal: Ngate = %g is too high.\n",
|
||||
pParam->BSIM3v32ngate);
|
||||
printf("Fatal: Ngate = %g Ngate is too high\n",
|
||||
pParam->BSIM3v32ngate);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
if (pParam->BSIM3v32xj <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Xj = %g is not positive.\n",
|
||||
pParam->BSIM3v32xj);
|
||||
printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32dvt1 < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n",
|
||||
pParam->BSIM3v32dvt1);
|
||||
printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32dvt1w < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n",
|
||||
pParam->BSIM3v32dvt1w);
|
||||
printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff)
|
||||
{ fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
|
||||
printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32dsub < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
|
||||
printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff)
|
||||
{ fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
|
||||
printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
if (pParam->BSIM3v32u0temp <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp);
|
||||
printf("Fatal: u0 at current temperature = %g is not positive.\n",
|
||||
pParam->BSIM3v32u0temp);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
/* Check delta parameter */
|
||||
if (pParam->BSIM3v32delta < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Delta = %g is less than zero.\n",
|
||||
pParam->BSIM3v32delta);
|
||||
printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32vsattemp <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp);
|
||||
printf("Fatal: Vsat at current temperature = %g is not positive.\n",
|
||||
pParam->BSIM3v32vsattemp);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
/* Check Rout parameters */
|
||||
if (pParam->BSIM3v32pclm <= 0.0)
|
||||
{ fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
|
||||
printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32drout < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
|
||||
printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32pscbe2 <= 0.0)
|
||||
{ fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n",
|
||||
pParam->BSIM3v32pscbe2);
|
||||
printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2);
|
||||
}
|
||||
|
||||
/* acm model */
|
||||
if (model->BSIM3v32acmMod == 0) {
|
||||
if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 ||
|
||||
model->BSIM3v32unitLengthGateSidewallJctCap > 0.0)
|
||||
{
|
||||
if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
|
||||
{ fprintf(fplog, "Warning: Pd = %g is less than W.\n",
|
||||
here->BSIM3v32drainPerimeter);
|
||||
printf("Warning: Pd = %g is less than W.\n",
|
||||
here->BSIM3v32drainPerimeter);
|
||||
}
|
||||
if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
|
||||
{ fprintf(fplog, "Warning: Ps = %g is less than W.\n",
|
||||
here->BSIM3v32sourcePerimeter);
|
||||
printf("Warning: Ps = %g is less than W.\n",
|
||||
here->BSIM3v32sourcePerimeter);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32noff < 0.1)
|
||||
{ fprintf(fplog, "Warning: Noff = %g is too small.\n",
|
||||
pParam->BSIM3v32noff);
|
||||
printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff);
|
||||
}
|
||||
if (pParam->BSIM3v32noff > 4.0)
|
||||
{ fprintf(fplog, "Warning: Noff = %g is too large.\n",
|
||||
pParam->BSIM3v32noff);
|
||||
printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32voffcv < -0.5)
|
||||
{ fprintf(fplog, "Warning: Voffcv = %g is too small.\n",
|
||||
pParam->BSIM3v32voffcv);
|
||||
printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv);
|
||||
}
|
||||
if (pParam->BSIM3v32voffcv > 0.5)
|
||||
{ fprintf(fplog, "Warning: Voffcv = %g is too large.\n",
|
||||
pParam->BSIM3v32voffcv);
|
||||
printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv);
|
||||
}
|
||||
|
||||
if (model->BSIM3v32ijth < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n",
|
||||
model->BSIM3v32ijth);
|
||||
printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
/* Check capacitance parameters */
|
||||
if (pParam->BSIM3v32clc < 0.0)
|
||||
{ fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
|
||||
printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
|
||||
Fatal_Flag = 1;
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32moin < 5.0)
|
||||
{ fprintf(fplog, "Warning: Moin = %g is too small.\n",
|
||||
pParam->BSIM3v32moin);
|
||||
printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin);
|
||||
}
|
||||
if (pParam->BSIM3v32moin > 25.0)
|
||||
{ fprintf(fplog, "Warning: Moin = %g is too large.\n",
|
||||
pParam->BSIM3v32moin);
|
||||
printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin);
|
||||
}
|
||||
|
||||
if(model->BSIM3v32capMod ==3) {
|
||||
if (pParam->BSIM3v32acde < 0.4)
|
||||
{ fprintf(fplog, "Warning: Acde = %g is too small.\n",
|
||||
pParam->BSIM3v32acde);
|
||||
printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde);
|
||||
}
|
||||
if (pParam->BSIM3v32acde > 1.6)
|
||||
{ fprintf(fplog, "Warning: Acde = %g is too large.\n",
|
||||
pParam->BSIM3v32acde);
|
||||
printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde);
|
||||
}
|
||||
}
|
||||
|
||||
if (model->BSIM3v32paramChk ==1)
|
||||
{
|
||||
/* Check L and W parameters */
|
||||
if (pParam->BSIM3v32leff <= 5.0e-8)
|
||||
{ fprintf(fplog, "Warning: Leff = %g may be too small.\n",
|
||||
pParam->BSIM3v32leff);
|
||||
printf("Warning: Leff = %g may be too small.\n",
|
||||
pParam->BSIM3v32leff);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32leffCV <= 5.0e-8)
|
||||
{ fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n",
|
||||
pParam->BSIM3v32leffCV);
|
||||
printf("Warning: Leff for CV = %g may be too small.\n",
|
||||
pParam->BSIM3v32leffCV);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32weff <= 1.0e-7)
|
||||
{ fprintf(fplog, "Warning: Weff = %g may be too small.\n",
|
||||
pParam->BSIM3v32weff);
|
||||
printf("Warning: Weff = %g may be too small.\n",
|
||||
pParam->BSIM3v32weff);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32weffCV <= 1.0e-7)
|
||||
{ fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n",
|
||||
pParam->BSIM3v32weffCV);
|
||||
printf("Warning: Weff for CV = %g may be too small.\n",
|
||||
pParam->BSIM3v32weffCV);
|
||||
}
|
||||
|
||||
/* Check threshold voltage parameters */
|
||||
if (pParam->BSIM3v32nlx < 0.0)
|
||||
{ fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
|
||||
printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
|
||||
}
|
||||
if (model->BSIM3v32tox < 1.0e-9)
|
||||
{ fprintf(fplog, "Warning: Tox = %g is less than 10A.\n",
|
||||
model->BSIM3v32tox);
|
||||
printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32npeak <= 1.0e15)
|
||||
{ fprintf(fplog, "Warning: Nch = %g may be too small.\n",
|
||||
pParam->BSIM3v32npeak);
|
||||
printf("Warning: Nch = %g may be too small.\n",
|
||||
pParam->BSIM3v32npeak);
|
||||
}
|
||||
else if (pParam->BSIM3v32npeak >= 1.0e21)
|
||||
{ fprintf(fplog, "Warning: Nch = %g may be too large.\n",
|
||||
pParam->BSIM3v32npeak);
|
||||
printf("Warning: Nch = %g may be too large.\n",
|
||||
pParam->BSIM3v32npeak);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32nsub <= 1.0e14)
|
||||
{ fprintf(fplog, "Warning: Nsub = %g may be too small.\n",
|
||||
pParam->BSIM3v32nsub);
|
||||
printf("Warning: Nsub = %g may be too small.\n",
|
||||
pParam->BSIM3v32nsub);
|
||||
}
|
||||
else if (pParam->BSIM3v32nsub >= 1.0e21)
|
||||
{ fprintf(fplog, "Warning: Nsub = %g may be too large.\n",
|
||||
pParam->BSIM3v32nsub);
|
||||
printf("Warning: Nsub = %g may be too large.\n",
|
||||
pParam->BSIM3v32nsub);
|
||||
}
|
||||
|
||||
if ((pParam->BSIM3v32ngate > 0.0) &&
|
||||
(pParam->BSIM3v32ngate <= 1.e18))
|
||||
{ fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n",
|
||||
pParam->BSIM3v32ngate);
|
||||
printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n",
|
||||
pParam->BSIM3v32ngate);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32dvt0 < 0.0)
|
||||
{ fprintf(fplog, "Warning: Dvt0 = %g is negative.\n",
|
||||
pParam->BSIM3v32dvt0);
|
||||
printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0);
|
||||
}
|
||||
|
||||
if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0)
|
||||
{ fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n");
|
||||
printf("Warning: (W0 + Weff) may be too small.\n");
|
||||
}
|
||||
|
||||
/* Check subthreshold parameters */
|
||||
if (pParam->BSIM3v32nfactor < 0.0)
|
||||
{ fprintf(fplog, "Warning: Nfactor = %g is negative.\n",
|
||||
pParam->BSIM3v32nfactor);
|
||||
printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor);
|
||||
}
|
||||
if (pParam->BSIM3v32cdsc < 0.0)
|
||||
{ fprintf(fplog, "Warning: Cdsc = %g is negative.\n",
|
||||
pParam->BSIM3v32cdsc);
|
||||
printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc);
|
||||
}
|
||||
if (pParam->BSIM3v32cdscd < 0.0)
|
||||
{ fprintf(fplog, "Warning: Cdscd = %g is negative.\n",
|
||||
pParam->BSIM3v32cdscd);
|
||||
printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd);
|
||||
}
|
||||
/* Check DIBL parameters */
|
||||
if (pParam->BSIM3v32eta0 < 0.0)
|
||||
{ fprintf(fplog, "Warning: Eta0 = %g is negative.\n",
|
||||
pParam->BSIM3v32eta0);
|
||||
printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0);
|
||||
}
|
||||
|
||||
/* Check Abulk parameters */
|
||||
if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0)
|
||||
{ fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n");
|
||||
printf("Warning: (B1 + Weff) may be too small.\n");
|
||||
}
|
||||
|
||||
|
||||
/* Check Saturation parameters */
|
||||
if (pParam->BSIM3v32a2 < 0.01)
|
||||
{ fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2);
|
||||
printf("Warning: A2 = %g is too small. Set to 0.01.\n",
|
||||
pParam->BSIM3v32a2);
|
||||
pParam->BSIM3v32a2 = 0.01;
|
||||
}
|
||||
else if (pParam->BSIM3v32a2 > 1.0)
|
||||
{ fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
|
||||
pParam->BSIM3v32a2);
|
||||
printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
|
||||
pParam->BSIM3v32a2);
|
||||
pParam->BSIM3v32a2 = 1.0;
|
||||
pParam->BSIM3v32a1 = 0.0;
|
||||
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32rdsw < 0.0)
|
||||
{ fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n",
|
||||
pParam->BSIM3v32rdsw);
|
||||
printf("Warning: Rdsw = %g is negative. Set to zero.\n",
|
||||
pParam->BSIM3v32rdsw);
|
||||
pParam->BSIM3v32rdsw = 0.0;
|
||||
pParam->BSIM3v32rds0 = 0.0;
|
||||
}
|
||||
else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001))
|
||||
{ fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
|
||||
pParam->BSIM3v32rds0);
|
||||
printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
|
||||
pParam->BSIM3v32rds0);
|
||||
pParam->BSIM3v32rds0 = 0.0;
|
||||
}
|
||||
if (pParam->BSIM3v32vsattemp < 1.0e3)
|
||||
{ fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
|
||||
printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
|
||||
}
|
||||
|
||||
if (pParam->BSIM3v32pdibl1 < 0.0)
|
||||
{ fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n",
|
||||
pParam->BSIM3v32pdibl1);
|
||||
printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1);
|
||||
}
|
||||
if (pParam->BSIM3v32pdibl2 < 0.0)
|
||||
{ fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n",
|
||||
pParam->BSIM3v32pdibl2);
|
||||
printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2);
|
||||
}
|
||||
/* Check overlap capacitance parameters */
|
||||
if (model->BSIM3v32cgdo < 0.0)
|
||||
{ fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
|
||||
printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
|
||||
model->BSIM3v32cgdo = 0.0;
|
||||
}
|
||||
if (model->BSIM3v32cgso < 0.0)
|
||||
{ fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
|
||||
printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
|
||||
model->BSIM3v32cgso = 0.0;
|
||||
}
|
||||
if (model->BSIM3v32cgbo < 0.0)
|
||||
{ fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
|
||||
printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
|
||||
model->BSIM3v32cgbo = 0.0;
|
||||
}
|
||||
|
||||
}/* loop for the parameter check for warning messages */
|
||||
fclose(fplog);
|
||||
}
|
||||
else
|
||||
{ fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n");
|
||||
}
|
||||
|
||||
return(Fatal_Flag);
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,110 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3cvtest.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "cktdefs.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "trandefs.h"
|
||||
#include "const.h"
|
||||
#include "devdefs.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM3v32convTest (GENmodel *inModel, CKTcircuit *ckt)
|
||||
{
|
||||
BSIM3v32model *model = (BSIM3v32model*)inModel;
|
||||
BSIM3v32instance *here;
|
||||
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
||||
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
||||
|
||||
/* loop through all the BSIM3v32 device models */
|
||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||
{ /* loop through all the instances of the model */
|
||||
for (here = model->BSIM3v32instances; here != NULL ;
|
||||
here=here->BSIM3v32nextInstance)
|
||||
{
|
||||
|
||||
if (here->BSIM3v32owner != ARCHme)
|
||||
continue;
|
||||
|
||||
vbs = model->BSIM3v32type
|
||||
* (*(ckt->CKTrhsOld+here->BSIM3v32bNode)
|
||||
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
||||
vgs = model->BSIM3v32type
|
||||
* (*(ckt->CKTrhsOld+here->BSIM3v32gNode)
|
||||
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
||||
vds = model->BSIM3v32type
|
||||
* (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime)
|
||||
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
||||
vbd = vbs - vds;
|
||||
vgd = vgs - vds;
|
||||
vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs)
|
||||
- *(ckt->CKTstate0 + here->BSIM3v32vds);
|
||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs);
|
||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd);
|
||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs);
|
||||
delvds = vds - *(ckt->CKTstate0 + here->BSIM3v32vds);
|
||||
delvgd = vgd-vgdo;
|
||||
|
||||
cd = here->BSIM3v32cd - here->BSIM3v32cbd;
|
||||
if (here->BSIM3v32mode >= 0)
|
||||
{ cd += here->BSIM3v32csub;
|
||||
cdhat = cd - here->BSIM3v32gbd * delvbd
|
||||
+ (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs
|
||||
+ (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs
|
||||
+ (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds;
|
||||
}
|
||||
else
|
||||
{ cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd
|
||||
+ here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds;
|
||||
}
|
||||
|
||||
/*
|
||||
* check convergence
|
||||
*/
|
||||
if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd))
|
||||
+ ckt->CKTabstol;
|
||||
if (fabs(cdhat - cd) >= tol)
|
||||
{ ckt->CKTnoncon++;
|
||||
return(OK);
|
||||
}
|
||||
cbs = here->BSIM3v32cbs;
|
||||
cbd = here->BSIM3v32cbd;
|
||||
if (here->BSIM3v32mode >= 0)
|
||||
{ cbhat = cbs + cbd - here->BSIM3v32csub
|
||||
+ here->BSIM3v32gbd * delvbd
|
||||
+ (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs
|
||||
- here->BSIM3v32gbgs * delvgs
|
||||
- here->BSIM3v32gbds * delvds;
|
||||
}
|
||||
else
|
||||
{ cbhat = cbs + cbd - here->BSIM3v32csub
|
||||
+ here->BSIM3v32gbs * delvbs
|
||||
+ (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd
|
||||
- here->BSIM3v32gbgs * delvgd
|
||||
+ here->BSIM3v32gbds * delvds;
|
||||
}
|
||||
tol = ckt->CKTreltol * MAX(fabs(cbhat),
|
||||
fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol;
|
||||
if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol)
|
||||
{ ckt->CKTnoncon++;
|
||||
return(OK);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3del.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Xuemei Xi, 10/05, 12/14, 2001.
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "gendefs.h"
|
||||
#include "suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM3v32delete (GENmodel *inModel, IFuid name, GENinstance **inInst)
|
||||
{
|
||||
BSIM3v32instance **fast = (BSIM3v32instance**)inInst;
|
||||
BSIM3v32model *model = (BSIM3v32model*)inModel;
|
||||
BSIM3v32instance **prev = NULL;
|
||||
BSIM3v32instance *here;
|
||||
|
||||
for (; model ; model = model->BSIM3v32nextModel)
|
||||
{ prev = &(model->BSIM3v32instances);
|
||||
for (here = *prev; here ; here = *prev)
|
||||
{ if (here->BSIM3v32name == name || (fast && here==*fast))
|
||||
{ *prev= here->BSIM3v32nextInstance;
|
||||
FREE(here);
|
||||
return(OK);
|
||||
}
|
||||
prev = &(here->BSIM3v32nextInstance);
|
||||
}
|
||||
}
|
||||
return(E_NODEV);
|
||||
}
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3dest.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "suffix.h"
|
||||
|
||||
void
|
||||
BSIM3v32destroy (GENmodel **inModel)
|
||||
{
|
||||
BSIM3v32model **model = (BSIM3v32model**)inModel;
|
||||
BSIM3v32instance *here;
|
||||
BSIM3v32instance *prev = NULL;
|
||||
BSIM3v32model *mod = *model;
|
||||
BSIM3v32model *oldmod = NULL;
|
||||
|
||||
for (; mod ; mod = mod->BSIM3v32nextModel)
|
||||
{ if(oldmod) FREE(oldmod);
|
||||
oldmod = mod;
|
||||
prev = (BSIM3v32instance *)NULL;
|
||||
for (here = mod->BSIM3v32instances; here; here = here->BSIM3v32nextInstance)
|
||||
{ if(prev) FREE(prev);
|
||||
prev = here;
|
||||
}
|
||||
if(prev) FREE(prev);
|
||||
}
|
||||
if(oldmod) FREE(oldmod);
|
||||
*model = NULL;
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3getic.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "cktdefs.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM3v32getic (GENmodel *inModel, CKTcircuit *ckt)
|
||||
{
|
||||
BSIM3v32model *model = (BSIM3v32model*)inModel;
|
||||
BSIM3v32instance *here;
|
||||
|
||||
for (; model ; model = model->BSIM3v32nextModel)
|
||||
{ for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance)
|
||||
{
|
||||
if (here->BSIM3v32owner != ARCHme)
|
||||
continue;
|
||||
|
||||
if (!here->BSIM3v32icVBSGiven)
|
||||
{ here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
||||
}
|
||||
if (!here->BSIM3v32icVDSGiven)
|
||||
{ here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode)
|
||||
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
||||
}
|
||||
if (!here->BSIM3v32icVGSGiven)
|
||||
{ here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode)
|
||||
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
||||
}
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,47 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3mdel.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM3v32mDelete (GENmodel **inModel, IFuid modname, GENmodel *kill)
|
||||
{
|
||||
BSIM3v32model **model = (BSIM3v32model**)inModel;
|
||||
BSIM3v32model *modfast = (BSIM3v32model*)kill;
|
||||
BSIM3v32instance *here;
|
||||
BSIM3v32instance *prev = NULL;
|
||||
BSIM3v32model **oldmod;
|
||||
|
||||
oldmod = model;
|
||||
for (; *model ; model = &((*model)->BSIM3v32nextModel))
|
||||
{ if ((*model)->BSIM3v32modName == modname ||
|
||||
(modfast && *model == modfast))
|
||||
goto delgot;
|
||||
oldmod = model;
|
||||
}
|
||||
return(E_NOMOD);
|
||||
|
||||
delgot:
|
||||
*oldmod = (*model)->BSIM3v32nextModel; /* cut deleted device out of list */
|
||||
for (here = (*model)->BSIM3v32instances; here; here = here->BSIM3v32nextInstance)
|
||||
{ if(prev) FREE(prev);
|
||||
prev = here;
|
||||
}
|
||||
if(prev) FREE(prev);
|
||||
FREE(*model);
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,505 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3noi.c of BSIM3v3.2.4
|
||||
* Author: 1995 Gary W. Ng and Min-Chie Jeng.
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Xuemei Xi, 10/05, 12/21, 2001.
|
||||
* Modified bt Paolo Nenzi 2002 and Dietmar Warning 2003
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "cktdefs.h"
|
||||
#include "iferrmsg.h"
|
||||
#include "noisedef.h"
|
||||
#include "suffix.h"
|
||||
#include "const.h" /* jwan */
|
||||
|
||||
/*
|
||||
* BSIM3v32noise (mode, operation, firstModel, ckt, data, OnDens)
|
||||
* This routine names and evaluates all of the noise sources
|
||||
* associated with MOSFET's. It starts with the model *firstModel and
|
||||
* traverses all of its insts. It then proceeds to any other models
|
||||
* on the linked list. The total output noise density generated by
|
||||
* all of the MOSFET's is summed with the variable "OnDens".
|
||||
*/
|
||||
|
||||
/*
|
||||
Channel thermal and flicker noises are calculated based on the value
|
||||
of model->BSIM3v32noiMod.
|
||||
If model->BSIM3v32noiMod = 1,
|
||||
Channel thermal noise = SPICE2 model
|
||||
Flicker noise = SPICE2 model
|
||||
If model->BSIM3v32noiMod = 2,
|
||||
Channel thermal noise = BSIM3v32 model
|
||||
Flicker noise = BSIM3v32 model
|
||||
If model->BSIM3v32noiMod = 3,
|
||||
Channel thermal noise = SPICE2 model
|
||||
Flicker noise = BSIM3v32 model
|
||||
If model->BSIM3v32noiMod = 4,
|
||||
Channel thermal noise = BSIM3v32 model
|
||||
Flicker noise = SPICE2 model
|
||||
*/
|
||||
|
||||
extern void NevalSrc();
|
||||
extern double Nintegrate();
|
||||
|
||||
/*
|
||||
* The StrongInversionNoiseEval function has been modified in
|
||||
* the release 3.2.4 of BSIM3v32 model. To accomodate both the old
|
||||
* and the new code, I have renamed according to the following:
|
||||
*
|
||||
*
|
||||
* BSIM3v3.2.4 -> StrongInversionNoiseEvalNew
|
||||
* Previous -> StrongInversionNoiseEvalOld
|
||||
*
|
||||
* 2002 Paolo Nenzi
|
||||
*/
|
||||
|
||||
/*
|
||||
* JX: 1/f noise model is smoothed out 12/18/01.
|
||||
*/
|
||||
|
||||
double
|
||||
StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model,
|
||||
BSIM3v32instance *here, double freq, double temp)
|
||||
{
|
||||
struct bsim3SizeDependParam *pParam;
|
||||
double cd, esat, DelClm, EffFreq, N0, Nl;
|
||||
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||
|
||||
pParam = here->pParam;
|
||||
cd = fabs(here->BSIM3v32cd);
|
||||
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
||||
if(model->BSIM3v32em<=0.0) DelClm = 0.0;
|
||||
else {
|
||||
T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl)
|
||||
+ model->BSIM3v32em) / esat);
|
||||
DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG));
|
||||
}
|
||||
EffFreq = pow(freq, model->BSIM3v32ef);
|
||||
T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v32ueff;
|
||||
T2 = 1.0e8 * EffFreq * here->BSIM3v32Abulk * model->BSIM3v32cox
|
||||
* pParam->BSIM3v32leff * pParam->BSIM3v32leff;
|
||||
N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE;
|
||||
Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff
|
||||
* (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE;
|
||||
|
||||
T3 = model->BSIM3v32oxideTrapDensityA
|
||||
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
|
||||
T4 = model->BSIM3v32oxideTrapDensityB * (N0 - Nl);
|
||||
T5 = model->BSIM3v32oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
|
||||
|
||||
T6 = 8.62e-5 * temp * cd * cd;
|
||||
T7 = 1.0e8 * EffFreq * pParam->BSIM3v32leff
|
||||
* pParam->BSIM3v32leff * pParam->BSIM3v32weff;
|
||||
T8 = model->BSIM3v32oxideTrapDensityA + model->BSIM3v32oxideTrapDensityB * Nl
|
||||
+ model->BSIM3v32oxideTrapDensityC * Nl * Nl;
|
||||
T9 = (Nl + 2.0e14) * (Nl + 2.0e14);
|
||||
|
||||
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
|
||||
return Ssi;
|
||||
}
|
||||
|
||||
/*
|
||||
* The code for releases: BSIM3V32, BSIM3V322, BSIM3V323
|
||||
* follows
|
||||
*/
|
||||
|
||||
double
|
||||
StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
|
||||
BSIM3v32instance *here, double freq, double temp)
|
||||
{
|
||||
struct bsim3SizeDependParam *pParam;
|
||||
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst;
|
||||
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||
|
||||
pParam = here->pParam;
|
||||
cd = fabs (here->BSIM3v32cd);
|
||||
/* Added revision dependent code */
|
||||
if (model->BSIM3v32intVersion < BSIM3v32V323)
|
||||
{
|
||||
if (vds > here->BSIM3v32vdsat)
|
||||
{
|
||||
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
||||
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
|
||||
model->BSIM3v32em) / esat);
|
||||
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
|
||||
}
|
||||
else
|
||||
DelClm = 0.0;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */
|
||||
DelClm = 0.0;
|
||||
else if (vds > here->BSIM3v32vdsat)
|
||||
{
|
||||
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
||||
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
|
||||
model->BSIM3v32em) / esat);
|
||||
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
|
||||
}
|
||||
else
|
||||
DelClm = 0.0;
|
||||
}
|
||||
EffFreq = pow (freq, model->BSIM3v32ef);
|
||||
T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v32ueff;
|
||||
T2 = 1.0e8 * EffFreq * model->BSIM3v32cox
|
||||
* pParam->BSIM3v32leff * pParam->BSIM3v32leff;
|
||||
Vgst = vgs - here->BSIM3v32von;
|
||||
N0 = model->BSIM3v32cox * Vgst / CHARGE;
|
||||
if (N0 < 0.0)
|
||||
N0 = 0.0;
|
||||
Nl = model->BSIM3v32cox * (Vgst - MIN (vds, here->BSIM3v32vdsat)) / CHARGE;
|
||||
if (Nl < 0.0)
|
||||
Nl = 0.0;
|
||||
|
||||
T3 = model->BSIM3v32oxideTrapDensityA
|
||||
* log (MAX (((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
|
||||
T4 = model->BSIM3v32oxideTrapDensityB * (N0 - Nl);
|
||||
T5 = model->BSIM3v32oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
|
||||
|
||||
T6 = 8.62e-5 * temp * cd * cd;
|
||||
T7 = 1.0e8 * EffFreq * pParam->BSIM3v32leff
|
||||
* pParam->BSIM3v32leff * pParam->BSIM3v32weff;
|
||||
T8 = model->BSIM3v32oxideTrapDensityA + model->BSIM3v32oxideTrapDensityB * Nl
|
||||
+ model->BSIM3v32oxideTrapDensityC * Nl * Nl;
|
||||
T9 = (Nl + 2.0e14) * (Nl + 2.0e14);
|
||||
|
||||
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
|
||||
return Ssi;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int
|
||||
BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt,
|
||||
Ndata *data, double *OnDens)
|
||||
{
|
||||
BSIM3v32model *model = (BSIM3v32model *)inModel;
|
||||
BSIM3v32instance *here;
|
||||
struct bsim3SizeDependParam *pParam;
|
||||
char name[N_MXVLNTH];
|
||||
double tempOnoise;
|
||||
double tempInoise;
|
||||
double noizDens[BSIM3v32NSRCS];
|
||||
double lnNdens[BSIM3v32NSRCS];
|
||||
|
||||
double vgs, vds, Slimit;
|
||||
double T1, T10, T11;
|
||||
double Ssi, Swi;
|
||||
|
||||
double m;
|
||||
|
||||
int i;
|
||||
|
||||
/* define the names of the noise sources */
|
||||
static char *BSIM3v32nNames[BSIM3v32NSRCS] =
|
||||
{ /* Note that we have to keep the order */
|
||||
".rd", /* noise due to rd */
|
||||
/* consistent with the index definitions */
|
||||
".rs", /* noise due to rs */
|
||||
/* in BSIM3v32defs.h */
|
||||
".id", /* noise due to id */
|
||||
".1overf", /* flicker (1/f) noise */
|
||||
"" /* total transistor noise */
|
||||
};
|
||||
|
||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||
{ for (here = model->BSIM3v32instances; here != NULL;
|
||||
here = here->BSIM3v32nextInstance)
|
||||
{ pParam = here->pParam;
|
||||
switch (operation)
|
||||
{ case N_OPEN:
|
||||
/* see if we have to to produce a summary report */
|
||||
/* if so, name all the noise generators */
|
||||
|
||||
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0)
|
||||
{ switch (mode)
|
||||
{ case N_DENS:
|
||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ (void) sprintf(name, "onoise.%s%s",
|
||||
here->BSIM3v32name,
|
||||
BSIM3v32nNames[i]);
|
||||
data->namelist = (IFuid *) trealloc(
|
||||
(char *) data->namelist,
|
||||
(data->numPlots + 1)
|
||||
* sizeof(IFuid));
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt,
|
||||
&(data->namelist[data->numPlots++]),
|
||||
(IFuid) NULL, name, UID_OTHER,
|
||||
(void **) NULL);
|
||||
/* we've added one more plot */
|
||||
}
|
||||
break;
|
||||
case INT_NOIZ:
|
||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ (void) sprintf(name, "onoise_total.%s%s",
|
||||
here->BSIM3v32name,
|
||||
BSIM3v32nNames[i]);
|
||||
data->namelist = (IFuid *) trealloc(
|
||||
(char *) data->namelist,
|
||||
(data->numPlots + 1)
|
||||
* sizeof(IFuid));
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt,
|
||||
&(data->namelist[data->numPlots++]),
|
||||
(IFuid) NULL, name, UID_OTHER,
|
||||
(void **) NULL);
|
||||
/* we've added one more plot */
|
||||
|
||||
(void) sprintf(name, "inoise_total.%s%s",
|
||||
here->BSIM3v32name,
|
||||
BSIM3v32nNames[i]);
|
||||
data->namelist = (IFuid *) trealloc(
|
||||
(char *) data->namelist,
|
||||
(data->numPlots + 1)
|
||||
* sizeof(IFuid));
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt,
|
||||
&(data->namelist[data->numPlots++]),
|
||||
(IFuid) NULL, name, UID_OTHER,
|
||||
(void **)NULL);
|
||||
/* we've added one more plot */
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case N_CALC:
|
||||
m = here->BSIM3v32m;
|
||||
switch (mode)
|
||||
{ case N_DENS:
|
||||
NevalSrc(&noizDens[BSIM3v32RDNOIZ],
|
||||
&lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM3v32dNodePrime, here->BSIM3v32dNode,
|
||||
here->BSIM3v32drainConductance * m);
|
||||
|
||||
NevalSrc(&noizDens[BSIM3v32RSNOIZ],
|
||||
&lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM3v32sNodePrime, here->BSIM3v32sNode,
|
||||
here->BSIM3v32sourceConductance * m);
|
||||
|
||||
switch( model->BSIM3v32noiMod )
|
||||
{ case 1:
|
||||
case 3:
|
||||
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
||||
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM3v32dNodePrime,
|
||||
here->BSIM3v32sNodePrime,
|
||||
(2.0 / 3.0 * fabs(here->BSIM3v32gm
|
||||
+ here->BSIM3v32gds
|
||||
+ here->BSIM3v32gmbs)) * m);
|
||||
break;
|
||||
case 2:
|
||||
case 4:
|
||||
/* Added revision dependent code */
|
||||
if (model->BSIM3v32intVersion == BSIM3v32V324)
|
||||
{
|
||||
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
||||
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM3v32dNodePrime,
|
||||
here->BSIM3v32sNodePrime,
|
||||
(m * here->BSIM3v32ueff
|
||||
* fabs(here->BSIM3v32qinv)
|
||||
/ (pParam->BSIM3v32leff * pParam->BSIM3v32leff
|
||||
+ here->BSIM3v32ueff * fabs(here->BSIM3v32qinv)
|
||||
* here->BSIM3v32rds))); /* bugfix */
|
||||
}
|
||||
else
|
||||
{ /* for all versions lower then 3.2.4 */
|
||||
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
||||
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM3v32dNodePrime,
|
||||
here->BSIM3v32sNodePrime,
|
||||
(m * here->BSIM3v32ueff
|
||||
* fabs(here->BSIM3v32qinv
|
||||
/ (pParam->BSIM3v32leff
|
||||
* pParam->BSIM3v32leff))));
|
||||
}
|
||||
break;
|
||||
}
|
||||
NevalSrc(&noizDens[BSIM3v32FLNOIZ], (double*) NULL,
|
||||
ckt, N_GAIN, here->BSIM3v32dNodePrime,
|
||||
here->BSIM3v32sNodePrime, (double) 0.0);
|
||||
|
||||
switch( model->BSIM3v32noiMod )
|
||||
{ case 1:
|
||||
case 4:
|
||||
noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf
|
||||
* exp(model->BSIM3v32af
|
||||
* log(MAX(fabs(here->BSIM3v32cd),
|
||||
N_MINLOG)))
|
||||
/ (pow(data->freq, model->BSIM3v32ef)
|
||||
* pParam->BSIM3v32leff
|
||||
* pParam->BSIM3v32leff
|
||||
* model->BSIM3v32cox);
|
||||
break;
|
||||
case 2:
|
||||
case 3:
|
||||
vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs);
|
||||
vds = *(ckt->CKTstates[0] + here->BSIM3v32vds);
|
||||
if (vds < 0.0)
|
||||
{ vds = -vds;
|
||||
vgs = vgs + vds;
|
||||
}
|
||||
/* Added revision dependent code */
|
||||
if (model->BSIM3v32intVersion == BSIM3v32V324)
|
||||
{
|
||||
Ssi = StrongInversionNoiseEvalNew(vds, model,
|
||||
here, data->freq, ckt->CKTtemp);
|
||||
T10 = model->BSIM3v32oxideTrapDensityA
|
||||
* 8.62e-5 * ckt->CKTtemp;
|
||||
T11 = pParam->BSIM3v32weff
|
||||
* pParam->BSIM3v32leff
|
||||
* pow(data->freq, model->BSIM3v32ef)
|
||||
* 4.0e36;
|
||||
Swi = T10 / T11 * here->BSIM3v32cd
|
||||
* here->BSIM3v32cd;
|
||||
T1 = Swi + Ssi;
|
||||
if (T1 > 0.0)
|
||||
noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1;
|
||||
else
|
||||
noizDens[BSIM3v32FLNOIZ] *= 0.0;
|
||||
}
|
||||
else
|
||||
{ /* for all versions lower then 3.2.4 */
|
||||
if (vgs >= here->BSIM3v32von + 0.1)
|
||||
{
|
||||
Ssi = StrongInversionNoiseEvalOld(vgs, vds, model,
|
||||
here, data->freq, ckt->CKTtemp);
|
||||
noizDens[BSIM3v32FLNOIZ] *= m * Ssi;
|
||||
}
|
||||
else
|
||||
{
|
||||
pParam = here->pParam;
|
||||
T10 = model->BSIM3v32oxideTrapDensityA
|
||||
* 8.62e-5 * ckt->CKTtemp;
|
||||
T11 = pParam->BSIM3v32weff
|
||||
* pParam-> BSIM3v32leff
|
||||
* pow (data->freq, model->BSIM3v32ef)
|
||||
* 4.0e36;
|
||||
Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd;
|
||||
|
||||
Slimit = StrongInversionNoiseEvalOld(
|
||||
here->BSIM3v32von + 0.1, vds, model,
|
||||
here, data->freq, ckt->CKTtemp);
|
||||
T1 = Swi + Slimit;
|
||||
if (T1 > 0.0)
|
||||
noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1;
|
||||
else
|
||||
noizDens[BSIM3v32FLNOIZ] *= 0.0;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
lnNdens[BSIM3v32FLNOIZ] =
|
||||
log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG));
|
||||
|
||||
noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ]
|
||||
+ noizDens[BSIM3v32RSNOIZ]
|
||||
+ noizDens[BSIM3v32IDNOIZ]
|
||||
+ noizDens[BSIM3v32FLNOIZ];
|
||||
lnNdens[BSIM3v32TOTNOIZ] =
|
||||
log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG));
|
||||
|
||||
*OnDens += noizDens[BSIM3v32TOTNOIZ];
|
||||
|
||||
if (data->delFreq == 0.0)
|
||||
{ /* if we haven't done any previous
|
||||
integration, we need to initialize our
|
||||
"history" variables.
|
||||
*/
|
||||
|
||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ here->BSIM3v32nVar[LNLSTDENS][i] =
|
||||
lnNdens[i];
|
||||
}
|
||||
|
||||
/* clear out our integration variables
|
||||
if it's the first pass
|
||||
*/
|
||||
if (data->freq ==
|
||||
((NOISEAN*) ckt->CKTcurJob)->NstartFreq)
|
||||
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ here->BSIM3v32nVar[OUTNOIZ][i] = 0.0;
|
||||
here->BSIM3v32nVar[INNOIZ][i] = 0.0;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{ /* data->delFreq != 0.0,
|
||||
we have to integrate.
|
||||
*/
|
||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ if (i != BSIM3v32TOTNOIZ)
|
||||
{ tempOnoise = Nintegrate(noizDens[i],
|
||||
lnNdens[i],
|
||||
here->BSIM3v32nVar[LNLSTDENS][i],
|
||||
data);
|
||||
tempInoise = Nintegrate(noizDens[i]
|
||||
* data->GainSqInv, lnNdens[i]
|
||||
+ data->lnGainInv,
|
||||
here->BSIM3v32nVar[LNLSTDENS][i]
|
||||
+ data->lnGainInv, data);
|
||||
here->BSIM3v32nVar[LNLSTDENS][i] =
|
||||
lnNdens[i];
|
||||
data->outNoiz += tempOnoise;
|
||||
data->inNoise += tempInoise;
|
||||
if (((NOISEAN*)
|
||||
ckt->CKTcurJob)->NStpsSm != 0)
|
||||
{ here->BSIM3v32nVar[OUTNOIZ][i]
|
||||
+= tempOnoise;
|
||||
here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ]
|
||||
+= tempOnoise;
|
||||
here->BSIM3v32nVar[INNOIZ][i]
|
||||
+= tempInoise;
|
||||
here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ]
|
||||
+= tempInoise;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (data->prtSummary)
|
||||
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ /* print a summary report */
|
||||
data->outpVector[data->outNumber++]
|
||||
= noizDens[i];
|
||||
}
|
||||
}
|
||||
break;
|
||||
case INT_NOIZ:
|
||||
/* already calculated, just output */
|
||||
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0)
|
||||
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||
{ data->outpVector[data->outNumber++]
|
||||
= here->BSIM3v32nVar[OUTNOIZ][i];
|
||||
data->outpVector[data->outNumber++]
|
||||
= here->BSIM3v32nVar[INNOIZ][i];
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case N_CLOSE:
|
||||
/* do nothing, the main calling routine will close */
|
||||
return (OK);
|
||||
break; /* the plots */
|
||||
} /* switch (operation) */
|
||||
} /* for here */
|
||||
} /* for model */
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3par.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "ifsim.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
#include "fteext.h"
|
||||
|
||||
int
|
||||
BSIM3v32param (int param, IFvalue *value, GENinstance *inst, IFvalue *select)
|
||||
{
|
||||
double scale;
|
||||
|
||||
if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1;
|
||||
|
||||
BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||
switch(param)
|
||||
{ case BSIM3v32_W:
|
||||
here->BSIM3v32w = value->rValue*scale;
|
||||
here->BSIM3v32wGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_L:
|
||||
here->BSIM3v32l = value->rValue*scale;
|
||||
here->BSIM3v32lGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_M:
|
||||
here->BSIM3v32m = value->rValue;
|
||||
here->BSIM3v32mGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_AS:
|
||||
here->BSIM3v32sourceArea = value->rValue*scale*scale;
|
||||
here->BSIM3v32sourceAreaGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_AD:
|
||||
here->BSIM3v32drainArea = value->rValue*scale*scale;
|
||||
here->BSIM3v32drainAreaGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_PS:
|
||||
here->BSIM3v32sourcePerimeter = value->rValue*scale;
|
||||
here->BSIM3v32sourcePerimeterGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_PD:
|
||||
here->BSIM3v32drainPerimeter = value->rValue*scale;
|
||||
here->BSIM3v32drainPerimeterGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_NRS:
|
||||
here->BSIM3v32sourceSquares = value->rValue;
|
||||
here->BSIM3v32sourceSquaresGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_NRD:
|
||||
here->BSIM3v32drainSquares = value->rValue;
|
||||
here->BSIM3v32drainSquaresGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_OFF:
|
||||
here->BSIM3v32off = value->iValue;
|
||||
break;
|
||||
case BSIM3v32_IC_VBS:
|
||||
here->BSIM3v32icVBS = value->rValue;
|
||||
here->BSIM3v32icVBSGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_IC_VDS:
|
||||
here->BSIM3v32icVDS = value->rValue;
|
||||
here->BSIM3v32icVDSGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_IC_VGS:
|
||||
here->BSIM3v32icVGS = value->rValue;
|
||||
here->BSIM3v32icVGSGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_NQSMOD:
|
||||
here->BSIM3v32nqsMod = value->iValue;
|
||||
here->BSIM3v32nqsModGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v32_IC:
|
||||
switch(value->v.numValue){
|
||||
case 3:
|
||||
here->BSIM3v32icVBS = *(value->v.vec.rVec+2);
|
||||
here->BSIM3v32icVBSGiven = TRUE;
|
||||
case 2:
|
||||
here->BSIM3v32icVGS = *(value->v.vec.rVec+1);
|
||||
here->BSIM3v32icVGSGiven = TRUE;
|
||||
case 1:
|
||||
here->BSIM3v32icVDS = *(value->v.vec.rVec);
|
||||
here->BSIM3v32icVDSGiven = TRUE;
|
||||
break;
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,372 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3pzld.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "cktdefs.h"
|
||||
#include "complex.h"
|
||||
#include "sperror.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM3v32pzLoad (GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
|
||||
{
|
||||
BSIM3v32model *model = (BSIM3v32model*)inModel;
|
||||
BSIM3v32instance *here;
|
||||
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
||||
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
|
||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
|
||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
|
||||
double GSoverlapCap, GDoverlapCap, GBoverlapCap;
|
||||
double dxpart, sxpart, xgtg, xgtd, xgts, xgtb;
|
||||
double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0;
|
||||
double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
|
||||
double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
|
||||
double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs;
|
||||
double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs;
|
||||
double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
|
||||
double ScalingFactor = 1.0e-9;
|
||||
double m;
|
||||
|
||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||
{ for (here = model->BSIM3v32instances; here!= NULL;
|
||||
here = here->BSIM3v32nextInstance)
|
||||
{
|
||||
if (here->BSIM3v32owner != ARCHme)
|
||||
continue;
|
||||
if (here->BSIM3v32mode >= 0)
|
||||
{ Gm = here->BSIM3v32gm;
|
||||
Gmbs = here->BSIM3v32gmbs;
|
||||
FwdSum = Gm + Gmbs;
|
||||
RevSum = 0.0;
|
||||
|
||||
gbbdp = -here->BSIM3v32gbds;
|
||||
gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
|
||||
|
||||
gbdpg = here->BSIM3v32gbgs;
|
||||
gbdpdp = here->BSIM3v32gbds;
|
||||
gbdpb = here->BSIM3v32gbbs;
|
||||
gbdpsp = -(gbdpg + gbdpdp + gbdpb);
|
||||
|
||||
gbspg = 0.0;
|
||||
gbspdp = 0.0;
|
||||
gbspb = 0.0;
|
||||
gbspsp = 0.0;
|
||||
|
||||
if (here->BSIM3v32nqsMod == 0)
|
||||
{ cggb = here->BSIM3v32cggb;
|
||||
cgsb = here->BSIM3v32cgsb;
|
||||
cgdb = here->BSIM3v32cgdb;
|
||||
|
||||
cbgb = here->BSIM3v32cbgb;
|
||||
cbsb = here->BSIM3v32cbsb;
|
||||
cbdb = here->BSIM3v32cbdb;
|
||||
|
||||
cdgb = here->BSIM3v32cdgb;
|
||||
cdsb = here->BSIM3v32cdsb;
|
||||
cddb = here->BSIM3v32cddb;
|
||||
|
||||
xgtg = xgtd = xgts = xgtb = 0.0;
|
||||
sxpart = 0.6;
|
||||
dxpart = 0.4;
|
||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||
= ddxpart_dVs = 0.0;
|
||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||
= dsxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ cggb = cgdb = cgsb = 0.0;
|
||||
cbgb = cbdb = cbsb = 0.0;
|
||||
cdgb = cddb = cdsb = 0.0;
|
||||
|
||||
xgtg = here->BSIM3v32gtg;
|
||||
xgtd = here->BSIM3v32gtd;
|
||||
xgts = here->BSIM3v32gts;
|
||||
xgtb = here->BSIM3v32gtb;
|
||||
|
||||
xcqgb = here->BSIM3v32cqgb;
|
||||
xcqdb = here->BSIM3v32cqdb;
|
||||
xcqsb = here->BSIM3v32cqsb;
|
||||
xcqbb = here->BSIM3v32cqbb;
|
||||
|
||||
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
||||
* here->pParam->BSIM3v32leffCV;
|
||||
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
||||
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
||||
{ if (model->BSIM3v32xpart < 0.5)
|
||||
{ dxpart = 0.4;
|
||||
}
|
||||
else if (model->BSIM3v32xpart > 0.5)
|
||||
{ dxpart = 0.0;
|
||||
}
|
||||
else
|
||||
{ dxpart = 0.5;
|
||||
}
|
||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||
= ddxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ dxpart = here->BSIM3v32qdrn / qcheq;
|
||||
Cdd = here->BSIM3v32cddb;
|
||||
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
||||
+ here->BSIM3v32cbdb);
|
||||
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
|
||||
Cdg = here->BSIM3v32cdgb;
|
||||
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
||||
+ here->BSIM3v32cbgb);
|
||||
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
|
||||
|
||||
Cds = here->BSIM3v32cdsb;
|
||||
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
||||
+ here->BSIM3v32cbsb);
|
||||
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
|
||||
|
||||
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
|
||||
+ ddxpart_dVs);
|
||||
}
|
||||
sxpart = 1.0 - dxpart;
|
||||
dsxpart_dVd = -ddxpart_dVd;
|
||||
dsxpart_dVg = -ddxpart_dVg;
|
||||
dsxpart_dVs = -ddxpart_dVs;
|
||||
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ Gm = -here->BSIM3v32gm;
|
||||
Gmbs = -here->BSIM3v32gmbs;
|
||||
FwdSum = 0.0;
|
||||
RevSum = -(Gm + Gmbs);
|
||||
|
||||
gbbsp = -here->BSIM3v32gbds;
|
||||
gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
|
||||
|
||||
gbdpg = 0.0;
|
||||
gbdpsp = 0.0;
|
||||
gbdpb = 0.0;
|
||||
gbdpdp = 0.0;
|
||||
|
||||
gbspg = here->BSIM3v32gbgs;
|
||||
gbspsp = here->BSIM3v32gbds;
|
||||
gbspb = here->BSIM3v32gbbs;
|
||||
gbspdp = -(gbspg + gbspsp + gbspb);
|
||||
|
||||
if (here->BSIM3v32nqsMod == 0)
|
||||
{ cggb = here->BSIM3v32cggb;
|
||||
cgsb = here->BSIM3v32cgdb;
|
||||
cgdb = here->BSIM3v32cgsb;
|
||||
|
||||
cbgb = here->BSIM3v32cbgb;
|
||||
cbsb = here->BSIM3v32cbdb;
|
||||
cbdb = here->BSIM3v32cbsb;
|
||||
|
||||
cdgb = -(here->BSIM3v32cdgb + cggb + cbgb);
|
||||
cdsb = -(here->BSIM3v32cddb + cgsb + cbsb);
|
||||
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
|
||||
|
||||
xgtg = xgtd = xgts = xgtb = 0.0;
|
||||
sxpart = 0.4;
|
||||
dxpart = 0.6;
|
||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||
= ddxpart_dVs = 0.0;
|
||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||
= dsxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ cggb = cgdb = cgsb = 0.0;
|
||||
cbgb = cbdb = cbsb = 0.0;
|
||||
cdgb = cddb = cdsb = 0.0;
|
||||
|
||||
xgtg = here->BSIM3v32gtg;
|
||||
xgtd = here->BSIM3v32gts;
|
||||
xgts = here->BSIM3v32gtd;
|
||||
xgtb = here->BSIM3v32gtb;
|
||||
|
||||
xcqgb = here->BSIM3v32cqgb;
|
||||
xcqdb = here->BSIM3v32cqsb;
|
||||
xcqsb = here->BSIM3v32cqdb;
|
||||
xcqbb = here->BSIM3v32cqbb;
|
||||
|
||||
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
||||
* here->pParam->BSIM3v32leffCV;
|
||||
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
||||
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
||||
{ if (model->BSIM3v32xpart < 0.5)
|
||||
{ sxpart = 0.4;
|
||||
}
|
||||
else if (model->BSIM3v32xpart > 0.5)
|
||||
{ sxpart = 0.0;
|
||||
}
|
||||
else
|
||||
{ sxpart = 0.5;
|
||||
}
|
||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||
= dsxpart_dVs = 0.0;
|
||||
}
|
||||
else
|
||||
{ sxpart = here->BSIM3v32qdrn / qcheq;
|
||||
Css = here->BSIM3v32cddb;
|
||||
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
||||
+ here->BSIM3v32cbdb);
|
||||
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
|
||||
Csg = here->BSIM3v32cdgb;
|
||||
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
||||
+ here->BSIM3v32cbgb);
|
||||
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
|
||||
|
||||
Csd = here->BSIM3v32cdsb;
|
||||
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
||||
+ here->BSIM3v32cbsb);
|
||||
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
|
||||
|
||||
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
|
||||
+ dsxpart_dVs);
|
||||
}
|
||||
dxpart = 1.0 - sxpart;
|
||||
ddxpart_dVd = -dsxpart_dVd;
|
||||
ddxpart_dVg = -dsxpart_dVg;
|
||||
ddxpart_dVs = -dsxpart_dVs;
|
||||
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
|
||||
gdpr = here->BSIM3v32drainConductance;
|
||||
gspr = here->BSIM3v32sourceConductance;
|
||||
gds = here->BSIM3v32gds;
|
||||
gbd = here->BSIM3v32gbd;
|
||||
gbs = here->BSIM3v32gbs;
|
||||
capbd = here->BSIM3v32capbd;
|
||||
capbs = here->BSIM3v32capbs;
|
||||
|
||||
GSoverlapCap = here->BSIM3v32cgso;
|
||||
GDoverlapCap = here->BSIM3v32cgdo;
|
||||
GBoverlapCap = here->pParam->BSIM3v32cgbo;
|
||||
|
||||
xcdgb = (cdgb - GDoverlapCap);
|
||||
xcddb = (cddb + capbd + GDoverlapCap);
|
||||
xcdsb = cdsb;
|
||||
xcdbb = -(xcdgb + xcddb + xcdsb);
|
||||
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap);
|
||||
xcsdb = -(cgdb + cbdb + cddb);
|
||||
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb));
|
||||
xcsbb = -(xcsgb + xcsdb + xcssb);
|
||||
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap);
|
||||
xcgdb = (cgdb - GDoverlapCap);
|
||||
xcgsb = (cgsb - GSoverlapCap);
|
||||
xcgbb = -(xcggb + xcgdb + xcgsb);
|
||||
xcbgb = (cbgb - GBoverlapCap);
|
||||
xcbdb = (cbdb - capbd);
|
||||
xcbsb = (cbsb - capbs);
|
||||
xcbbb = -(xcbgb + xcbdb + xcbsb);
|
||||
|
||||
m = here->BSIM3v32m;
|
||||
|
||||
*(here->BSIM3v32GgPtr ) += m * (xcggb * s->real);
|
||||
*(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag);
|
||||
*(here->BSIM3v32BbPtr ) += m * (xcbbb * s->real);
|
||||
*(here->BSIM3v32BbPtr +1) += m * (xcbbb * s->imag);
|
||||
*(here->BSIM3v32DPdpPtr ) += m * (xcddb * s->real);
|
||||
*(here->BSIM3v32DPdpPtr +1) += m * (xcddb * s->imag);
|
||||
*(here->BSIM3v32SPspPtr ) += m * (xcssb * s->real);
|
||||
*(here->BSIM3v32SPspPtr +1) += m * (xcssb * s->imag);
|
||||
|
||||
*(here->BSIM3v32GbPtr ) += m * (xcgbb * s->real);
|
||||
*(here->BSIM3v32GbPtr +1) += m * (xcgbb * s->imag);
|
||||
*(here->BSIM3v32GdpPtr ) += m * (xcgdb * s->real);
|
||||
*(here->BSIM3v32GdpPtr +1) += m * (xcgdb * s->imag);
|
||||
*(here->BSIM3v32GspPtr ) += m * (xcgsb * s->real);
|
||||
*(here->BSIM3v32GspPtr +1) += m * (xcgsb * s->imag);
|
||||
|
||||
*(here->BSIM3v32BgPtr ) += m * (xcbgb * s->real);
|
||||
*(here->BSIM3v32BgPtr +1) += m * (xcbgb * s->imag);
|
||||
*(here->BSIM3v32BdpPtr ) += m * (xcbdb * s->real);
|
||||
*(here->BSIM3v32BdpPtr +1) += m * (xcbdb * s->imag);
|
||||
*(here->BSIM3v32BspPtr ) += m * (xcbsb * s->real);
|
||||
*(here->BSIM3v32BspPtr +1) += m * (xcbsb * s->imag);
|
||||
|
||||
*(here->BSIM3v32DPgPtr ) += m * (xcdgb * s->real);
|
||||
*(here->BSIM3v32DPgPtr +1) += m * (xcdgb * s->imag);
|
||||
*(here->BSIM3v32DPbPtr ) += m * (xcdbb * s->real);
|
||||
*(here->BSIM3v32DPbPtr +1) += m * (xcdbb * s->imag);
|
||||
*(here->BSIM3v32DPspPtr ) += m * (xcdsb * s->real);
|
||||
*(here->BSIM3v32DPspPtr +1) += m * (xcdsb * s->imag);
|
||||
|
||||
*(here->BSIM3v32SPgPtr ) += m * (xcsgb * s->real);
|
||||
*(here->BSIM3v32SPgPtr +1) += m * (xcsgb * s->imag);
|
||||
*(here->BSIM3v32SPbPtr ) += m * (xcsbb * s->real);
|
||||
*(here->BSIM3v32SPbPtr +1) += m * (xcsbb * s->imag);
|
||||
*(here->BSIM3v32SPdpPtr ) += m * (xcsdb * s->real);
|
||||
*(here->BSIM3v32SPdpPtr +1) += m * (xcsdb * s->imag);
|
||||
|
||||
*(here->BSIM3v32DdPtr) += m * gdpr;
|
||||
*(here->BSIM3v32DdpPtr) -= m * gdpr;
|
||||
*(here->BSIM3v32DPdPtr) -= m * gdpr;
|
||||
|
||||
*(here->BSIM3v32SsPtr) += m * gspr;
|
||||
*(here->BSIM3v32SspPtr) -= m * gspr;
|
||||
*(here->BSIM3v32SPsPtr) -= m * gspr;
|
||||
|
||||
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
|
||||
*(here->BSIM3v32BbPtr) += m * (gbd + gbs - here->BSIM3v32gbbs);
|
||||
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
|
||||
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
|
||||
|
||||
*(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg
|
||||
+ T1 * ddxpart_dVg + gbdpg;
|
||||
*(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum
|
||||
+ dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp;
|
||||
*(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts
|
||||
- T1 * ddxpart_dVs - gbdpsp;
|
||||
*(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb
|
||||
- T1 * ddxpart_dVb - gbdpb;
|
||||
|
||||
*(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg
|
||||
- T1 * dsxpart_dVg - gbspg;
|
||||
*(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum
|
||||
+ sxpart * xgts + T1 * dsxpart_dVs + gbspsp;
|
||||
*(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb
|
||||
- T1 * dsxpart_dVb - gbspb;
|
||||
*(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd
|
||||
- T1 * dsxpart_dVd - gbspdp;
|
||||
|
||||
*(here->BSIM3v32GgPtr) -= xgtg;
|
||||
*(here->BSIM3v32GbPtr) -= xgtb;
|
||||
*(here->BSIM3v32GdpPtr) -= xgtd;
|
||||
*(here->BSIM3v32GspPtr) -= xgts;
|
||||
|
||||
if (here->BSIM3v32nqsMod)
|
||||
{ *(here->BSIM3v32QqPtr ) += m * (s->real * ScalingFactor);
|
||||
*(here->BSIM3v32QqPtr +1) += m * (s->imag * ScalingFactor);
|
||||
*(here->BSIM3v32QgPtr ) -= m * (xcqgb * s->real);
|
||||
*(here->BSIM3v32QgPtr +1) -= m * (xcqgb * s->imag);
|
||||
*(here->BSIM3v32QdpPtr ) -= m * (xcqdb * s->real);
|
||||
*(here->BSIM3v32QdpPtr +1) -= m * (xcqdb * s->imag);
|
||||
*(here->BSIM3v32QbPtr ) -= m * (xcqbb * s->real);
|
||||
*(here->BSIM3v32QbPtr +1) -= m * (xcqbb * s->imag);
|
||||
*(here->BSIM3v32QspPtr ) -= m * (xcqsb * s->real);
|
||||
*(here->BSIM3v32QspPtr +1) -= m * (xcqsb * s->imag);
|
||||
|
||||
*(here->BSIM3v32GqPtr) -= m * (here->BSIM3v32gtau);
|
||||
*(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau);
|
||||
*(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau);
|
||||
|
||||
*(here->BSIM3v32QqPtr) += m * (here->BSIM3v32gtau);
|
||||
*(here->BSIM3v32QgPtr) += m * xgtg;
|
||||
*(here->BSIM3v32QdpPtr) += m * xgtd;
|
||||
*(here->BSIM3v32QbPtr) += m * xgtb;
|
||||
*(here->BSIM3v32QspPtr) += m * xgts;
|
||||
}
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,50 @@
|
|||
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
|
||||
|
||||
/**********
|
||||
* Copyright 2001 Regents of the University of California. All rights reserved.
|
||||
* File: b3trunc.c of BSIM3v3.2.4
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Author: 1997-1999 Weidong Liu.
|
||||
* Author: 2001 Xuemei Xi
|
||||
* Modified by Poalo Nenzi 2002
|
||||
**********/
|
||||
|
||||
#include "ngspice.h"
|
||||
#include "cktdefs.h"
|
||||
#include "bsim3v32def.h"
|
||||
#include "sperror.h"
|
||||
#include "suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM3v32trunc (GENmodel *inModel, CKTcircuit *ckt, double *timeStep)
|
||||
{
|
||||
BSIM3v32model *model = (BSIM3v32model*)inModel;
|
||||
BSIM3v32instance *here;
|
||||
|
||||
#ifdef STEPDEBUG
|
||||
double debugtemp;
|
||||
#endif /* STEPDEBUG */
|
||||
|
||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||
{ for (here = model->BSIM3v32instances; here != NULL;
|
||||
here = here->BSIM3v32nextInstance)
|
||||
{
|
||||
if (here->BSIM3v32owner != ARCHme)
|
||||
continue;
|
||||
#ifdef STEPDEBUG
|
||||
debugtemp = *timeStep;
|
||||
#endif /* STEPDEBUG */
|
||||
CKTterr(here->BSIM3v32qb,ckt,timeStep);
|
||||
CKTterr(here->BSIM3v32qg,ckt,timeStep);
|
||||
CKTterr(here->BSIM3v32qd,ckt,timeStep);
|
||||
#ifdef STEPDEBUG
|
||||
if(debugtemp != *timeStep)
|
||||
{ printf("device %s reduces step from %g to %g\n",
|
||||
here->BSIM3v32name,debugtemp,*timeStep);
|
||||
}
|
||||
#endif /* STEPDEBUG */
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,31 @@
|
|||
/**********
|
||||
Copyright 1999 Regents of the University of California. All rights reserved.
|
||||
Author: 1991 JianHui Huang and Min-Chie Jeng.
|
||||
Modified by Yuhua Cheng to use BSIM3v3 in Spice3f5 (Jan. 1997)
|
||||
Modified by Paolo Nenzi 2002
|
||||
File: bsim3ext.h
|
||||
**********/
|
||||
|
||||
extern int BSIM3v32acLoad(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM3v32ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
|
||||
extern int BSIM3v32convTest(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM3v32delete(GENmodel*,IFuid,GENinstance**);
|
||||
extern void BSIM3v32destroy(GENmodel**);
|
||||
extern int BSIM3v32getic(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM3v32load(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM3v32mAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
|
||||
extern int BSIM3v32mDelete(GENmodel**,IFuid,GENmodel*);
|
||||
extern int BSIM3v32mParam(int,IFvalue*,GENmodel*);
|
||||
extern void BSIM3v32mosCap(CKTcircuit*, double, double, double, double,
|
||||
double, double, double, double, double, double, double,
|
||||
double, double, double, double, double, double, double*,
|
||||
double*, double*, double*, double*, double*, double*, double*,
|
||||
double*, double*, double*, double*, double*, double*, double*,
|
||||
double*);
|
||||
extern int BSIM3v32param(int,IFvalue*,GENinstance*,IFvalue*);
|
||||
extern int BSIM3v32pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
|
||||
extern int BSIM3v32setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
|
||||
extern int BSIM3v32temp(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM3v32trunc(GENmodel*,CKTcircuit*,double*);
|
||||
extern int BSIM3v32noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
|
||||
extern int BSIM3v32unsetup(GENmodel*,CKTcircuit*);
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
#include "config.h"
|
||||
|
||||
#include "devdefs.h"
|
||||
|
||||
#include "bsim3v32itf.h"
|
||||
#include "bsim3v32ext.h"
|
||||
#include "bsim3v32init.h"
|
||||
|
||||
|
||||
SPICEdev BSIM3v32info = {
|
||||
{ "BSIM3v32",
|
||||
"Berkeley Short Channel IGFET Model Version-3",
|
||||
|
||||
&BSIM3v32nSize,
|
||||
&BSIM3v32nSize,
|
||||
BSIM3v32names,
|
||||
|
||||
&BSIM3v32pTSize,
|
||||
BSIM3v32pTable,
|
||||
|
||||
&BSIM3v32mPTSize,
|
||||
BSIM3v32mPTable,
|
||||
|
||||
#ifdef XSPICE
|
||||
/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/
|
||||
NULL, /* This is a SPICE device, it has no MIF info data */
|
||||
|
||||
0, /* This is a SPICE device, it has no MIF info data */
|
||||
NULL, /* This is a SPICE device, it has no MIF info data */
|
||||
|
||||
0, /* This is a SPICE device, it has no MIF info data */
|
||||
NULL, /* This is a SPICE device, it has no MIF info data */
|
||||
|
||||
0, /* This is a SPICE device, it has no MIF info data */
|
||||
NULL, /* This is a SPICE device, it has no MIF info data */
|
||||
/*--------------------------- End of SDB fix -------------------------*/
|
||||
#endif
|
||||
|
||||
DEV_DEFAULT
|
||||
},
|
||||
|
||||
DEVparam : BSIM3v32param,
|
||||
DEVmodParam : BSIM3v32mParam,
|
||||
DEVload : BSIM3v32load,
|
||||
DEVsetup : BSIM3v32setup,
|
||||
DEVunsetup : BSIM3v32unsetup,
|
||||
DEVpzSetup : BSIM3v32setup,
|
||||
DEVtemperature: BSIM3v32temp,
|
||||
DEVtrunc : BSIM3v32trunc,
|
||||
DEVfindBranch : NULL,
|
||||
DEVacLoad : BSIM3v32acLoad,
|
||||
DEVaccept : NULL,
|
||||
DEVdestroy : BSIM3v32destroy,
|
||||
DEVmodDelete : BSIM3v32mDelete,
|
||||
DEVdelete : BSIM3v32delete,
|
||||
DEVsetic : BSIM3v32getic,
|
||||
DEVask : BSIM3v32ask,
|
||||
DEVmodAsk : BSIM3v32mAsk,
|
||||
DEVpzLoad : BSIM3v32pzLoad,
|
||||
DEVconvTest : BSIM3v32convTest,
|
||||
DEVsenSetup : NULL,
|
||||
DEVsenLoad : NULL,
|
||||
DEVsenUpdate : NULL,
|
||||
DEVsenAcLoad : NULL,
|
||||
DEVsenPrint : NULL,
|
||||
DEVsenTrunc : NULL,
|
||||
DEVdisto : NULL,
|
||||
DEVnoise : BSIM3v32noise,
|
||||
#ifdef CIDER
|
||||
DEVdump : NULL,
|
||||
DEVacct : NULL,
|
||||
#endif
|
||||
DEVinstSize : &BSIM3v32iSize,
|
||||
DEVmodSize : &BSIM3v32mSize
|
||||
|
||||
};
|
||||
|
||||
|
||||
SPICEdev *
|
||||
get_bsim3v32_info(void)
|
||||
{
|
||||
return &BSIM3v32info;
|
||||
}
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#ifndef _BSIM3v32INIT_H
|
||||
#define _BSIM3v32INIT_H
|
||||
|
||||
extern IFparm BSIM3v32pTable[ ];
|
||||
extern IFparm BSIM3v32mPTable[ ];
|
||||
extern char *BSIM3v32names[ ];
|
||||
extern int BSIM3v32pTSize;
|
||||
extern int BSIM3v32mPTSize;
|
||||
extern int BSIM3v32nSize;
|
||||
extern int BSIM3v32iSize;
|
||||
extern int BSIM3v32mSize;
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
/**********
|
||||
Copyright 1999 Regents of the University of California. All rights reserved.
|
||||
Author: 1991 JianHui Huang and Min-Chie Jeng.
|
||||
Modified by Paolo Nenzi 2002
|
||||
File: bsim3itf.h
|
||||
**********/
|
||||
|
||||
#ifndef DEV_BSIM3v32
|
||||
#define DEV_BSIM3v32
|
||||
|
||||
SPICEdev *get_bsim3v32_info(void);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue