From b2e9e30a149af63ec2fbec5ebd541c615bc72381 Mon Sep 17 00:00:00 2001 From: dwarning Date: Sat, 24 Nov 2007 12:00:19 +0000 Subject: [PATCH] BSIM3v3.2.x shifted to folder bsim3v32 --- src/spicelib/devices/bsim3v32/B3TERMS_OF_USE | 30 + src/spicelib/devices/bsim3v32/Makefile.am | 34 + src/spicelib/devices/bsim3v32/b3v32.c | 493 +++ src/spicelib/devices/bsim3v32/b3v32acld.c | 364 ++ src/spicelib/devices/bsim3v32/b3v32ask.c | 226 ++ src/spicelib/devices/bsim3v32/b3v32check.c | 449 +++ src/spicelib/devices/bsim3v32/b3v32cvtest.c | 110 + src/spicelib/devices/bsim3v32/b3v32del.c | 40 + src/spicelib/devices/bsim3v32/b3v32dest.c | 38 + src/spicelib/devices/bsim3v32/b3v32getic.c | 47 + src/spicelib/devices/bsim3v32/b3v32ld.c | 3296 ++++++++++++++++++ src/spicelib/devices/bsim3v32/b3v32mask.c | 1269 +++++++ src/spicelib/devices/bsim3v32/b3v32mdel.c | 47 + src/spicelib/devices/bsim3v32/b3v32mpar.c | 1718 +++++++++ src/spicelib/devices/bsim3v32/b3v32noi.c | 505 +++ src/spicelib/devices/bsim3v32/b3v32par.c | 106 + src/spicelib/devices/bsim3v32/b3v32pzld.c | 372 ++ src/spicelib/devices/bsim3v32/b3v32set.c | 1096 ++++++ src/spicelib/devices/bsim3v32/b3v32temp.c | 1043 ++++++ src/spicelib/devices/bsim3v32/b3v32trunc.c | 50 + src/spicelib/devices/bsim3v32/bsim3v32def.h | 1810 ++++++++++ src/spicelib/devices/bsim3v32/bsim3v32ext.h | 31 + src/spicelib/devices/bsim3v32/bsim3v32init.c | 83 + src/spicelib/devices/bsim3v32/bsim3v32init.h | 13 + src/spicelib/devices/bsim3v32/bsim3v32itf.h | 13 + 25 files changed, 13283 insertions(+) create mode 100644 src/spicelib/devices/bsim3v32/B3TERMS_OF_USE create mode 100644 src/spicelib/devices/bsim3v32/Makefile.am create mode 100644 src/spicelib/devices/bsim3v32/b3v32.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32acld.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32ask.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32check.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32cvtest.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32del.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32dest.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32getic.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32ld.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32mask.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32mdel.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32mpar.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32noi.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32par.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32pzld.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32set.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32temp.c create mode 100644 src/spicelib/devices/bsim3v32/b3v32trunc.c create mode 100644 src/spicelib/devices/bsim3v32/bsim3v32def.h create mode 100644 src/spicelib/devices/bsim3v32/bsim3v32ext.h create mode 100644 src/spicelib/devices/bsim3v32/bsim3v32init.c create mode 100644 src/spicelib/devices/bsim3v32/bsim3v32init.h create mode 100644 src/spicelib/devices/bsim3v32/bsim3v32itf.h diff --git a/src/spicelib/devices/bsim3v32/B3TERMS_OF_USE b/src/spicelib/devices/bsim3v32/B3TERMS_OF_USE new file mode 100644 index 000000000..bc4a61beb --- /dev/null +++ b/src/spicelib/devices/bsim3v32/B3TERMS_OF_USE @@ -0,0 +1,30 @@ + +The terms under which the software is provided are as the following. + +Software is distributed as is, completely without warranty or service +support. The University of California and its employees are not liable +for the condition or performance of the software. + +The University owns the copyright but shall not be liable for any +infringement of copyright or other proprietary rights brought by third +parties against the users of the software. + +The University of California hereby disclaims all implied warranties. + +The University of California grants the users the right to modify, copy, +and redistribute the software and documentation, both within the user's +organization and externally, subject to the following restrictions: + +1. The users agree not to charge for the University of California code + itself but may charge for additions, extensions, or support. + +2. In any product based on the software, the users agree to acknowledge + the UC Berkeley BSIM Research Group that developed the software. This + acknowledgment shall appear in the product documentation. + +3. The users agree to obey all U.S. Government restrictions governing + redistribution or export of the software. + +4. The users agree to reproduce any copyright notice which appears on + the software on any copy or modification of such made available + to others. diff --git a/src/spicelib/devices/bsim3v32/Makefile.am b/src/spicelib/devices/bsim3v32/Makefile.am new file mode 100644 index 000000000..b75b121a1 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/Makefile.am @@ -0,0 +1,34 @@ +## Process this file with automake to produce Makefile.in + +noinst_LIBRARIES = libbsim3v32.a + +libbsim3v32_a_SOURCES = \ + b3v32.c \ + b3v32acld.c \ + b3v32ask.c \ + b3v32check.c \ + b3v32cvtest.c \ + b3v32del.c \ + b3v32dest.c \ + b3v32getic.c \ + b3v32ld.c \ + b3v32mask.c \ + b3v32mdel.c \ + b3v32mpar.c \ + b3v32noi.c \ + b3v32par.c \ + b3v32pzld.c \ + b3v32set.c \ + b3v32temp.c \ + b3v32trunc.c \ + bsim3v32def.h \ + bsim3v32ext.h \ + bsim3v32init.c \ + bsim3v32init.h \ + bsim3v32itf.h + + + +INCLUDES = -I$(top_srcdir)/src/include + +MAINTAINERCLEANFILES = Makefile.in diff --git a/src/spicelib/devices/bsim3v32/b3v32.c b/src/spicelib/devices/bsim3v32/b3v32.c new file mode 100644 index 000000000..c9fab3895 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32.c @@ -0,0 +1,493 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "devdefs.h" +#include "bsim3v32def.h" +#include "suffix.h" + +IFparm BSIM3v32pTable[] = { /* parameters */ +IOP( "l", BSIM3v32_L, IF_REAL , "Length"), +IOP( "w", BSIM3v32_W, IF_REAL , "Width"), +IOP( "m", BSIM3v32_M, IF_REAL , "Parallel multiplier"), +IOP( "ad", BSIM3v32_AD, IF_REAL , "Drain area"), +IOP( "as", BSIM3v32_AS, IF_REAL , "Source area"), +IOP( "pd", BSIM3v32_PD, IF_REAL , "Drain perimeter"), +IOP( "ps", BSIM3v32_PS, IF_REAL , "Source perimeter"), +IOP( "nrd", BSIM3v32_NRD, IF_REAL , "Number of squares in drain"), +IOP( "nrs", BSIM3v32_NRS, IF_REAL , "Number of squares in source"), +IOP( "off", BSIM3v32_OFF, IF_FLAG , "Device is initially off"), +IOP( "nqsmod", BSIM3v32_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"), +IP( "ic", BSIM3v32_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"), +OP( "gmbs", BSIM3v32_GMBS, IF_REAL, "Gmb"), +OP( "gm", BSIM3v32_GM, IF_REAL, "Gm"), +OP( "gds", BSIM3v32_GDS, IF_REAL, "Gds"), +OP( "vdsat", BSIM3v32_VDSAT, IF_REAL, "Vdsat"), +OP( "vth", BSIM3v32_VON, IF_REAL, "Vth"), +OP( "id", BSIM3v32_CD, IF_REAL, "Ids"), +OP( "vbs", BSIM3v32_VBS, IF_REAL, "Vbs"), +OP( "vgs", BSIM3v32_VGS, IF_REAL, "Vgs"), +OP( "vds", BSIM3v32_VDS, IF_REAL, "Vds"), +}; + +IFparm BSIM3v32mPTable[] = { /* model parameters */ +IOP( "capmod", BSIM3v32_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"), +IOP( "mobmod", BSIM3v32_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"), +IOP( "noimod", BSIM3v32_MOD_NOIMOD, IF_INTEGER, "Noise model selector"), +IOP( "acm", BSIM3v32_MOD_ACMMOD, IF_INTEGER, "Area calculation method selector"), +IOP( "paramchk", BSIM3v32_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"), +IOP( "binunit", BSIM3v32_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"), +IOP( "version", BSIM3v32_MOD_VERSION, IF_STRING, " parameter for model version"), +IOP( "tox", BSIM3v32_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"), + +IOP( "toxm", BSIM3v32_MOD_TOXM, IF_REAL, "Gate oxide thickness used in extraction"), +IOP( "cdsc", BSIM3v32_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), +IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), +IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), +IOP( "cit", BSIM3v32_MOD_CIT, IF_REAL, "Interface state capacitance"), +IOP( "nfactor", BSIM3v32_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), +IOP( "xj", BSIM3v32_MOD_XJ, IF_REAL, "Junction depth in meters"), +IOP( "vsat", BSIM3v32_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), +IOP( "at", BSIM3v32_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), +IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), +IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), +IOP( "a1", BSIM3v32_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), +IOP( "a2", BSIM3v32_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), +IOP( "keta", BSIM3v32_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), +IOP( "nsub", BSIM3v32_MOD_NSUB, IF_REAL, "Substrate doping concentration"), +IOP( "nch", BSIM3v32_MOD_NPEAK, IF_REAL, "Channel doping concentration"), +IOP( "ngate", BSIM3v32_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"), +IOP( "gamma1", BSIM3v32_MOD_GAMMA1, IF_REAL, "Vth body coefficient"), +IOP( "gamma2", BSIM3v32_MOD_GAMMA2, IF_REAL, "Vth body coefficient"), +IOP( "vbx", BSIM3v32_MOD_VBX, IF_REAL, "Vth transition body Voltage"), +IOP( "vbm", BSIM3v32_MOD_VBM, IF_REAL, "Maximum body voltage"), + +IOP( "xt", BSIM3v32_MOD_XT, IF_REAL, "Doping depth"), +IOP( "k1", BSIM3v32_MOD_K1, IF_REAL, "Bulk effect coefficient 1"), +IOP( "kt1", BSIM3v32_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt1l", BSIM3v32_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt2", BSIM3v32_MOD_KT2, IF_REAL, "Body-coefficient of kt1"), +IOP( "k2", BSIM3v32_MOD_K2, IF_REAL, "Bulk effect coefficient 2"), +IOP( "k3", BSIM3v32_MOD_K3, IF_REAL, "Narrow width effect coefficient"), +IOP( "k3b", BSIM3v32_MOD_K3B, IF_REAL, "Body effect coefficient of k3"), +IOP( "w0", BSIM3v32_MOD_W0, IF_REAL, "Narrow width effect parameter"), +IOP( "nlx", BSIM3v32_MOD_NLX, IF_REAL, "Lateral non-uniform doping effect"), +IOP( "dvt0", BSIM3v32_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"), +IOP( "dvt1", BSIM3v32_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"), +IOP( "dvt2", BSIM3v32_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"), +IOP( "dvt0w", BSIM3v32_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"), +IOP( "dvt1w", BSIM3v32_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"), +IOP( "dvt2w", BSIM3v32_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"), +IOP( "drout", BSIM3v32_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"), +IOP( "dsub", BSIM3v32_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"), +IOP( "vth0", BSIM3v32_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "vtho", BSIM3v32_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "ua", BSIM3v32_MOD_UA, IF_REAL, "Linear gate dependence of mobility"), +IOP( "ua1", BSIM3v32_MOD_UA1, IF_REAL, "Temperature coefficient of ua"), +IOP( "ub", BSIM3v32_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"), +IOP( "ub1", BSIM3v32_MOD_UB1, IF_REAL, "Temperature coefficient of ub"), +IOP( "uc", BSIM3v32_MOD_UC, IF_REAL, "Body-bias dependence of mobility"), +IOP( "uc1", BSIM3v32_MOD_UC1, IF_REAL, "Temperature coefficient of uc"), +IOP( "u0", BSIM3v32_MOD_U0, IF_REAL, "Low-field mobility at Tnom"), +IOP( "ute", BSIM3v32_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"), +IOP( "voff", BSIM3v32_MOD_VOFF, IF_REAL, "Threshold voltage offset"), +IOP( "tnom", BSIM3v32_MOD_TNOM, IF_REAL, "Parameter measurement temperature"), +IOP( "cgso", BSIM3v32_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"), +IOP( "cgdo", BSIM3v32_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"), +IOP( "cgbo", BSIM3v32_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"), +IOP( "xpart", BSIM3v32_MOD_XPART, IF_REAL, "Channel charge partitioning"), +IOP( "elm", BSIM3v32_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"), +IOP( "delta", BSIM3v32_MOD_DELTA, IF_REAL, "Effective Vds parameter"), +IOP( "rsh", BSIM3v32_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), +IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), + +IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), +IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), + +IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), +IOP( "eta0", BSIM3v32_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "etab", BSIM3v32_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "pclm", BSIM3v32_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), +IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), +IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), +IOP( "js", BSIM3v32_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"), +IOP( "jsw", BSIM3v32_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"), +IOP( "pb", BSIM3v32_MOD_PB, IF_REAL, "Source/drain junction built-in potential"), +IOP( "nj", BSIM3v32_MOD_NJ, IF_REAL, "Source/drain junction emission coefficient"), +IOP( "xti", BSIM3v32_MOD_XTI, IF_REAL, "Junction current temperature exponent"), +IOP( "mj", BSIM3v32_MOD_MJ, IF_REAL, "Source/drain bottom junction capacitance grading coefficient"), +IOP( "pbsw", BSIM3v32_MOD_PBSW, IF_REAL, "Source/drain sidewall junction capacitance built in potential"), +IOP( "mjsw", BSIM3v32_MOD_MJSW, IF_REAL, "Source/drain sidewall junction capacitance grading coefficient"), +IOP( "pbswg", BSIM3v32_MOD_PBSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswg", BSIM3v32_MOD_MJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cj", BSIM3v32_MOD_CJ, IF_REAL, "Source/drain bottom junction capacitance per unit area"), +IOP( "vfbcv", BSIM3v32_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"), +IOP( "vfb", BSIM3v32_MOD_VFB, IF_REAL, "Flat Band Voltage"), +IOP( "cjsw", BSIM3v32_MOD_CJSW, IF_REAL, "Source/drain sidewall junction capacitance per unit periphery"), +IOP( "cjswg", BSIM3v32_MOD_CJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance per unit width"), +IOP( "tpb", BSIM3v32_MOD_TPB, IF_REAL, "Temperature coefficient of pb"), +IOP( "tcj", BSIM3v32_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"), +IOP( "tpbsw", BSIM3v32_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"), +IOP( "tcjsw", BSIM3v32_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"), +IOP( "tpbswg", BSIM3v32_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"), +IOP( "tcjswg", BSIM3v32_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"), +IOP( "acde", BSIM3v32_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"), +IOP( "moin", BSIM3v32_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"), +IOP( "noff", BSIM3v32_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"), +IOP( "voffcv", BSIM3v32_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"), +IOP( "lint", BSIM3v32_MOD_LINT, IF_REAL, "Length reduction parameter"), +IOP( "ll", BSIM3v32_MOD_LL, IF_REAL, "Length reduction parameter"), +IOP( "llc", BSIM3v32_MOD_LLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lln", BSIM3v32_MOD_LLN, IF_REAL, "Length reduction parameter"), +IOP( "lw", BSIM3v32_MOD_LW, IF_REAL, "Length reduction parameter"), +IOP( "lwc", BSIM3v32_MOD_LWC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lwn", BSIM3v32_MOD_LWN, IF_REAL, "Length reduction parameter"), +IOP( "lwl", BSIM3v32_MOD_LWL, IF_REAL, "Length reduction parameter"), +IOP( "lwlc", BSIM3v32_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lmin", BSIM3v32_MOD_LMIN, IF_REAL, "Minimum length for the model"), +IOP( "lmax", BSIM3v32_MOD_LMAX, IF_REAL, "Maximum length for the model"), + +IOP( "xl", BSIM3v32_MOD_XL, IF_REAL, "Length correction parameter"), +IOP( "xw", BSIM3v32_MOD_XW, IF_REAL, "Width correction parameter"), + +IOP( "wr", BSIM3v32_MOD_WR, IF_REAL, "Width dependence of rds"), +IOP( "wint", BSIM3v32_MOD_WINT, IF_REAL, "Width reduction parameter"), +IOP( "dwg", BSIM3v32_MOD_DWG, IF_REAL, "Width reduction parameter"), +IOP( "dwb", BSIM3v32_MOD_DWB, IF_REAL, "Width reduction parameter"), + +IOP( "wl", BSIM3v32_MOD_WL, IF_REAL, "Width reduction parameter"), +IOP( "wlc", BSIM3v32_MOD_WLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wln", BSIM3v32_MOD_WLN, IF_REAL, "Width reduction parameter"), +IOP( "ww", BSIM3v32_MOD_WW, IF_REAL, "Width reduction parameter"), +IOP( "wwc", BSIM3v32_MOD_WWC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wwn", BSIM3v32_MOD_WWN, IF_REAL, "Width reduction parameter"), +IOP( "wwl", BSIM3v32_MOD_WWL, IF_REAL, "Width reduction parameter"), +IOP( "wwlc", BSIM3v32_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wmin", BSIM3v32_MOD_WMIN, IF_REAL, "Minimum width for the model"), +IOP( "wmax", BSIM3v32_MOD_WMAX, IF_REAL, "Maximum width for the model"), + +IOP( "b0", BSIM3v32_MOD_B0, IF_REAL, "Abulk narrow width parameter"), +IOP( "b1", BSIM3v32_MOD_B1, IF_REAL, "Abulk narrow width parameter"), + +IOP( "cgsl", BSIM3v32_MOD_CGSL, IF_REAL, "New C-V model parameter"), +IOP( "cgdl", BSIM3v32_MOD_CGDL, IF_REAL, "New C-V model parameter"), +IOP( "ckappa", BSIM3v32_MOD_CKAPPA, IF_REAL, "New C-V model parameter"), +IOP( "cf", BSIM3v32_MOD_CF, IF_REAL, "Fringe capacitance parameter"), +IOP( "clc", BSIM3v32_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "cle", BSIM3v32_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "dwc", BSIM3v32_MOD_DWC, IF_REAL, "Delta W for C-V model"), +IOP( "dlc", BSIM3v32_MOD_DLC, IF_REAL, "Delta L for C-V model"), + +IOP( "hdif", BSIM3v32_MOD_HDIF, IF_REAL, "ACM Parameter: Distance Gate - contact"), +IOP( "ldif", BSIM3v32_MOD_LDIF, IF_REAL, "ACM Parameter: Length of LDD Gate-Source/Drain"), +IOP( "ld", BSIM3v32_MOD_LD, IF_REAL, "ACM Parameter: Length of LDD under Gate"), +IOP( "rd", BSIM3v32_MOD_RD, IF_REAL, "ACM Parameter: Resistance of LDD drain side"), +IOP( "rs", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance of LDD source side"), +IOP( "rdc", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance contact drain side"), +IOP( "rsc", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance contact source side"), + +IOP( "alpha0", BSIM3v32_MOD_ALPHA0, IF_REAL, "substrate current model parameter"), +IOP( "alpha1", BSIM3v32_MOD_ALPHA1, IF_REAL, "substrate current model parameter"), +IOP( "beta0", BSIM3v32_MOD_BETA0, IF_REAL, "substrate current model parameter"), +IOP( "ijth", BSIM3v32_MOD_IJTH, IF_REAL, "Diode limiting current"), + +IOP( "lcdsc", BSIM3v32_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"), +IOP( "lcdscb", BSIM3v32_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"), +IOP( "lcdscd", BSIM3v32_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"), +IOP( "lcit", BSIM3v32_MOD_LCIT, IF_REAL, "Length dependence of cit"), +IOP( "lnfactor", BSIM3v32_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"), +IOP( "lxj", BSIM3v32_MOD_LXJ, IF_REAL, "Length dependence of xj"), +IOP( "lvsat", BSIM3v32_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), +IOP( "lat", BSIM3v32_MOD_LAT, IF_REAL, "Length dependence of at"), +IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"), +IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"), +IOP( "la1", BSIM3v32_MOD_LA1, IF_REAL, "Length dependence of a1"), +IOP( "la2", BSIM3v32_MOD_LA2, IF_REAL, "Length dependence of a2"), +IOP( "lketa", BSIM3v32_MOD_LKETA, IF_REAL, "Length dependence of keta"), +IOP( "lnsub", BSIM3v32_MOD_LNSUB, IF_REAL, "Length dependence of nsub"), +IOP( "lnch", BSIM3v32_MOD_LNPEAK, IF_REAL, "Length dependence of nch"), +IOP( "lngate", BSIM3v32_MOD_LNGATE, IF_REAL, "Length dependence of ngate"), +IOP( "lgamma1", BSIM3v32_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"), +IOP( "lgamma2", BSIM3v32_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"), +IOP( "lvbx", BSIM3v32_MOD_LVBX, IF_REAL, "Length dependence of vbx"), +IOP( "lvbm", BSIM3v32_MOD_LVBM, IF_REAL, "Length dependence of vbm"), +IOP( "lxt", BSIM3v32_MOD_LXT, IF_REAL, "Length dependence of xt"), +IOP( "lk1", BSIM3v32_MOD_LK1, IF_REAL, "Length dependence of k1"), +IOP( "lkt1", BSIM3v32_MOD_LKT1, IF_REAL, "Length dependence of kt1"), +IOP( "lkt1l", BSIM3v32_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"), +IOP( "lkt2", BSIM3v32_MOD_LKT2, IF_REAL, "Length dependence of kt2"), +IOP( "lk2", BSIM3v32_MOD_LK2, IF_REAL, "Length dependence of k2"), +IOP( "lk3", BSIM3v32_MOD_LK3, IF_REAL, "Length dependence of k3"), +IOP( "lk3b", BSIM3v32_MOD_LK3B, IF_REAL, "Length dependence of k3b"), +IOP( "lw0", BSIM3v32_MOD_LW0, IF_REAL, "Length dependence of w0"), +IOP( "lnlx", BSIM3v32_MOD_LNLX, IF_REAL, "Length dependence of nlx"), +IOP( "ldvt0", BSIM3v32_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"), +IOP( "ldvt1", BSIM3v32_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"), +IOP( "ldvt2", BSIM3v32_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"), +IOP( "ldvt0w", BSIM3v32_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"), +IOP( "ldvt1w", BSIM3v32_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"), +IOP( "ldvt2w", BSIM3v32_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"), +IOP( "ldrout", BSIM3v32_MOD_LDROUT, IF_REAL, "Length dependence of drout"), +IOP( "ldsub", BSIM3v32_MOD_LDSUB, IF_REAL, "Length dependence of dsub"), +IOP( "lvth0", BSIM3v32_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lvtho", BSIM3v32_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lua", BSIM3v32_MOD_LUA, IF_REAL, "Length dependence of ua"), +IOP( "lua1", BSIM3v32_MOD_LUA1, IF_REAL, "Length dependence of ua1"), +IOP( "lub", BSIM3v32_MOD_LUB, IF_REAL, "Length dependence of ub"), +IOP( "lub1", BSIM3v32_MOD_LUB1, IF_REAL, "Length dependence of ub1"), +IOP( "luc", BSIM3v32_MOD_LUC, IF_REAL, "Length dependence of uc"), +IOP( "luc1", BSIM3v32_MOD_LUC1, IF_REAL, "Length dependence of uc1"), +IOP( "lu0", BSIM3v32_MOD_LU0, IF_REAL, "Length dependence of u0"), +IOP( "lute", BSIM3v32_MOD_LUTE, IF_REAL, "Length dependence of ute"), +IOP( "lvoff", BSIM3v32_MOD_LVOFF, IF_REAL, "Length dependence of voff"), +IOP( "lelm", BSIM3v32_MOD_LELM, IF_REAL, "Length dependence of elm"), +IOP( "ldelta", BSIM3v32_MOD_LDELTA, IF_REAL, "Length dependence of delta"), +IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), + +IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), +IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), + +IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "), +IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"), +IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"), +IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), +IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), +IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), +IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), +IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), +IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), +IOP( "lwr", BSIM3v32_MOD_LWR, IF_REAL, "Length dependence of wr"), +IOP( "ldwg", BSIM3v32_MOD_LDWG, IF_REAL, "Length dependence of dwg"), +IOP( "ldwb", BSIM3v32_MOD_LDWB, IF_REAL, "Length dependence of dwb"), +IOP( "lb0", BSIM3v32_MOD_LB0, IF_REAL, "Length dependence of b0"), +IOP( "lb1", BSIM3v32_MOD_LB1, IF_REAL, "Length dependence of b1"), +IOP( "lcgsl", BSIM3v32_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"), +IOP( "lcgdl", BSIM3v32_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"), +IOP( "lckappa", BSIM3v32_MOD_LCKAPPA, IF_REAL, "Length dependence of ckappa"), +IOP( "lcf", BSIM3v32_MOD_LCF, IF_REAL, "Length dependence of cf"), +IOP( "lclc", BSIM3v32_MOD_LCLC, IF_REAL, "Length dependence of clc"), +IOP( "lcle", BSIM3v32_MOD_LCLE, IF_REAL, "Length dependence of cle"), +IOP( "lalpha0", BSIM3v32_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"), +IOP( "lalpha1", BSIM3v32_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"), +IOP( "lbeta0", BSIM3v32_MOD_LBETA0, IF_REAL, "Length dependence of beta0"), +IOP( "lvfbcv", BSIM3v32_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"), +IOP( "lvfb", BSIM3v32_MOD_LVFB, IF_REAL, "Length dependence of vfb"), +IOP( "lacde", BSIM3v32_MOD_LACDE, IF_REAL, "Length dependence of acde"), +IOP( "lmoin", BSIM3v32_MOD_LMOIN, IF_REAL, "Length dependence of moin"), +IOP( "lnoff", BSIM3v32_MOD_LNOFF, IF_REAL, "Length dependence of noff"), +IOP( "lvoffcv", BSIM3v32_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"), +IOP( "wcdsc", BSIM3v32_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), +IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), +IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), +IOP( "wcit", BSIM3v32_MOD_WCIT, IF_REAL, "Width dependence of cit"), +IOP( "wnfactor", BSIM3v32_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), +IOP( "wxj", BSIM3v32_MOD_WXJ, IF_REAL, "Width dependence of xj"), +IOP( "wvsat", BSIM3v32_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), +IOP( "wat", BSIM3v32_MOD_WAT, IF_REAL, "Width dependence of at"), +IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"), +IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"), +IOP( "wa1", BSIM3v32_MOD_WA1, IF_REAL, "Width dependence of a1"), +IOP( "wa2", BSIM3v32_MOD_WA2, IF_REAL, "Width dependence of a2"), +IOP( "wketa", BSIM3v32_MOD_WKETA, IF_REAL, "Width dependence of keta"), +IOP( "wnsub", BSIM3v32_MOD_WNSUB, IF_REAL, "Width dependence of nsub"), +IOP( "wnch", BSIM3v32_MOD_WNPEAK, IF_REAL, "Width dependence of nch"), +IOP( "wngate", BSIM3v32_MOD_WNGATE, IF_REAL, "Width dependence of ngate"), +IOP( "wgamma1", BSIM3v32_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"), +IOP( "wgamma2", BSIM3v32_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"), +IOP( "wvbx", BSIM3v32_MOD_WVBX, IF_REAL, "Width dependence of vbx"), +IOP( "wvbm", BSIM3v32_MOD_WVBM, IF_REAL, "Width dependence of vbm"), +IOP( "wxt", BSIM3v32_MOD_WXT, IF_REAL, "Width dependence of xt"), +IOP( "wk1", BSIM3v32_MOD_WK1, IF_REAL, "Width dependence of k1"), +IOP( "wkt1", BSIM3v32_MOD_WKT1, IF_REAL, "Width dependence of kt1"), +IOP( "wkt1l", BSIM3v32_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"), +IOP( "wkt2", BSIM3v32_MOD_WKT2, IF_REAL, "Width dependence of kt2"), +IOP( "wk2", BSIM3v32_MOD_WK2, IF_REAL, "Width dependence of k2"), +IOP( "wk3", BSIM3v32_MOD_WK3, IF_REAL, "Width dependence of k3"), +IOP( "wk3b", BSIM3v32_MOD_WK3B, IF_REAL, "Width dependence of k3b"), +IOP( "ww0", BSIM3v32_MOD_WW0, IF_REAL, "Width dependence of w0"), +IOP( "wnlx", BSIM3v32_MOD_WNLX, IF_REAL, "Width dependence of nlx"), +IOP( "wdvt0", BSIM3v32_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"), +IOP( "wdvt1", BSIM3v32_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"), +IOP( "wdvt2", BSIM3v32_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"), +IOP( "wdvt0w", BSIM3v32_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"), +IOP( "wdvt1w", BSIM3v32_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"), +IOP( "wdvt2w", BSIM3v32_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"), +IOP( "wdrout", BSIM3v32_MOD_WDROUT, IF_REAL, "Width dependence of drout"), +IOP( "wdsub", BSIM3v32_MOD_WDSUB, IF_REAL, "Width dependence of dsub"), +IOP( "wvth0", BSIM3v32_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wvtho", BSIM3v32_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wua", BSIM3v32_MOD_WUA, IF_REAL, "Width dependence of ua"), +IOP( "wua1", BSIM3v32_MOD_WUA1, IF_REAL, "Width dependence of ua1"), +IOP( "wub", BSIM3v32_MOD_WUB, IF_REAL, "Width dependence of ub"), +IOP( "wub1", BSIM3v32_MOD_WUB1, IF_REAL, "Width dependence of ub1"), +IOP( "wuc", BSIM3v32_MOD_WUC, IF_REAL, "Width dependence of uc"), +IOP( "wuc1", BSIM3v32_MOD_WUC1, IF_REAL, "Width dependence of uc1"), +IOP( "wu0", BSIM3v32_MOD_WU0, IF_REAL, "Width dependence of u0"), +IOP( "wute", BSIM3v32_MOD_WUTE, IF_REAL, "Width dependence of ute"), +IOP( "wvoff", BSIM3v32_MOD_WVOFF, IF_REAL, "Width dependence of voff"), +IOP( "welm", BSIM3v32_MOD_WELM, IF_REAL, "Width dependence of elm"), +IOP( "wdelta", BSIM3v32_MOD_WDELTA, IF_REAL, "Width dependence of delta"), +IOP( "wrdsw", BSIM3v32_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "), + +IOP( "wprwg", BSIM3v32_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), +IOP( "wprwb", BSIM3v32_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), + +IOP( "wprt", BSIM3v32_MOD_WPRT, IF_REAL, "Width dependence of prt"), +IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"), +IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"), +IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), +IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), +IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), +IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), +IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), +IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), +IOP( "wwr", BSIM3v32_MOD_WWR, IF_REAL, "Width dependence of wr"), +IOP( "wdwg", BSIM3v32_MOD_WDWG, IF_REAL, "Width dependence of dwg"), +IOP( "wdwb", BSIM3v32_MOD_WDWB, IF_REAL, "Width dependence of dwb"), +IOP( "wb0", BSIM3v32_MOD_WB0, IF_REAL, "Width dependence of b0"), +IOP( "wb1", BSIM3v32_MOD_WB1, IF_REAL, "Width dependence of b1"), +IOP( "wcgsl", BSIM3v32_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"), +IOP( "wcgdl", BSIM3v32_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"), +IOP( "wckappa", BSIM3v32_MOD_WCKAPPA, IF_REAL, "Width dependence of ckappa"), +IOP( "wcf", BSIM3v32_MOD_WCF, IF_REAL, "Width dependence of cf"), +IOP( "wclc", BSIM3v32_MOD_WCLC, IF_REAL, "Width dependence of clc"), +IOP( "wcle", BSIM3v32_MOD_WCLE, IF_REAL, "Width dependence of cle"), +IOP( "walpha0", BSIM3v32_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"), +IOP( "walpha1", BSIM3v32_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"), +IOP( "wbeta0", BSIM3v32_MOD_WBETA0, IF_REAL, "Width dependence of beta0"), +IOP( "wvfbcv", BSIM3v32_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"), +IOP( "wvfb", BSIM3v32_MOD_WVFB, IF_REAL, "Width dependence of vfb"), +IOP( "wacde", BSIM3v32_MOD_WACDE, IF_REAL, "Width dependence of acde"), +IOP( "wmoin", BSIM3v32_MOD_WMOIN, IF_REAL, "Width dependence of moin"), +IOP( "wnoff", BSIM3v32_MOD_WNOFF, IF_REAL, "Width dependence of noff"), +IOP( "wvoffcv", BSIM3v32_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"), + +IOP( "pcdsc", BSIM3v32_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), +IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), +IOP( "pcdscd", BSIM3v32_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), +IOP( "pcit", BSIM3v32_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), +IOP( "pnfactor", BSIM3v32_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), +IOP( "pxj", BSIM3v32_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), +IOP( "pvsat", BSIM3v32_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), +IOP( "pat", BSIM3v32_MOD_PAT, IF_REAL, "Cross-term dependence of at"), +IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), +IOP( "pags", BSIM3v32_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), +IOP( "pa1", BSIM3v32_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), +IOP( "pa2", BSIM3v32_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), +IOP( "pketa", BSIM3v32_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"), +IOP( "pnsub", BSIM3v32_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"), +IOP( "pnch", BSIM3v32_MOD_PNPEAK, IF_REAL, "Cross-term dependence of nch"), +IOP( "pngate", BSIM3v32_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"), +IOP( "pgamma1", BSIM3v32_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"), +IOP( "pgamma2", BSIM3v32_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"), +IOP( "pvbx", BSIM3v32_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"), +IOP( "pvbm", BSIM3v32_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"), +IOP( "pxt", BSIM3v32_MOD_PXT, IF_REAL, "Cross-term dependence of xt"), +IOP( "pk1", BSIM3v32_MOD_PK1, IF_REAL, "Cross-term dependence of k1"), +IOP( "pkt1", BSIM3v32_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"), +IOP( "pkt1l", BSIM3v32_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"), +IOP( "pkt2", BSIM3v32_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"), +IOP( "pk2", BSIM3v32_MOD_PK2, IF_REAL, "Cross-term dependence of k2"), +IOP( "pk3", BSIM3v32_MOD_PK3, IF_REAL, "Cross-term dependence of k3"), +IOP( "pk3b", BSIM3v32_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"), +IOP( "pw0", BSIM3v32_MOD_PW0, IF_REAL, "Cross-term dependence of w0"), +IOP( "pnlx", BSIM3v32_MOD_PNLX, IF_REAL, "Cross-term dependence of nlx"), +IOP( "pdvt0", BSIM3v32_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"), +IOP( "pdvt1", BSIM3v32_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"), +IOP( "pdvt2", BSIM3v32_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"), +IOP( "pdvt0w", BSIM3v32_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"), +IOP( "pdvt1w", BSIM3v32_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"), +IOP( "pdvt2w", BSIM3v32_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"), +IOP( "pdrout", BSIM3v32_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"), +IOP( "pdsub", BSIM3v32_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"), +IOP( "pvth0", BSIM3v32_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pvtho", BSIM3v32_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pua", BSIM3v32_MOD_PUA, IF_REAL, "Cross-term dependence of ua"), +IOP( "pua1", BSIM3v32_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"), +IOP( "pub", BSIM3v32_MOD_PUB, IF_REAL, "Cross-term dependence of ub"), +IOP( "pub1", BSIM3v32_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"), +IOP( "puc", BSIM3v32_MOD_PUC, IF_REAL, "Cross-term dependence of uc"), +IOP( "puc1", BSIM3v32_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"), +IOP( "pu0", BSIM3v32_MOD_PU0, IF_REAL, "Cross-term dependence of u0"), +IOP( "pute", BSIM3v32_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), +IOP( "pvoff", BSIM3v32_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), +IOP( "pelm", BSIM3v32_MOD_PELM, IF_REAL, "Cross-term dependence of elm"), +IOP( "pdelta", BSIM3v32_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), +IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), + +IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), +IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), + +IOP( "pprt", BSIM3v32_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), +IOP( "peta0", BSIM3v32_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), +IOP( "petab", BSIM3v32_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"), +IOP( "ppclm", BSIM3v32_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"), +IOP( "ppdiblc1", BSIM3v32_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"), +IOP( "ppdiblc2", BSIM3v32_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"), +IOP( "ppdiblcb", BSIM3v32_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "ppscbe1", BSIM3v32_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), +IOP( "ppscbe2", BSIM3v32_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), +IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), +IOP( "pwr", BSIM3v32_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), +IOP( "pdwg", BSIM3v32_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), +IOP( "pdwb", BSIM3v32_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), +IOP( "pb0", BSIM3v32_MOD_PB0, IF_REAL, "Cross-term dependence of b0"), +IOP( "pb1", BSIM3v32_MOD_PB1, IF_REAL, "Cross-term dependence of b1"), +IOP( "pcgsl", BSIM3v32_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"), +IOP( "pcgdl", BSIM3v32_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"), +IOP( "pckappa", BSIM3v32_MOD_PCKAPPA, IF_REAL, "Cross-term dependence of ckappa"), +IOP( "pcf", BSIM3v32_MOD_PCF, IF_REAL, "Cross-term dependence of cf"), +IOP( "pclc", BSIM3v32_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"), +IOP( "pcle", BSIM3v32_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"), +IOP( "palpha0", BSIM3v32_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"), +IOP( "palpha1", BSIM3v32_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"), +IOP( "pbeta0", BSIM3v32_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"), +IOP( "pvfbcv", BSIM3v32_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"), +IOP( "pvfb", BSIM3v32_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"), +IOP( "pacde", BSIM3v32_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"), +IOP( "pmoin", BSIM3v32_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"), +IOP( "pnoff", BSIM3v32_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"), +IOP( "pvoffcv", BSIM3v32_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"), + +IOP( "noia", BSIM3v32_MOD_NOIA, IF_REAL, "Flicker noise parameter"), +IOP( "noib", BSIM3v32_MOD_NOIB, IF_REAL, "Flicker noise parameter"), +IOP( "noic", BSIM3v32_MOD_NOIC, IF_REAL, "Flicker noise parameter"), +IOP( "em", BSIM3v32_MOD_EM, IF_REAL, "Flicker noise parameter"), +IOP( "ef", BSIM3v32_MOD_EF, IF_REAL, "Flicker noise frequency exponent"), +IOP( "af", BSIM3v32_MOD_AF, IF_REAL, "Flicker noise exponent"), +IOP( "kf", BSIM3v32_MOD_KF, IF_REAL, "Flicker noise coefficient"), + +IP( "nmos", BSIM3v32_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"), +IP( "pmos", BSIM3v32_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"), +}; + +char *BSIM3v32names[] = { + "Drain", + "Gate", + "Source", + "Bulk", + "Charge" +}; + +int BSIM3v32nSize = NUMELEMS(BSIM3v32names); +int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable); +int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable); +int BSIM3v32iSize = sizeof(BSIM3v32instance); +int BSIM3v32mSize = sizeof(BSIM3v32model); + + + diff --git a/src/spicelib/devices/bsim3v32/b3v32acld.c b/src/spicelib/devices/bsim3v32/b3v32acld.c new file mode 100644 index 000000000..a71be75f0 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32acld.c @@ -0,0 +1,364 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3acld.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v32acLoad (GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; +double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb; +double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb; +double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega; +double GSoverlapCap, GDoverlapCap, GBoverlapCap, FwdSum, RevSum, Gm, Gmbs; +double dxpart, sxpart, xgtg, xgtd, xgts, xgtb; +double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css; +double ScalingFactor = 1.0e-9; +double m; + + omega = ckt->CKTomega; + for (; model != NULL; model = model->BSIM3v32nextModel) + { for (here = model->BSIM3v32instances; here!= NULL; + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner != ARCHme) + continue; + + if (here->BSIM3v32mode >= 0) + { Gm = here->BSIM3v32gm; + Gmbs = here->BSIM3v32gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + gbbdp = -here->BSIM3v32gbds; + gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs; + + gbdpg = here->BSIM3v32gbgs; + gbdpb = here->BSIM3v32gbbs; + gbdpdp = here->BSIM3v32gbds; + gbdpsp = -(gbdpg + gbdpb + gbdpdp); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (here->BSIM3v32nqsMod == 0) + { cggb = here->BSIM3v32cggb; + cgsb = here->BSIM3v32cgsb; + cgdb = here->BSIM3v32cgdb; + + cbgb = here->BSIM3v32cbgb; + cbsb = here->BSIM3v32cbsb; + cbdb = here->BSIM3v32cbdb; + + cdgb = here->BSIM3v32cdgb; + cdsb = here->BSIM3v32cdsb; + cddb = here->BSIM3v32cddb; + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { cggb = cgdb = cgsb = 0.0; + cbgb = cbdb = cbsb = 0.0; + cdgb = cddb = cdsb = 0.0; + + xgtg = here->BSIM3v32gtg; + xgtd = here->BSIM3v32gtd; + xgts = here->BSIM3v32gts; + xgtb = here->BSIM3v32gtb; + + xcqgb = here->BSIM3v32cqgb * omega; + xcqdb = here->BSIM3v32cqdb * omega; + xcqsb = here->BSIM3v32cqsb * omega; + xcqbb = here->BSIM3v32cqbb * omega; + + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + * here->pParam->BSIM3v32leffCV; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM3v32qdrn / qcheq; + Cdd = here->BSIM3v32cddb; + Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM3v32cdgb; + Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM3v32cdsb; + Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + } + else + { Gm = -here->BSIM3v32gm; + Gmbs = -here->BSIM3v32gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + gbbsp = -here->BSIM3v32gbds; + gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM3v32gbgs; + gbspsp = here->BSIM3v32gbds; + gbspb = here->BSIM3v32gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (here->BSIM3v32nqsMod == 0) + { cggb = here->BSIM3v32cggb; + cgsb = here->BSIM3v32cgdb; + cgdb = here->BSIM3v32cgsb; + + cbgb = here->BSIM3v32cbgb; + cbsb = here->BSIM3v32cbdb; + cbdb = here->BSIM3v32cbsb; + + cdgb = -(here->BSIM3v32cdgb + cggb + cbgb); + cdsb = -(here->BSIM3v32cddb + cgsb + cbsb); + cddb = -(here->BSIM3v32cdsb + cgdb + cbdb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { cggb = cgdb = cgsb = 0.0; + cbgb = cbdb = cbsb = 0.0; + cdgb = cddb = cdsb = 0.0; + + xgtg = here->BSIM3v32gtg; + xgtd = here->BSIM3v32gts; + xgts = here->BSIM3v32gtd; + xgtb = here->BSIM3v32gtb; + + xcqgb = here->BSIM3v32cqgb * omega; + xcqdb = here->BSIM3v32cqsb * omega; + xcqsb = here->BSIM3v32cqdb * omega; + xcqbb = here->BSIM3v32cqbb * omega; + + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + * here->pParam->BSIM3v32leffCV; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM3v32qdrn / qcheq; + Css = here->BSIM3v32cddb; + Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM3v32cdgb; + Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM3v32cdsb; + Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + } + + T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; + gdpr = here->BSIM3v32drainConductance; + gspr = here->BSIM3v32sourceConductance; + gds = here->BSIM3v32gds; + gbd = here->BSIM3v32gbd; + gbs = here->BSIM3v32gbs; + capbd = here->BSIM3v32capbd; + capbs = here->BSIM3v32capbs; + + GSoverlapCap = here->BSIM3v32cgso; + GDoverlapCap = here->BSIM3v32cgdo; + GBoverlapCap = here->pParam->BSIM3v32cgbo; + + xcdgb = (cdgb - GDoverlapCap) * omega; + xcddb = (cddb + capbd + GDoverlapCap) * omega; + xcdsb = cdsb * omega; + xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap) * omega; + xcsdb = -(cgdb + cbdb + cddb) * omega; + xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega; + xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap) + * omega; + xcgdb = (cgdb - GDoverlapCap ) * omega; + xcgsb = (cgsb - GSoverlapCap) * omega; + xcbgb = (cbgb - GBoverlapCap) * omega; + xcbdb = (cbdb - capbd ) * omega; + xcbsb = (cbsb - capbs ) * omega; + + m = here->BSIM3v32m; + + *(here->BSIM3v32GgPtr + 1) += m * xcggb; + *(here->BSIM3v32BbPtr + 1) -= + m * (xcbgb + xcbdb + xcbsb); + *(here->BSIM3v32DPdpPtr + 1) += m * xcddb; + *(here->BSIM3v32SPspPtr + 1) += m * xcssb; + *(here->BSIM3v32GbPtr + 1) -= + m * (xcggb + xcgdb + xcgsb); + *(here->BSIM3v32GdpPtr + 1) += m * xcgdb; + *(here->BSIM3v32GspPtr + 1) += m * xcgsb; + *(here->BSIM3v32BgPtr + 1) += m * xcbgb; + *(here->BSIM3v32BdpPtr + 1) += m * xcbdb; + *(here->BSIM3v32BspPtr + 1) += m * xcbsb; + *(here->BSIM3v32DPgPtr + 1) += m * xcdgb; + *(here->BSIM3v32DPbPtr + 1) -= + m * (xcdgb + xcddb + xcdsb); + *(here->BSIM3v32DPspPtr + 1) += m * xcdsb; + *(here->BSIM3v32SPgPtr + 1) += m * xcsgb; + *(here->BSIM3v32SPbPtr + 1) -= + m * (xcsgb + xcsdb + xcssb); + *(here->BSIM3v32SPdpPtr + 1) += m * xcsdb; + + *(here->BSIM3v32DdPtr) += m * gdpr; + *(here->BSIM3v32SsPtr) += m * gspr; + *(here->BSIM3v32BbPtr) += + m * (gbd + gbs - here->BSIM3v32gbbs); + *(here->BSIM3v32DPdpPtr) += + m * (gdpr + gds + gbd + RevSum + + dxpart * xgtd + T1 * ddxpart_dVd + + gbdpdp); + *(here->BSIM3v32SPspPtr) += + m * (gspr + gds + gbs + FwdSum + + sxpart * xgts + T1 * dsxpart_dVs + + gbspsp); + + *(here->BSIM3v32DdpPtr) -= m * gdpr; + *(here->BSIM3v32SspPtr) -= m * gspr; + + *(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs; + *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); + *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); + + *(here->BSIM3v32DPdPtr) -= m * gdpr; + *(here->BSIM3v32DPgPtr) += + m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg + + gbdpg); + *(here->BSIM3v32DPbPtr) -= + m * (gbd - Gmbs - dxpart * xgtb - + T1 * ddxpart_dVb - gbdpb); + *(here->BSIM3v32DPspPtr) -= + m * (gds + FwdSum - dxpart * xgts - + T1 * ddxpart_dVs - gbdpsp); + + *(here->BSIM3v32SPgPtr) -= + m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg - + gbspg); + *(here->BSIM3v32SPsPtr) -= m * gspr; + *(here->BSIM3v32SPbPtr) -= + m * (gbs + Gmbs - sxpart * xgtb - + T1 * dsxpart_dVb - gbspb); + *(here->BSIM3v32SPdpPtr) -= + m * (gds + RevSum - sxpart * xgtd - + T1 * dsxpart_dVd - gbspdp); + + *(here->BSIM3v32GgPtr) -= m * xgtg; + *(here->BSIM3v32GbPtr) -= m * xgtb; + *(here->BSIM3v32GdpPtr) -= m * xgtd; + *(here->BSIM3v32GspPtr) -= m * xgts; + + if (here->BSIM3v32nqsMod) + { + *(here->BSIM3v32QqPtr + 1) += + m * omega * ScalingFactor; + *(here->BSIM3v32QgPtr + 1) -= m * xcqgb; + *(here->BSIM3v32QdpPtr + 1) -= m * xcqdb; + *(here->BSIM3v32QspPtr + 1) -= m * xcqsb; + *(here->BSIM3v32QbPtr + 1) -= m * xcqbb; + + *(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau; + + *(here->BSIM3v32DPqPtr) += + m * (dxpart * here->BSIM3v32gtau); + *(here->BSIM3v32SPqPtr) += + m * (sxpart * here->BSIM3v32gtau); + *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; + + *(here->BSIM3v32QgPtr) += m * xgtg; + *(here->BSIM3v32QdpPtr) += m * xgtd; + *(here->BSIM3v32QspPtr) += m * xgts; + *(here->BSIM3v32QbPtr) += m * xgtb; + } + } + } + return(OK); +} + diff --git a/src/spicelib/devices/bsim3v32/b3v32ask.c b/src/spicelib/devices/bsim3v32/b3v32ask.c new file mode 100644 index 000000000..70a6aab2c --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32ask.c @@ -0,0 +1,226 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3ask.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified bt Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value, + IFvalue *select) +{ +BSIM3v32instance *here = (BSIM3v32instance*)inst; + + switch(which) + { case BSIM3v32_L: + value->rValue = here->BSIM3v32l; + return(OK); + case BSIM3v32_W: + value->rValue = here->BSIM3v32w; + return(OK); + case BSIM3v32_M: + value->rValue = here->BSIM3v32m; + return (OK); + case BSIM3v32_AS: + value->rValue = here->BSIM3v32sourceArea; + return(OK); + case BSIM3v32_AD: + value->rValue = here->BSIM3v32drainArea; + return(OK); + case BSIM3v32_PS: + value->rValue = here->BSIM3v32sourcePerimeter; + return(OK); + case BSIM3v32_PD: + value->rValue = here->BSIM3v32drainPerimeter; + return(OK); + case BSIM3v32_NRS: + value->rValue = here->BSIM3v32sourceSquares; + return(OK); + case BSIM3v32_NRD: + value->rValue = here->BSIM3v32drainSquares; + return(OK); + case BSIM3v32_OFF: + value->rValue = here->BSIM3v32off; + return(OK); + case BSIM3v32_NQSMOD: + value->iValue = here->BSIM3v32nqsMod; + return(OK); + case BSIM3v32_IC_VBS: + value->rValue = here->BSIM3v32icVBS; + return(OK); + case BSIM3v32_IC_VDS: + value->rValue = here->BSIM3v32icVDS; + return(OK); + case BSIM3v32_IC_VGS: + value->rValue = here->BSIM3v32icVGS; + return(OK); + case BSIM3v32_DNODE: + value->iValue = here->BSIM3v32dNode; + return(OK); + case BSIM3v32_GNODE: + value->iValue = here->BSIM3v32gNode; + return(OK); + case BSIM3v32_SNODE: + value->iValue = here->BSIM3v32sNode; + return(OK); + case BSIM3v32_BNODE: + value->iValue = here->BSIM3v32bNode; + return(OK); + case BSIM3v32_DNODEPRIME: + value->iValue = here->BSIM3v32dNodePrime; + return(OK); + case BSIM3v32_SNODEPRIME: + value->iValue = here->BSIM3v32sNodePrime; + return(OK); + case BSIM3v32_SOURCECONDUCT: + value->rValue = here->BSIM3v32sourceConductance; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_DRAINCONDUCT: + value->rValue = here->BSIM3v32drainConductance; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_VBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd); + return(OK); + case BSIM3v32_VBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbs); + return(OK); + case BSIM3v32_VGS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vgs); + return(OK); + case BSIM3v32_VDS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vds); + return(OK); + case BSIM3v32_CD: + value->rValue = here->BSIM3v32cd; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CBS: + value->rValue = here->BSIM3v32cbs; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CBD: + value->rValue = here->BSIM3v32cbd; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_GM: + value->rValue = here->BSIM3v32gm; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_GDS: + value->rValue = here->BSIM3v32gds; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_GMBS: + value->rValue = here->BSIM3v32gmbs; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_GBD: + value->rValue = here->BSIM3v32gbd; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_GBS: + value->rValue = here->BSIM3v32gbs; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_QB: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CQB: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_QG: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CQG: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_QD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CQD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CGG: + value->rValue = here->BSIM3v32cggb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CGD: + value->rValue = here->BSIM3v32cgdb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CGS: + value->rValue = here->BSIM3v32cgsb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CDG: + value->rValue = here->BSIM3v32cdgb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CDD: + value->rValue = here->BSIM3v32cddb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CDS: + value->rValue = here->BSIM3v32cdsb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CBG: + value->rValue = here->BSIM3v32cbgb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CBDB: + value->rValue = here->BSIM3v32cbdb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CBSB: + value->rValue = here->BSIM3v32cbsb; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CAPBD: + value->rValue = here->BSIM3v32capbd; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_CAPBS: + value->rValue = here->BSIM3v32capbs; + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_VON: + value->rValue = here->BSIM3v32von; + return(OK); + case BSIM3v32_VDSAT: + value->rValue = here->BSIM3v32vdsat; + return(OK); + case BSIM3v32_QBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs); + value->rValue *= here->BSIM3v32m; + return(OK); + case BSIM3v32_QBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd); + value->rValue *= here->BSIM3v32m; + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + diff --git a/src/spicelib/devices/bsim3v32/b3v32check.c b/src/spicelib/devices/bsim3v32/b3v32check.c new file mode 100644 index 000000000..aaeadea34 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32check.c @@ -0,0 +1,449 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3check.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Xuemei Xi, 10/05, 12/14, 2001. + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" +#include "suffix.h" + +int +BSIM3v32checkModel (BSIM3v32model *model, BSIM3v32instance *here, CKTcircuit *ckt) +{ +struct bsim3SizeDependParam *pParam; +int Fatal_Flag = 0; +FILE *fplog; + + if ((fplog = fopen("b3v3check.log", "w")) != NULL) + { pParam = here->pParam; + + fprintf (fplog, + "BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n"); + fprintf (fplog, "Parameter Checking.\n"); + fprintf (fplog, "Model = %s\n", model->BSIM3v32modName); + fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w, + here->BSIM3v32l, here->BSIM3v32m); + + if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24")) + && (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23")) + && (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22")) + && (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20"))) + { + fprintf (fplog, + "Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); + fprintf (fplog, + "You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); + printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); + printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); + } + + if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff) + { fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n", + pParam->BSIM3v32nlx); + printf("Fatal: Nlx = %g is less than -Leff.\n", + pParam->BSIM3v32nlx); + Fatal_Flag = 1; + } + + if (model->BSIM3v32tox <= 0.0) + { fprintf(fplog, "Fatal: Tox = %g is not positive.\n", + model->BSIM3v32tox); + printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox); + Fatal_Flag = 1; + } + + if (model->BSIM3v32toxm <= 0.0) + { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", + model->BSIM3v32toxm); + printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32npeak <= 0.0) + { fprintf(fplog, "Fatal: Nch = %g is not positive.\n", + pParam->BSIM3v32npeak); + printf("Fatal: Nch = %g is not positive.\n", + pParam->BSIM3v32npeak); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32nsub <= 0.0) + { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", + pParam->BSIM3v32nsub); + printf("Fatal: Nsub = %g is not positive.\n", + pParam->BSIM3v32nsub); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32ngate < 0.0) + { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", + pParam->BSIM3v32ngate); + printf("Fatal: Ngate = %g Ngate is not positive.\n", + pParam->BSIM3v32ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32ngate > 1.e25) + { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", + pParam->BSIM3v32ngate); + printf("Fatal: Ngate = %g Ngate is too high\n", + pParam->BSIM3v32ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32xj <= 0.0) + { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", + pParam->BSIM3v32xj); + printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32dvt1 < 0.0) + { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", + pParam->BSIM3v32dvt1); + printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32dvt1w < 0.0) + { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", + pParam->BSIM3v32dvt1w); + printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff) + { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32dsub < 0.0) + { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); + printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff) + { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32u0temp <= 0.0) + { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp); + printf("Fatal: u0 at current temperature = %g is not positive.\n", + pParam->BSIM3v32u0temp); + Fatal_Flag = 1; + } + +/* Check delta parameter */ + if (pParam->BSIM3v32delta < 0.0) + { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", + pParam->BSIM3v32delta); + printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32vsattemp <= 0.0) + { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp); + printf("Fatal: Vsat at current temperature = %g is not positive.\n", + pParam->BSIM3v32vsattemp); + Fatal_Flag = 1; + } +/* Check Rout parameters */ + if (pParam->BSIM3v32pclm <= 0.0) + { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); + printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32drout < 0.0) + { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); + printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32pscbe2 <= 0.0) + { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", + pParam->BSIM3v32pscbe2); + printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2); + } + + /* acm model */ + if (model->BSIM3v32acmMod == 0) { + if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 || + model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) + { + if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff) + { fprintf(fplog, "Warning: Pd = %g is less than W.\n", + here->BSIM3v32drainPerimeter); + printf("Warning: Pd = %g is less than W.\n", + here->BSIM3v32drainPerimeter); + } + if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff) + { fprintf(fplog, "Warning: Ps = %g is less than W.\n", + here->BSIM3v32sourcePerimeter); + printf("Warning: Ps = %g is less than W.\n", + here->BSIM3v32sourcePerimeter); + } + } + } + + if (pParam->BSIM3v32noff < 0.1) + { fprintf(fplog, "Warning: Noff = %g is too small.\n", + pParam->BSIM3v32noff); + printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff); + } + if (pParam->BSIM3v32noff > 4.0) + { fprintf(fplog, "Warning: Noff = %g is too large.\n", + pParam->BSIM3v32noff); + printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff); + } + + if (pParam->BSIM3v32voffcv < -0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too small.\n", + pParam->BSIM3v32voffcv); + printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv); + } + if (pParam->BSIM3v32voffcv > 0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too large.\n", + pParam->BSIM3v32voffcv); + printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv); + } + + if (model->BSIM3v32ijth < 0.0) + { fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n", + model->BSIM3v32ijth); + printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth); + Fatal_Flag = 1; + } + +/* Check capacitance parameters */ + if (pParam->BSIM3v32clc < 0.0) + { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); + printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v32moin < 5.0) + { fprintf(fplog, "Warning: Moin = %g is too small.\n", + pParam->BSIM3v32moin); + printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin); + } + if (pParam->BSIM3v32moin > 25.0) + { fprintf(fplog, "Warning: Moin = %g is too large.\n", + pParam->BSIM3v32moin); + printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin); + } + + if(model->BSIM3v32capMod ==3) { + if (pParam->BSIM3v32acde < 0.4) + { fprintf(fplog, "Warning: Acde = %g is too small.\n", + pParam->BSIM3v32acde); + printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde); + } + if (pParam->BSIM3v32acde > 1.6) + { fprintf(fplog, "Warning: Acde = %g is too large.\n", + pParam->BSIM3v32acde); + printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde); + } + } + + if (model->BSIM3v32paramChk ==1) + { +/* Check L and W parameters */ + if (pParam->BSIM3v32leff <= 5.0e-8) + { fprintf(fplog, "Warning: Leff = %g may be too small.\n", + pParam->BSIM3v32leff); + printf("Warning: Leff = %g may be too small.\n", + pParam->BSIM3v32leff); + } + + if (pParam->BSIM3v32leffCV <= 5.0e-8) + { fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n", + pParam->BSIM3v32leffCV); + printf("Warning: Leff for CV = %g may be too small.\n", + pParam->BSIM3v32leffCV); + } + + if (pParam->BSIM3v32weff <= 1.0e-7) + { fprintf(fplog, "Warning: Weff = %g may be too small.\n", + pParam->BSIM3v32weff); + printf("Warning: Weff = %g may be too small.\n", + pParam->BSIM3v32weff); + } + + if (pParam->BSIM3v32weffCV <= 1.0e-7) + { fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n", + pParam->BSIM3v32weffCV); + printf("Warning: Weff for CV = %g may be too small.\n", + pParam->BSIM3v32weffCV); + } + +/* Check threshold voltage parameters */ + if (pParam->BSIM3v32nlx < 0.0) + { fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); + printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); + } + if (model->BSIM3v32tox < 1.0e-9) + { fprintf(fplog, "Warning: Tox = %g is less than 10A.\n", + model->BSIM3v32tox); + printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox); + } + + if (pParam->BSIM3v32npeak <= 1.0e15) + { fprintf(fplog, "Warning: Nch = %g may be too small.\n", + pParam->BSIM3v32npeak); + printf("Warning: Nch = %g may be too small.\n", + pParam->BSIM3v32npeak); + } + else if (pParam->BSIM3v32npeak >= 1.0e21) + { fprintf(fplog, "Warning: Nch = %g may be too large.\n", + pParam->BSIM3v32npeak); + printf("Warning: Nch = %g may be too large.\n", + pParam->BSIM3v32npeak); + } + + if (pParam->BSIM3v32nsub <= 1.0e14) + { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", + pParam->BSIM3v32nsub); + printf("Warning: Nsub = %g may be too small.\n", + pParam->BSIM3v32nsub); + } + else if (pParam->BSIM3v32nsub >= 1.0e21) + { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", + pParam->BSIM3v32nsub); + printf("Warning: Nsub = %g may be too large.\n", + pParam->BSIM3v32nsub); + } + + if ((pParam->BSIM3v32ngate > 0.0) && + (pParam->BSIM3v32ngate <= 1.e18)) + { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM3v32ngate); + printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM3v32ngate); + } + + if (pParam->BSIM3v32dvt0 < 0.0) + { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", + pParam->BSIM3v32dvt0); + printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0); + } + + if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0) + { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); + printf("Warning: (W0 + Weff) may be too small.\n"); + } + +/* Check subthreshold parameters */ + if (pParam->BSIM3v32nfactor < 0.0) + { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", + pParam->BSIM3v32nfactor); + printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor); + } + if (pParam->BSIM3v32cdsc < 0.0) + { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", + pParam->BSIM3v32cdsc); + printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc); + } + if (pParam->BSIM3v32cdscd < 0.0) + { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", + pParam->BSIM3v32cdscd); + printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd); + } +/* Check DIBL parameters */ + if (pParam->BSIM3v32eta0 < 0.0) + { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", + pParam->BSIM3v32eta0); + printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0); + } + +/* Check Abulk parameters */ + if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0) + { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); + printf("Warning: (B1 + Weff) may be too small.\n"); + } + + +/* Check Saturation parameters */ + if (pParam->BSIM3v32a2 < 0.01) + { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2); + printf("Warning: A2 = %g is too small. Set to 0.01.\n", + pParam->BSIM3v32a2); + pParam->BSIM3v32a2 = 0.01; + } + else if (pParam->BSIM3v32a2 > 1.0) + { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM3v32a2); + printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM3v32a2); + pParam->BSIM3v32a2 = 1.0; + pParam->BSIM3v32a1 = 0.0; + + } + + if (pParam->BSIM3v32rdsw < 0.0) + { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM3v32rdsw); + printf("Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM3v32rdsw); + pParam->BSIM3v32rdsw = 0.0; + pParam->BSIM3v32rds0 = 0.0; + } + else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001)) + { fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", + pParam->BSIM3v32rds0); + printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", + pParam->BSIM3v32rds0); + pParam->BSIM3v32rds0 = 0.0; + } + if (pParam->BSIM3v32vsattemp < 1.0e3) + { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); + printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); + } + + if (pParam->BSIM3v32pdibl1 < 0.0) + { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", + pParam->BSIM3v32pdibl1); + printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1); + } + if (pParam->BSIM3v32pdibl2 < 0.0) + { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", + pParam->BSIM3v32pdibl2); + printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2); + } +/* Check overlap capacitance parameters */ + if (model->BSIM3v32cgdo < 0.0) + { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); + printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); + model->BSIM3v32cgdo = 0.0; + } + if (model->BSIM3v32cgso < 0.0) + { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); + printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); + model->BSIM3v32cgso = 0.0; + } + if (model->BSIM3v32cgbo < 0.0) + { fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); + printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); + model->BSIM3v32cgbo = 0.0; + } + + }/* loop for the parameter check for warning messages */ + fclose(fplog); + } + else + { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); + } + + return(Fatal_Flag); +} + diff --git a/src/spicelib/devices/bsim3v32/b3v32cvtest.c b/src/spicelib/devices/bsim3v32/b3v32cvtest.c new file mode 100644 index 000000000..523500c94 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32cvtest.c @@ -0,0 +1,110 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3cvtest.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "trandefs.h" +#include "const.h" +#include "devdefs.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v32convTest (GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; +double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds; +double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs; + + /* loop through all the BSIM3v32 device models */ + for (; model != NULL; model = model->BSIM3v32nextModel) + { /* loop through all the instances of the model */ + for (here = model->BSIM3v32instances; here != NULL ; + here=here->BSIM3v32nextInstance) + { + + if (here->BSIM3v32owner != ARCHme) + continue; + + vbs = model->BSIM3v32type + * (*(ckt->CKTrhsOld+here->BSIM3v32bNode) + - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); + vgs = model->BSIM3v32type + * (*(ckt->CKTrhsOld+here->BSIM3v32gNode) + - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); + vds = model->BSIM3v32type + * (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime) + - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); + vbd = vbs - vds; + vgd = vgs - vds; + vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs) + - *(ckt->CKTstate0 + here->BSIM3v32vds); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs); + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs); + delvds = vds - *(ckt->CKTstate0 + here->BSIM3v32vds); + delvgd = vgd-vgdo; + + cd = here->BSIM3v32cd - here->BSIM3v32cbd; + if (here->BSIM3v32mode >= 0) + { cd += here->BSIM3v32csub; + cdhat = cd - here->BSIM3v32gbd * delvbd + + (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs + + (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs + + (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds; + } + else + { cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd + + here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds; + } + + /* + * check convergence + */ + if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd)) + + ckt->CKTabstol; + if (fabs(cdhat - cd) >= tol) + { ckt->CKTnoncon++; + return(OK); + } + cbs = here->BSIM3v32cbs; + cbd = here->BSIM3v32cbd; + if (here->BSIM3v32mode >= 0) + { cbhat = cbs + cbd - here->BSIM3v32csub + + here->BSIM3v32gbd * delvbd + + (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs + - here->BSIM3v32gbgs * delvgs + - here->BSIM3v32gbds * delvds; + } + else + { cbhat = cbs + cbd - here->BSIM3v32csub + + here->BSIM3v32gbs * delvbs + + (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd + - here->BSIM3v32gbgs * delvgd + + here->BSIM3v32gbds * delvds; + } + tol = ckt->CKTreltol * MAX(fabs(cbhat), + fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol; + if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol) + { ckt->CKTnoncon++; + return(OK); + } + } + } + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim3v32/b3v32del.c b/src/spicelib/devices/bsim3v32/b3v32del.c new file mode 100644 index 000000000..906d610af --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32del.c @@ -0,0 +1,40 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3del.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Xuemei Xi, 10/05, 12/14, 2001. + * Modified by Paolo Nenzi 2002 + **********/ + +#include "ngspice.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "gendefs.h" +#include "suffix.h" + + +int +BSIM3v32delete (GENmodel *inModel, IFuid name, GENinstance **inInst) +{ +BSIM3v32instance **fast = (BSIM3v32instance**)inInst; +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance **prev = NULL; +BSIM3v32instance *here; + + for (; model ; model = model->BSIM3v32nextModel) + { prev = &(model->BSIM3v32instances); + for (here = *prev; here ; here = *prev) + { if (here->BSIM3v32name == name || (fast && here==*fast)) + { *prev= here->BSIM3v32nextInstance; + FREE(here); + return(OK); + } + prev = &(here->BSIM3v32nextInstance); + } + } + return(E_NODEV); +} diff --git a/src/spicelib/devices/bsim3v32/b3v32dest.c b/src/spicelib/devices/bsim3v32/b3v32dest.c new file mode 100644 index 000000000..1dde4a447 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32dest.c @@ -0,0 +1,38 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3dest.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 + **********/ + +#include "ngspice.h" +#include "bsim3v32def.h" +#include "suffix.h" + +void +BSIM3v32destroy (GENmodel **inModel) +{ +BSIM3v32model **model = (BSIM3v32model**)inModel; +BSIM3v32instance *here; +BSIM3v32instance *prev = NULL; +BSIM3v32model *mod = *model; +BSIM3v32model *oldmod = NULL; + + for (; mod ; mod = mod->BSIM3v32nextModel) + { if(oldmod) FREE(oldmod); + oldmod = mod; + prev = (BSIM3v32instance *)NULL; + for (here = mod->BSIM3v32instances; here; here = here->BSIM3v32nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + } + if(oldmod) FREE(oldmod); + *model = NULL; + return; +} diff --git a/src/spicelib/devices/bsim3v32/b3v32getic.c b/src/spicelib/devices/bsim3v32/b3v32getic.c new file mode 100644 index 000000000..1c52b0ee5 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32getic.c @@ -0,0 +1,47 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3getic.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v32getic (GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; + + for (; model ; model = model->BSIM3v32nextModel) + { for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner != ARCHme) + continue; + + if (!here->BSIM3v32icVBSGiven) + { here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode) + - *(ckt->CKTrhs + here->BSIM3v32sNode); + } + if (!here->BSIM3v32icVDSGiven) + { here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode) + - *(ckt->CKTrhs + here->BSIM3v32sNode); + } + if (!here->BSIM3v32icVGSGiven) + { here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode) + - *(ckt->CKTrhs + here->BSIM3v32sNode); + } + } + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim3v32/b3v32ld.c b/src/spicelib/devices/bsim3v32/b3v32ld.c new file mode 100644 index 000000000..357a8323e --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32ld.c @@ -0,0 +1,3296 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3ld.c of BSIM3v3.2.4 + * Author: 1991 JianHui Huang and Min-Chie Jeng. + * Modified by Mansun Chan (1995). + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Xuemei Xi, 10/05, 12/21, 2001. + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" +#include "suffix.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPSOX 3.453133e-11 +#define EPSSI 1.03594e-10 +#define Charge_q 1.60219e-19 +#define DELTA_1 0.02 +#define DELTA_2 0.02 +#define DELTA_3 0.02 +#define DELTA_4 0.02 + + +int +BSIM3v32load (GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; +double SourceSatCurrent, DrainSatCurrent; +double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst; +double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq; +double czbd, czbdsw, czbdswg, czbs, czbssw, czbsswg, evbd, evbs, arg, sarg; +double delvbd, delvbs, delvds, delvgd, delvgs; +double Vfbeff, dVfbeff_dVg, dVfbeff_dVd = 0.0, dVfbeff_dVb, V3, V4; +double gcbdb, gcbgb, gcbsb, gcddb, gcdgb, gcdsb, gcgdb, gcggb, gcgsb, gcsdb; +double gcsgb, gcssb, MJ, MJSW, MJSWG; +double vbd, vbs, vds, vgb, vgd, vgs, vgdo, xfact; +double qgate = 0.0, qbulk = 0.0, qdrn = 0.0, qsrc; +double qinoi, cqgate, cqbulk, cqdrn; +double Vds, Vgs, Vbs, Gmbs, FwdSum, RevSum; +double Vgs_eff, Vfb, dVfb_dVb = 0.0, dVfb_dVd = 0.0; +double Phis, dPhis_dVb, sqrtPhis, dsqrtPhis_dVb, Vth, dVth_dVb, dVth_dVd; +double Vgst, dVgst_dVg, dVgst_dVb, dVgs_eff_dVg, Nvtm; +double Vtm; +double n, dn_dVb, dn_dVd, voffcv, noff, dnoff_dVd, dnoff_dVb; +double ExpArg, V0, CoxWLcen, QovCox, LINK; +double DeltaPhi, dDeltaPhi_dVg, dDeltaPhi_dVd, dDeltaPhi_dVb; +double Cox, Tox, Tcen, dTcen_dVg, dTcen_dVd, dTcen_dVb; +double Ccen, Coxeff, dCoxeff_dVg, dCoxeff_dVd, dCoxeff_dVb; +double Denomi, dDenomi_dVg, dDenomi_dVd, dDenomi_dVb; +double ueff, dueff_dVg, dueff_dVd, dueff_dVb; +double Esat, Vdsat; +double EsatL, dEsatL_dVg, dEsatL_dVd, dEsatL_dVb; +double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; +double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, dVa_dVd, dVa_dVg, dVa_dVb; +double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; +double Arg1, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; +double T0, dT0_dVg, dT0_dVd, dT0_dVb; +double T1, dT1_dVg, dT1_dVd, dT1_dVb; +double T2, dT2_dVg, dT2_dVd, dT2_dVb; +double T3, dT3_dVg, dT3_dVd, dT3_dVb; +double T4; +double T5; +double T6; +double T7; +double T8; +double T9; +double T10; +double T11, T12; +double tmp, Abulk, dAbulk_dVb, Abulk0, dAbulk0_dVb; +double VACLM, dVACLM_dVg, dVACLM_dVd, dVACLM_dVb; +double VADIBL, dVADIBL_dVg, dVADIBL_dVd, dVADIBL_dVb; +double Xdep, dXdep_dVb, lt1, dlt1_dVb, ltw, dltw_dVb, Delt_vth, dDelt_vth_dVb; +double Theta0, dTheta0_dVb; +double TempRatio, tmp1, tmp2, tmp3, tmp4; +double DIBL_Sft, dDIBL_Sft_dVd, Lambda, dLambda_dVg; +double Idtot, Ibtot; +double tempv, a1, ScalingFactor; + +double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; +double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; +double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; +double diffVds, dAbulk_dVg; +double beta, dbeta_dVg, dbeta_dVd, dbeta_dVb; +double gche, dgche_dVg, dgche_dVd, dgche_dVb; +double fgche1, dfgche1_dVg, dfgche1_dVd, dfgche1_dVb; +double fgche2, dfgche2_dVg, dfgche2_dVd, dfgche2_dVb; +double Idl, dIdl_dVg, dIdl_dVd, dIdl_dVb; +double Idsa, dIdsa_dVg, dIdsa_dVd, dIdsa_dVb; +double Ids, Gm, Gds, Gmb; +double Isub, Gbd, Gbg, Gbb; +double VASCBE, dVASCBE_dVg, dVASCBE_dVd, dVASCBE_dVb; +double CoxWovL; +double Rds, dRds_dVg, dRds_dVb, WVCox, WVCoxRds; +double Vgst2Vtm, VdsatCV, dVdsatCV_dVg, dVdsatCV_dVb; +double Leff, Weff, dWeff_dVg, dWeff_dVb; +double AbulkCV, dAbulkCV_dVb; +double qgdo, qgso, cgdo, cgso; + +double qcheq = 0.0, qdef, gqdef = 0.0, cqdef, cqcheq, gtau_diff, gtau_drift; +double gcqdb = 0.0,gcqsb = 0.0, gcqgb = 0.0,gcqbb = 0.0; +double dxpart, sxpart, ggtg, ggtd, ggts, ggtb; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; + +double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; +double gbdpdp, gbdpg, gbdpb, gbdpsp; +double Cgg, Cgd, Cgb, Cdg, Cdd, Cds; +double Csg, Csd, Css, Csb, Cbg, Cbd, Cbb; +double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Qac0, Qsub0; +double dQac0_dVg, dQac0_dVd = 0.0, dQac0_dVb, dQsub0_dVg; +double dQsub0_dVd, dQsub0_dVb; + +double m; + +struct bsim3SizeDependParam *pParam; +int ByPass, Check, ChargeComputationNeeded, error; + +ScalingFactor = 1.0e-9; +ChargeComputationNeeded = + ((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || + ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) + ? 1 : 0; +for (; model != NULL; model = model->BSIM3v32nextModel) +{ for (here = model->BSIM3v32instances; here != NULL; + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner != ARCHme) + continue; + Check = 1; + ByPass = 0; + pParam = here->pParam; + if ((ckt->CKTmode & MODEINITSMSIG)) + { vbs = *(ckt->CKTstate0 + here->BSIM3v32vbs); + vgs = *(ckt->CKTstate0 + here->BSIM3v32vgs); + vds = *(ckt->CKTstate0 + here->BSIM3v32vds); + qdef = *(ckt->CKTstate0 + here->BSIM3v32qdef); + } + else if ((ckt->CKTmode & MODEINITTRAN)) + { vbs = *(ckt->CKTstate1 + here->BSIM3v32vbs); + vgs = *(ckt->CKTstate1 + here->BSIM3v32vgs); + vds = *(ckt->CKTstate1 + here->BSIM3v32vds); + qdef = *(ckt->CKTstate1 + here->BSIM3v32qdef); + } + else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM3v32off) + { vds = model->BSIM3v32type * here->BSIM3v32icVDS; + vgs = model->BSIM3v32type * here->BSIM3v32icVGS; + vbs = model->BSIM3v32type * here->BSIM3v32icVBS; + qdef = 0.0; + + if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && + ((ckt->CKTmode & (MODETRAN | MODEAC|MODEDCOP | + MODEDCTRANCURVE)) || (!(ckt->CKTmode & MODEUIC)))) + { vbs = 0.0; + vgs = model->BSIM3v32type * pParam->BSIM3v32vth0 + 0.1; + vds = 0.1; + } + } + else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && + (here->BSIM3v32off)) + { qdef = vbs = vgs = vds = 0.0; + } + else + { +#ifndef PREDICTOR + if ((ckt->CKTmode & MODEINITPRED)) + { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; + *(ckt->CKTstate0 + here->BSIM3v32vbs) = + *(ckt->CKTstate1 + here->BSIM3v32vbs); + vbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32vbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM3v32vbs))); + *(ckt->CKTstate0 + here->BSIM3v32vgs) = + *(ckt->CKTstate1 + here->BSIM3v32vgs); + vgs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32vgs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM3v32vgs))); + *(ckt->CKTstate0 + here->BSIM3v32vds) = + *(ckt->CKTstate1 + here->BSIM3v32vds); + vds = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32vds)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM3v32vds))); + *(ckt->CKTstate0 + here->BSIM3v32vbd) = + *(ckt->CKTstate0 + here->BSIM3v32vbs) + - *(ckt->CKTstate0 + here->BSIM3v32vds); + *(ckt->CKTstate0 + here->BSIM3v32qdef) = + *(ckt->CKTstate1 + here->BSIM3v32qdef); + qdef = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32qdef)) + -(xfact * (*(ckt->CKTstate2 + here->BSIM3v32qdef))); + } + else + { +#endif /* PREDICTOR */ + vbs = model->BSIM3v32type + * (*(ckt->CKTrhsOld + here->BSIM3v32bNode) + - *(ckt->CKTrhsOld + here->BSIM3v32sNodePrime)); + vgs = model->BSIM3v32type + * (*(ckt->CKTrhsOld + here->BSIM3v32gNode) + - *(ckt->CKTrhsOld + here->BSIM3v32sNodePrime)); + vds = model->BSIM3v32type + * (*(ckt->CKTrhsOld + here->BSIM3v32dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM3v32sNodePrime)); + qdef = model->BSIM3v32type + * (*(ckt->CKTrhsOld + here->BSIM3v32qNode)); +#ifndef PREDICTOR + } +#endif /* PREDICTOR */ + + vbd = vbs - vds; + vgd = vgs - vds; + vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs) + - *(ckt->CKTstate0 + here->BSIM3v32vds); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs); + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs); + delvds = vds - *(ckt->CKTstate0 + here->BSIM3v32vds); + delvgd = vgd - vgdo; + + if (here->BSIM3v32mode >= 0) + { Idtot = here->BSIM3v32cd + here->BSIM3v32csub - here->BSIM3v32cbd; + cdhat = Idtot - here->BSIM3v32gbd * delvbd + + (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs + + (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs + + (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds; + Ibtot = here->BSIM3v32cbs + here->BSIM3v32cbd - here->BSIM3v32csub; + cbhat = Ibtot + here->BSIM3v32gbd * delvbd + + (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs + - here->BSIM3v32gbgs * delvgs + - here->BSIM3v32gbds * delvds; + } + else + { Idtot = here->BSIM3v32cd - here->BSIM3v32cbd; + cdhat = Idtot - (here->BSIM3v32gbd - here->BSIM3v32gmbs) * delvbd + + here->BSIM3v32gm * delvgd + - here->BSIM3v32gds * delvds; + Ibtot = here->BSIM3v32cbs + here->BSIM3v32cbd - here->BSIM3v32csub; + cbhat = Ibtot + here->BSIM3v32gbs * delvbs + + (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd + - here->BSIM3v32gbgs * delvgd + + here->BSIM3v32gbds * delvds; + } + +#ifndef NOBYPASS + /* following should be one big if connected by && all over + * the place, but some C compilers can't handle that, so + * we split it up here to let them digest it in stages + */ + + if ((!(ckt->CKTmode & MODEINITPRED)) && (ckt->CKTbypass)) + if ((fabs(delvbs) < (ckt->CKTreltol * MAX(fabs(vbs), + fabs(*(ckt->CKTstate0+here->BSIM3v32vbs))) + ckt->CKTvoltTol))) + if ((fabs(delvbd) < (ckt->CKTreltol * MAX(fabs(vbd), + fabs(*(ckt->CKTstate0+here->BSIM3v32vbd))) + ckt->CKTvoltTol))) + if ((fabs(delvgs) < (ckt->CKTreltol * MAX(fabs(vgs), + fabs(*(ckt->CKTstate0+here->BSIM3v32vgs))) + ckt->CKTvoltTol))) + if ((fabs(delvds) < (ckt->CKTreltol * MAX(fabs(vds), + fabs(*(ckt->CKTstate0+here->BSIM3v32vds))) + ckt->CKTvoltTol))) + if ((fabs(cdhat - Idtot) < ckt->CKTreltol + * MAX(fabs(cdhat),fabs(Idtot)) + ckt->CKTabstol)) + { tempv = MAX(fabs(cbhat),fabs(Ibtot)) + ckt->CKTabstol; + if ((fabs(cbhat - Ibtot)) < ckt->CKTreltol * tempv) + { /* bypass code */ + vbs = *(ckt->CKTstate0 + here->BSIM3v32vbs); + vbd = *(ckt->CKTstate0 + here->BSIM3v32vbd); + vgs = *(ckt->CKTstate0 + here->BSIM3v32vgs); + vds = *(ckt->CKTstate0 + here->BSIM3v32vds); + qdef = *(ckt->CKTstate0 + here->BSIM3v32qdef); + + vgd = vgs - vds; + vgb = vgs - vbs; + + cdrain = here->BSIM3v32cd; + if ((ckt->CKTmode & (MODETRAN | MODEAC)) || + ((ckt->CKTmode & MODETRANOP) && + (ckt->CKTmode & MODEUIC))) + { ByPass = 1; + qgate = here->BSIM3v32qgate; + qbulk = here->BSIM3v32qbulk; + qdrn = here->BSIM3v32qdrn; + goto line755; + } + else + { goto line850; + } + } + } + +#endif /*NOBYPASS*/ + von = here->BSIM3v32von; + if (*(ckt->CKTstate0 + here->BSIM3v32vds) >= 0.0) + { vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3v32vgs), von); + vds = vgs - vgd; + vds = DEVlimvds(vds, *(ckt->CKTstate0 + here->BSIM3v32vds)); + vgd = vgs - vds; + + } + else + { vgd = DEVfetlim(vgd, vgdo, von); + vds = vgs - vgd; + vds = -DEVlimvds(-vds, -(*(ckt->CKTstate0+here->BSIM3v32vds))); + vgs = vgd + vds; + } + + if (vds >= 0.0) + { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM3v32vbs), + CONSTvt0, model->BSIM3v32vcrit, &Check); + vbd = vbs - vds; + + } + else + { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM3v32vbd), + CONSTvt0, model->BSIM3v32vcrit, &Check); + vbs = vbd + vds; + } + } + + /* determine DC current and derivatives */ + vbd = vbs - vds; + vgd = vgs - vds; + vgb = vgs - vbs; + + /* Source/drain junction diode DC model begins */ + Nvtm = model->BSIM3v32vtm * model->BSIM3v32jctEmissionCoeff; + /* acm model */ + if (model->BSIM3v32acmMod == 0) + { + if ((here->BSIM3v32sourceArea <= 0.0) + && (here->BSIM3v32sourcePerimeter <= 0.0)) + { + SourceSatCurrent = 1.0e-14; + } + else + { + SourceSatCurrent = here->BSIM3v32sourceArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32sourcePerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + } + else + { + SourceSatCurrent = 0.0; + if (!here->BSIM3v32sourceAreaGiven) + { + here->BSIM3v32sourceArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; + } + SourceSatCurrent = here->BSIM3v32sourceArea * model->BSIM3v32jctTempSatCurDensity; + if (!here->BSIM3v32sourcePerimeterGiven) + { + here->BSIM3v32sourcePerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; + } + SourceSatCurrent = SourceSatCurrent + here->BSIM3v32sourcePerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; + if (SourceSatCurrent <= 0.0) SourceSatCurrent = 1.0e-14; + } + if (SourceSatCurrent <= 0.0) + { here->BSIM3v32gbs = ckt->CKTgmin; + here->BSIM3v32cbs = here->BSIM3v32gbs * vbs; + } + else + { if (model->BSIM3v32ijth == 0.0) + { evbs = exp(vbs / Nvtm); + here->BSIM3v32gbs = SourceSatCurrent * evbs / Nvtm + ckt->CKTgmin; + here->BSIM3v32cbs = SourceSatCurrent * (evbs - 1.0) + + ckt->CKTgmin * vbs; + } + else + { if (vbs < here->BSIM3v32vjsm) + { evbs = exp(vbs / Nvtm); + here->BSIM3v32gbs = SourceSatCurrent * evbs / Nvtm + ckt->CKTgmin; + here->BSIM3v32cbs = SourceSatCurrent * (evbs - 1.0) + + ckt->CKTgmin * vbs; + } + else + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = here->BSIM3v32IsEvjsm / Nvtm; + here->BSIM3v32gbs = T0 + (ckt->CKTgmin); + here->BSIM3v32cbs = here->BSIM3v32IsEvjsm - SourceSatCurrent + + T0 * (vbs - here->BSIM3v32vjsm) + (ckt->CKTgmin) * vbs; + break; + case BSIM3v32V32: + default: + T0 = (SourceSatCurrent + model->BSIM3v32ijth) / Nvtm; + here->BSIM3v32gbs = T0 + (ckt->CKTgmin); + here->BSIM3v32cbs = model->BSIM3v32ijth + (ckt->CKTgmin) * vbs + + T0 * (vbs - here->BSIM3v32vjsm); + } + } + } + } + + /* acm model */ + if (model->BSIM3v32acmMod == 0) + { + if ((here->BSIM3v32drainArea <= 0.0) && (here->BSIM3v32drainPerimeter <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM3v32drainArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32drainPerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + } + else + { + DrainSatCurrent = 0.0; + if (!here->BSIM3v32drainAreaGiven) + { + here->BSIM3v32drainArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; + } + DrainSatCurrent = here->BSIM3v32drainArea * model->BSIM3v32jctTempSatCurDensity; + if (!here->BSIM3v32drainPerimeterGiven) + { + here->BSIM3v32drainPerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; + } + DrainSatCurrent = DrainSatCurrent + here->BSIM3v32drainPerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; + if (DrainSatCurrent <= 0.0) DrainSatCurrent = 1.0e-14; + } + if (DrainSatCurrent <= 0.0) + { here->BSIM3v32gbd = ckt->CKTgmin; + here->BSIM3v32cbd = here->BSIM3v32gbd * vbd; + } + else + { if (model->BSIM3v32ijth == 0.0) + { evbd = exp(vbd / Nvtm); + here->BSIM3v32gbd = DrainSatCurrent * evbd / Nvtm + ckt->CKTgmin; + here->BSIM3v32cbd = DrainSatCurrent * (evbd - 1.0) + + ckt->CKTgmin * vbd; + } + else + { if (vbd < here->BSIM3v32vjdm) + { evbd = exp(vbd / Nvtm); + here->BSIM3v32gbd = DrainSatCurrent * evbd / Nvtm + ckt->CKTgmin; + here->BSIM3v32cbd = DrainSatCurrent * (evbd - 1.0) + + ckt->CKTgmin * vbd; + } + else + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = here->BSIM3v32IsEvjdm / Nvtm; + here->BSIM3v32gbd = T0 + (ckt->CKTgmin); + here->BSIM3v32cbd = here->BSIM3v32IsEvjdm - DrainSatCurrent + + T0 * (vbd - here->BSIM3v32vjdm) + (ckt->CKTgmin) * vbd; + break; + case BSIM3v32V32: + default: + T0 = (DrainSatCurrent + model->BSIM3v32ijth) / Nvtm; + here->BSIM3v32gbd = T0 + (ckt->CKTgmin); + here->BSIM3v32cbd = model->BSIM3v32ijth + (ckt->CKTgmin) * vbd + + T0 * (vbd - here->BSIM3v32vjdm); + } + } + } + } + /* End of diode DC model */ + + if (vds >= 0.0) + { /* normal mode */ + here->BSIM3v32mode = 1; + Vds = vds; + Vgs = vgs; + Vbs = vbs; + } + else + { /* inverse mode */ + here->BSIM3v32mode = -1; + Vds = -vds; + Vgs = vgd; + Vbs = vbd; + } + + T0 = Vbs - pParam->BSIM3v32vbsc - 0.001; + T1 = sqrt(T0 * T0 - 0.004 * pParam->BSIM3v32vbsc); + Vbseff = pParam->BSIM3v32vbsc + 0.5 * (T0 + T1); + dVbseff_dVb = 0.5 * (1.0 + T0 / T1); + if (Vbseff < Vbs) + { Vbseff = Vbs; + } + + if (Vbseff > 0.0) + { T0 = pParam->BSIM3v32phi / (pParam->BSIM3v32phi + Vbseff); + Phis = pParam->BSIM3v32phi * T0; + dPhis_dVb = -T0 * T0; + sqrtPhis = pParam->BSIM3v32phis3 / (pParam->BSIM3v32phi + 0.5 * Vbseff); + dsqrtPhis_dVb = -0.5 * sqrtPhis * sqrtPhis / pParam->BSIM3v32phis3; + } + else + { Phis = pParam->BSIM3v32phi - Vbseff; + dPhis_dVb = -1.0; + sqrtPhis = sqrt(Phis); + dsqrtPhis_dVb = -0.5 / sqrtPhis; + } + Xdep = pParam->BSIM3v32Xdep0 * sqrtPhis / pParam->BSIM3v32sqrtPhi; + dXdep_dVb = (pParam->BSIM3v32Xdep0 / pParam->BSIM3v32sqrtPhi) + * dsqrtPhis_dVb; + + Leff = pParam->BSIM3v32leff; + Vtm = model->BSIM3v32vtm; +/* Vth Calculation */ + T3 = sqrt(Xdep); + V0 = pParam->BSIM3v32vbi - pParam->BSIM3v32phi; + + T0 = pParam->BSIM3v32dvt2 * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM3v32dvt2; + } + else /* Added to avoid any discontinuity problems caused by dvt2 */ + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM3v32dvt2 * T4 * T4; + } + lt1 = model->BSIM3v32factor1 * T3 * T1; + dlt1_dVb = model->BSIM3v32factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM3v32dvt2w * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM3v32dvt2w; + } + else /* Added to avoid any discontinuity problems caused by dvt2w */ + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM3v32dvt2w * T4 * T4; + } + ltw = model->BSIM3v32factor1 * T3 * T1; + dltw_dVb = model->BSIM3v32factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = -0.5 * pParam->BSIM3v32dvt1 * Leff / lt1; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + Theta0 = T1 * (1.0 + 2.0 * T1); + dT1_dVb = -T0 / lt1 * T1 * dlt1_dVb; + dTheta0_dVb = (1.0 + 4.0 * T1) * dT1_dVb; + } + else + { T1 = MIN_EXP; + Theta0 = T1 * (1.0 + 2.0 * T1); + dTheta0_dVb = 0.0; + } + + here->BSIM3v32thetavth = pParam->BSIM3v32dvt0 * Theta0; + Delt_vth = here->BSIM3v32thetavth * V0; + dDelt_vth_dVb = pParam->BSIM3v32dvt0 * dTheta0_dVb * V0; + + T0 = -0.5 * pParam->BSIM3v32dvt1w * pParam->BSIM3v32weff * Leff / ltw; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 * (1.0 + 2.0 * T1); + dT1_dVb = -T0 / ltw * T1 * dltw_dVb; + dT2_dVb = (1.0 + 4.0 * T1) * dT1_dVb; + } + else + { T1 = MIN_EXP; + T2 = T1 * (1.0 + 2.0 * T1); + dT2_dVb = 0.0; + } + + T0 = pParam->BSIM3v32dvt0w * T2; + T2 = T0 * V0; + dT2_dVb = pParam->BSIM3v32dvt0w * dT2_dVb * V0; + + TempRatio = ckt->CKTtemp / model->BSIM3v32tnom - 1.0; + T0 = sqrt(1.0 + pParam->BSIM3v32nlx / Leff); + T1 = pParam->BSIM3v32k1ox * (T0 - 1.0) * pParam->BSIM3v32sqrtPhi + + (pParam->BSIM3v32kt1 + pParam->BSIM3v32kt1l / Leff + + pParam->BSIM3v32kt2 * Vbseff) * TempRatio; + tmp2 = model->BSIM3v32tox * pParam->BSIM3v32phi + / (pParam->BSIM3v32weff + pParam->BSIM3v32w0); + + T3 = pParam->BSIM3v32eta0 + pParam->BSIM3v32etab * Vbseff; + if (T3 < 1.0e-4) /* avoid discontinuity problems caused by etab */ + { T9 = 1.0 / (3.0 - 2.0e4 * T3); + T3 = (2.0e-4 - T3) * T9; + T4 = T9 * T9; + } + else + { T4 = 1.0; + } + dDIBL_Sft_dVd = T3 * pParam->BSIM3v32theta0vb0; + DIBL_Sft = dDIBL_Sft_dVd * Vds; + + Vth = model->BSIM3v32type * pParam->BSIM3v32vth0 - pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi + pParam->BSIM3v32k1ox * sqrtPhis + - pParam->BSIM3v32k2ox * Vbseff - Delt_vth - T2 + (pParam->BSIM3v32k3 + + pParam->BSIM3v32k3b * Vbseff) * tmp2 + T1 - DIBL_Sft; + + here->BSIM3v32von = Vth; + + dVth_dVb = pParam->BSIM3v32k1ox * dsqrtPhis_dVb - pParam->BSIM3v32k2ox + - dDelt_vth_dVb - dT2_dVb + pParam->BSIM3v32k3b * tmp2 + - pParam->BSIM3v32etab * Vds * pParam->BSIM3v32theta0vb0 * T4 + + pParam->BSIM3v32kt2 * TempRatio; + dVth_dVd = -dDIBL_Sft_dVd; + +/* Calculate n */ + tmp2 = pParam->BSIM3v32nfactor * EPSSI / Xdep; + tmp3 = pParam->BSIM3v32cdsc + pParam->BSIM3v32cdscb * Vbseff + + pParam->BSIM3v32cdscd * Vds; + tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM3v32cit) / model->BSIM3v32cox; + if (tmp4 >= -0.5) + { n = 1.0 + tmp4; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM3v32cdscb * Theta0) / model->BSIM3v32cox; + dn_dVd = pParam->BSIM3v32cdscd * Theta0 / model->BSIM3v32cox; + } + else + /* avoid discontinuity problems caused by tmp4 */ + { T0 = 1.0 / (3.0 + 8.0 * tmp4); + n = (1.0 + 3.0 * tmp4) * T0; + T0 *= T0; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM3v32cdscb * Theta0) / model->BSIM3v32cox * T0; + dn_dVd = pParam->BSIM3v32cdscd * Theta0 / model->BSIM3v32cox * T0; + } + +/* Poly Gate Si Depletion Effect */ + T0 = pParam->BSIM3v32vfb + pParam->BSIM3v32phi; + if ((pParam->BSIM3v32ngate > 1.e18) && (pParam->BSIM3v32ngate < 1.e25) + && (Vgs > T0)) + /* added to avoid the problem caused by ngate */ + { T1 = 1.0e6 * Charge_q * EPSSI * pParam->BSIM3v32ngate + / (model->BSIM3v32cox * model->BSIM3v32cox); + T4 = sqrt(1.0 + 2.0 * (Vgs - T0) / T1); + T2 = T1 * (T4 - 1.0); + T3 = 0.5 * T2 * T2 / T1; /* T3 = Vpoly */ + T7 = 1.12 - T3 - 0.05; + T6 = sqrt(T7 * T7 + 0.224); + T5 = 1.12 - 0.5 * (T7 + T6); + Vgs_eff = Vgs - T5; + dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); + } + else + { Vgs_eff = Vgs; + dVgs_eff_dVg = 1.0; + } + Vgst = Vgs_eff - Vth; + +/* Effective Vgst (Vgsteff) Calculation */ + + T10 = 2.0 * n * Vtm; + VgstNVt = Vgst / T10; + ExpArg = (2.0 * pParam->BSIM3v32voff - Vgst) / T10; + + /* MCJ: Very small Vgst */ + if (VgstNVt > EXP_THRESHOLD) + { Vgsteff = Vgst; + dVgsteff_dVg = dVgs_eff_dVg; + dVgsteff_dVd = -dVth_dVd; + dVgsteff_dVb = -dVth_dVb; + } + else if (ExpArg > EXP_THRESHOLD) + { T0 = (Vgst - pParam->BSIM3v32voff) / (n * Vtm); + ExpVgst = exp(T0); + Vgsteff = Vtm * pParam->BSIM3v32cdep0 / model->BSIM3v32cox * ExpVgst; + dVgsteff_dVg = Vgsteff / (n * Vtm); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + T0 * Vtm * dn_dVd); + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + T0 * Vtm * dn_dVb); + dVgsteff_dVg *= dVgs_eff_dVg; + } + else + { ExpVgst = exp(VgstNVt); + T1 = T10 * log(1.0 + ExpVgst); + dT1_dVg = ExpVgst / (1.0 + ExpVgst); + dT1_dVb = -dT1_dVg * (dVth_dVb + Vgst / n * dn_dVb) + + T1 / n * dn_dVb; + dT1_dVd = -dT1_dVg * (dVth_dVd + Vgst / n * dn_dVd) + + T1 / n * dn_dVd; + + dT2_dVg = -model->BSIM3v32cox / (Vtm * pParam->BSIM3v32cdep0) + * exp(ExpArg); + T2 = 1.0 - T10 * dT2_dVg; + dT2_dVd = -dT2_dVg * (dVth_dVd - 2.0 * Vtm * ExpArg * dn_dVd) + + (T2 - 1.0) / n * dn_dVd; + dT2_dVb = -dT2_dVg * (dVth_dVb - 2.0 * Vtm * ExpArg * dn_dVb) + + (T2 - 1.0) / n * dn_dVb; + + Vgsteff = T1 / T2; + T3 = T2 * T2; + dVgsteff_dVg = (T2 * dT1_dVg - T1 * dT2_dVg) / T3 * dVgs_eff_dVg; + dVgsteff_dVd = (T2 * dT1_dVd - T1 * dT2_dVd) / T3; + dVgsteff_dVb = (T2 * dT1_dVb - T1 * dT2_dVb) / T3; + } + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V323) { + here->BSIM3v32Vgsteff = Vgsteff; + } + +/* Calculate Effective Channel Geometry */ + T9 = sqrtPhis - pParam->BSIM3v32sqrtPhi; + Weff = pParam->BSIM3v32weff - 2.0 * (pParam->BSIM3v32dwg * Vgsteff + + pParam->BSIM3v32dwb * T9); + dWeff_dVg = -2.0 * pParam->BSIM3v32dwg; + dWeff_dVb = -2.0 * pParam->BSIM3v32dwb * dsqrtPhis_dVb; + + if (Weff < 2.0e-8) /* to avoid the discontinuity problem due to Weff*/ + { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); + Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; + T0 *= T0 * 4.0e-16; + dWeff_dVg *= T0; + dWeff_dVb *= T0; + } + + T0 = pParam->BSIM3v32prwg * Vgsteff + pParam->BSIM3v32prwb * T9; + if (T0 >= -0.9) + { Rds = pParam->BSIM3v32rds0 * (1.0 + T0); + dRds_dVg = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwg; + dRds_dVb = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwb * dsqrtPhis_dVb; + } + else + /* to avoid the discontinuity problem due to prwg and prwb*/ + { T1 = 1.0 / (17.0 + 20.0 * T0); + Rds = pParam->BSIM3v32rds0 * (0.8 + T0) * T1; + T1 *= T1; + dRds_dVg = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwg * T1; + dRds_dVb = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwb * dsqrtPhis_dVb + * T1; + } + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V323) { + here->BSIM3v32rds = Rds; /* Noise Bugfix */ + } + +/* Calculate Abulk */ + T1 = 0.5 * pParam->BSIM3v32k1ox / sqrtPhis; + dT1_dVb = -T1 / sqrtPhis * dsqrtPhis_dVb; + + T9 = sqrt(pParam->BSIM3v32xj * Xdep); + tmp1 = Leff + 2.0 * T9; + T5 = Leff / tmp1; + tmp2 = pParam->BSIM3v32a0 * T5; + tmp3 = pParam->BSIM3v32weff + pParam->BSIM3v32b1; + tmp4 = pParam->BSIM3v32b0 / tmp3; + T2 = tmp2 + tmp4; + dT2_dVb = -T9 / tmp1 / Xdep * dXdep_dVb; + T6 = T5 * T5; + T7 = T5 * T6; + + Abulk0 = 1.0 + T1 * T2; + dAbulk0_dVb = T1 * tmp2 * dT2_dVb + T2 * dT1_dVb; + + T8 = pParam->BSIM3v32ags * pParam->BSIM3v32a0 * T7; + dAbulk_dVg = -T1 * T8; + Abulk = Abulk0 + dAbulk_dVg * Vgsteff; + dAbulk_dVb = dAbulk0_dVb - T8 * Vgsteff * (dT1_dVb + + 3.0 * T1 * dT2_dVb); + + if (Abulk0 < 0.1) /* added to avoid the problems caused by Abulk0 */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk0); + Abulk0 = (0.2 - Abulk0) * T9; + dAbulk0_dVb *= T9 * T9; + } + + if (Abulk < 0.1) + /* added to avoid the problems caused by Abulk */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk); + Abulk = (0.2 - Abulk) * T9; + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V32) { + T10 = T9 * T9; + dAbulk_dVb *= T10; + dAbulk_dVg *= T10; + } else { + dAbulk_dVb *= T9 * T9; + } + } + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V323) { + here->BSIM3v32Abulk = Abulk; + } + + T2 = pParam->BSIM3v32keta * Vbseff; + if (T2 >= -0.9) + { T0 = 1.0 / (1.0 + T2); + dT0_dVb = -pParam->BSIM3v32keta * T0 * T0; + } + else + /* added to avoid the problems caused by Keta */ + { T1 = 1.0 / (0.8 + T2); + T0 = (17.0 + 20.0 * T2) * T1; + dT0_dVb = -pParam->BSIM3v32keta * T1 * T1; + } + dAbulk_dVg *= T0; + dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; + dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; + Abulk *= T0; + Abulk0 *= T0; + + +/* Mobility calculation */ + if (model->BSIM3v32mobMod == 1) + { T0 = Vgsteff + Vth + Vth; + T2 = pParam->BSIM3v32ua + pParam->BSIM3v32uc * Vbseff; + T3 = T0 / model->BSIM3v32tox; + T5 = T3 * (T2 + pParam->BSIM3v32ub * T3); + dDenomi_dVg = (T2 + 2.0 * pParam->BSIM3v32ub * T3) / model->BSIM3v32tox; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM3v32uc * T3; + } + else if (model->BSIM3v32mobMod == 2) + { T5 = Vgsteff / model->BSIM3v32tox * (pParam->BSIM3v32ua + + pParam->BSIM3v32uc * Vbseff + pParam->BSIM3v32ub * Vgsteff + / model->BSIM3v32tox); + dDenomi_dVg = (pParam->BSIM3v32ua + pParam->BSIM3v32uc * Vbseff + + 2.0 * pParam->BSIM3v32ub * Vgsteff / model->BSIM3v32tox) + / model->BSIM3v32tox; + dDenomi_dVd = 0.0; + dDenomi_dVb = Vgsteff * pParam->BSIM3v32uc / model->BSIM3v32tox; + } + else + { T0 = Vgsteff + Vth + Vth; + T2 = 1.0 + pParam->BSIM3v32uc * Vbseff; + T3 = T0 / model->BSIM3v32tox; + T4 = T3 * (pParam->BSIM3v32ua + pParam->BSIM3v32ub * T3); + T5 = T4 * T2; + dDenomi_dVg = (pParam->BSIM3v32ua + 2.0 * pParam->BSIM3v32ub * T3) * T2 + / model->BSIM3v32tox; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM3v32uc * T4; + } + + if (T5 >= -0.8) + { Denomi = 1.0 + T5; + } + else /* Added to avoid the discontinuity problem caused by ua and ub*/ + { T9 = 1.0 / (7.0 + 10.0 * T5); + Denomi = (0.6 + T5) * T9; + T9 *= T9; + dDenomi_dVg *= T9; + dDenomi_dVd *= T9; + dDenomi_dVb *= T9; + } + + here->BSIM3v32ueff = ueff = pParam->BSIM3v32u0temp / Denomi; + T9 = -ueff / Denomi; + dueff_dVg = T9 * dDenomi_dVg; + dueff_dVd = T9 * dDenomi_dVd; + dueff_dVb = T9 * dDenomi_dVb; + +/* Saturation Drain Voltage Vdsat */ + WVCox = Weff * pParam->BSIM3v32vsattemp * model->BSIM3v32cox; + WVCoxRds = WVCox * Rds; + + Esat = 2.0 * pParam->BSIM3v32vsattemp / ueff; + EsatL = Esat * Leff; + T0 = -EsatL /ueff; + dEsatL_dVg = T0 * dueff_dVg; + dEsatL_dVd = T0 * dueff_dVd; + dEsatL_dVb = T0 * dueff_dVb; + + /* Sqrt() */ + a1 = pParam->BSIM3v32a1; + if (a1 == 0.0) + { Lambda = pParam->BSIM3v32a2; + dLambda_dVg = 0.0; + } + else if (a1 > 0.0) +/* Added to avoid the discontinuity problem + caused by a1 and a2 (Lambda) */ + { T0 = 1.0 - pParam->BSIM3v32a2; + T1 = T0 - pParam->BSIM3v32a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * T0); + Lambda = pParam->BSIM3v32a2 + T0 - 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM3v32a1 * (1.0 + T1 / T2); + } + else + { T1 = pParam->BSIM3v32a2 + pParam->BSIM3v32a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM3v32a2); + Lambda = 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM3v32a1 * (1.0 + T1 / T2); + } + + Vgst2Vtm = Vgsteff + 2.0 * Vtm; + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V323) { + here->BSIM3v32AbovVgst2Vtm = Abulk / Vgst2Vtm; + } + + if (Rds > 0) + { tmp2 = dRds_dVg / Rds + dWeff_dVg / Weff; + tmp3 = dRds_dVb / Rds + dWeff_dVb / Weff; + } + else + { tmp2 = dWeff_dVg / Weff; + tmp3 = dWeff_dVb / Weff; + } + if ((Rds == 0.0) && (Lambda == 1.0)) + { T0 = 1.0 / (Abulk * EsatL + Vgst2Vtm); + tmp1 = 0.0; + T1 = T0 * T0; + T2 = Vgst2Vtm * T0; + T3 = EsatL * Vgst2Vtm; + Vdsat = T3 * T0; + + dT0_dVg = -(Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 1.0) * T1; + dT0_dVd = -(Abulk * dEsatL_dVd) * T1; + dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; + + dVdsat_dVg = T3 * dT0_dVg + T2 * dEsatL_dVg + EsatL * T0; + dVdsat_dVd = T3 * dT0_dVd + T2 * dEsatL_dVd; + dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; + } + else + { tmp1 = dLambda_dVg / (Lambda * Lambda); + T9 = Abulk * WVCoxRds; + T8 = Abulk * T9; + T7 = Vgst2Vtm * T9; + T6 = Vgst2Vtm * WVCoxRds; + T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); + dT0_dVg = 2.0 * (T8 * tmp2 - Abulk * tmp1 + + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); + + dT0_dVb = 2.0 * (T8 * (2.0 / Abulk * dAbulk_dVb + tmp3) + + (1.0 / Lambda - 1.0) * dAbulk_dVb); + dT0_dVd = 0.0; + T1 = Vgst2Vtm * (2.0 / Lambda - 1.0) + Abulk * EsatL + 3.0 * T7; + + dT1_dVg = (2.0 / Lambda - 1.0) - 2.0 * Vgst2Vtm * tmp1 + + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 + + T7 * tmp2 + T6 * dAbulk_dVg); + dT1_dVb = Abulk * dEsatL_dVb + EsatL * dAbulk_dVb + + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); + dT1_dVd = Abulk * dEsatL_dVd; + + T2 = Vgst2Vtm * (EsatL + 2.0 * T6); + dT2_dVg = EsatL + Vgst2Vtm * dEsatL_dVg + + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); + dT2_dVb = Vgst2Vtm * (dEsatL_dVb + 2.0 * T6 * tmp3); + dT2_dVd = Vgst2Vtm * dEsatL_dVd; + + T3 = sqrt(T1 * T1 - 2.0 * T0 * T2); + Vdsat = (T1 - T3) / T0; + + dT3_dVg = (T1 * dT1_dVg - 2.0 * (T0 * dT2_dVg + T2 * dT0_dVg)) + / T3; + dT3_dVd = (T1 * dT1_dVd - 2.0 * (T0 * dT2_dVd + T2 * dT0_dVd)) + / T3; + dT3_dVb = (T1 * dT1_dVb - 2.0 * (T0 * dT2_dVb + T2 * dT0_dVb)) + / T3; + + dVdsat_dVg = (dT1_dVg - (T1 * dT1_dVg - dT0_dVg * T2 + - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; + dVdsat_dVb = (dT1_dVb - (T1 * dT1_dVb - dT0_dVb * T2 + - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; + dVdsat_dVd = (dT1_dVd - (T1 * dT1_dVd - T0 * dT2_dVd) / T3) / T0; + } + here->BSIM3v32vdsat = Vdsat; + +/* Effective Vds (Vdseff) Calculation */ + T1 = Vdsat - Vds - pParam->BSIM3v32delta; + dT1_dVg = dVdsat_dVg; + dT1_dVd = dVdsat_dVd - 1.0; + dT1_dVb = dVdsat_dVb; + + T2 = sqrt(T1 * T1 + 4.0 * pParam->BSIM3v32delta * Vdsat); + T0 = T1 / T2; + T3 = 2.0 * pParam->BSIM3v32delta / T2; + dT2_dVg = T0 * dT1_dVg + T3 * dVdsat_dVg; + dT2_dVd = T0 * dT1_dVd + T3 * dVdsat_dVd; + dT2_dVb = T0 * dT1_dVb + T3 * dVdsat_dVb; + + Vdseff = Vdsat - 0.5 * (T1 + T2); + dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); + dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); + dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Added to eliminate non-zero Vdseff at Vds=0.0 */ + if (Vds == 0.0) + { + Vdseff = 0.0; + dVdseff_dVg = 0.0; + dVdseff_dVb = 0.0; + } + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + +/* Calculate VAsat */ + tmp4 = 1.0 - 0.5 * Abulk * Vdsat / Vgst2Vtm; + T9 = WVCoxRds * Vgsteff; + T8 = T9 / Vgst2Vtm; + T0 = EsatL + Vdsat + 2.0 * T9 * tmp4; + + T7 = 2.0 * WVCoxRds * tmp4; + dT0_dVg = dEsatL_dVg + dVdsat_dVg + T7 * (1.0 + tmp2 * Vgsteff) + - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm + + Vdsat * dAbulk_dVg); + + dT0_dVb = dEsatL_dVb + dVdsat_dVb + T7 * tmp3 * Vgsteff + - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = dEsatL_dVd + dVdsat_dVd - T8 * Abulk * dVdsat_dVd; + + T9 = WVCoxRds * Abulk; + T1 = 2.0 / Lambda - 1.0 + T9; + dT1_dVg = -2.0 * tmp1 + WVCoxRds * (Abulk * tmp2 + dAbulk_dVg); + dT1_dVb = dAbulk_dVb * WVCoxRds + T9 * tmp3; + + Vasat = T0 / T1; + dVasat_dVg = (dT0_dVg - Vasat * dT1_dVg) / T1; + dVasat_dVb = (dT0_dVb - Vasat * dT1_dVb) / T1; + dVasat_dVd = dT0_dVd / T1; + + if (Vdseff > Vds) + Vdseff = Vds; + diffVds = Vds - Vdseff; + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V323) { + here->BSIM3v32Vdseff = Vdseff; + } + +/* Calculate VACLM */ + if ((pParam->BSIM3v32pclm > 0.0) && (diffVds > 1.0e-10)) + { T0 = 1.0 / (pParam->BSIM3v32pclm * Abulk * pParam->BSIM3v32litl); + dT0_dVb = -T0 / Abulk * dAbulk_dVb; + dT0_dVg = -T0 / Abulk * dAbulk_dVg; + + T2 = Vgsteff / EsatL; + T1 = Leff * (Abulk + T2); + dT1_dVg = Leff * ((1.0 - T2 * dEsatL_dVg) / EsatL + dAbulk_dVg); + dT1_dVb = Leff * (dAbulk_dVb - T2 * dEsatL_dVb / EsatL); + dT1_dVd = -T2 * dEsatL_dVd / Esat; + + T9 = T0 * T1; + VACLM = T9 * diffVds; + dVACLM_dVg = T0 * dT1_dVg * diffVds - T9 * dVdseff_dVg + + T1 * diffVds * dT0_dVg; + dVACLM_dVb = (dT0_dVb * T1 + T0 * dT1_dVb) * diffVds + - T9 * dVdseff_dVb; + dVACLM_dVd = T0 * dT1_dVd * diffVds + T9 * (1.0 - dVdseff_dVd); + } + else + { VACLM = MAX_EXP; + dVACLM_dVd = dVACLM_dVg = dVACLM_dVb = 0.0; + } + +/* Calculate VADIBL */ + if (pParam->BSIM3v32thetaRout > 0.0) + { T8 = Abulk * Vdsat; + T0 = Vgst2Vtm * T8; + dT0_dVg = Vgst2Vtm * Abulk * dVdsat_dVg + T8 + + Vgst2Vtm * Vdsat * dAbulk_dVg; + dT0_dVb = Vgst2Vtm * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = Vgst2Vtm * Abulk * dVdsat_dVd; + + T1 = Vgst2Vtm + T8; + dT1_dVg = 1.0 + Abulk * dVdsat_dVg + Vdsat * dAbulk_dVg; + dT1_dVb = Abulk * dVdsat_dVb + dAbulk_dVb * Vdsat; + dT1_dVd = Abulk * dVdsat_dVd; + + T9 = T1 * T1; + T2 = pParam->BSIM3v32thetaRout; + VADIBL = (Vgst2Vtm - T0 / T1) / T2; + dVADIBL_dVg = (1.0 - dT0_dVg / T1 + T0 * dT1_dVg / T9) / T2; + dVADIBL_dVb = (-dT0_dVb / T1 + T0 * dT1_dVb / T9) / T2; + dVADIBL_dVd = (-dT0_dVd / T1 + T0 * dT1_dVd / T9) / T2; + + T7 = pParam->BSIM3v32pdiblb * Vbseff; + if (T7 >= -0.9) + { T3 = 1.0 / (1.0 + T7); + VADIBL *= T3; + dVADIBL_dVg *= T3; + dVADIBL_dVb = (dVADIBL_dVb - VADIBL * pParam->BSIM3v32pdiblb) + * T3; + dVADIBL_dVd *= T3; + } + else +/* Added to avoid the discontinuity problem caused by pdiblcb */ + { T4 = 1.0 / (0.8 + T7); + T3 = (17.0 + 20.0 * T7) * T4; + dVADIBL_dVg *= T3; + dVADIBL_dVb = dVADIBL_dVb * T3 + - VADIBL * pParam->BSIM3v32pdiblb * T4 * T4; + dVADIBL_dVd *= T3; + VADIBL *= T3; + } + } + else + { VADIBL = MAX_EXP; + dVADIBL_dVd = dVADIBL_dVg = dVADIBL_dVb = 0.0; + } + +/* Calculate VA */ + + T8 = pParam->BSIM3v32pvag / EsatL; + T9 = T8 * Vgsteff; + if (T9 > -0.9) + { T0 = 1.0 + T9; + dT0_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL); + dT0_dVb = -T9 * dEsatL_dVb / EsatL; + dT0_dVd = -T9 * dEsatL_dVd / EsatL; + } + else /* Added to avoid the discontinuity problems caused by pvag */ + { T1 = 1.0 / (17.0 + 20.0 * T9); + T0 = (0.8 + T9) * T1; + T1 *= T1; + dT0_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL) * T1; + + T9 *= T1 / EsatL; + dT0_dVb = -T9 * dEsatL_dVb; + dT0_dVd = -T9 * dEsatL_dVd; + } + + tmp1 = VACLM * VACLM; + tmp2 = VADIBL * VADIBL; + tmp3 = VACLM + VADIBL; + + T1 = VACLM * VADIBL / tmp3; + tmp3 *= tmp3; + dT1_dVg = (tmp1 * dVADIBL_dVg + tmp2 * dVACLM_dVg) / tmp3; + dT1_dVd = (tmp1 * dVADIBL_dVd + tmp2 * dVACLM_dVd) / tmp3; + dT1_dVb = (tmp1 * dVADIBL_dVb + tmp2 * dVACLM_dVb) / tmp3; + + Va = Vasat + T0 * T1; + dVa_dVg = dVasat_dVg + T1 * dT0_dVg + T0 * dT1_dVg; + dVa_dVd = dVasat_dVd + T1 * dT0_dVd + T0 * dT1_dVd; + dVa_dVb = dVasat_dVb + T1 * dT0_dVb + T0 * dT1_dVb; + +/* Calculate VASCBE */ + if (pParam->BSIM3v32pscbe2 > 0.0) + { if (diffVds > pParam->BSIM3v32pscbe1 * pParam->BSIM3v32litl + / EXP_THRESHOLD) + { T0 = pParam->BSIM3v32pscbe1 * pParam->BSIM3v32litl / diffVds; + VASCBE = Leff * exp(T0) / pParam->BSIM3v32pscbe2; + T1 = T0 * VASCBE / diffVds; + dVASCBE_dVg = T1 * dVdseff_dVg; + dVASCBE_dVd = -T1 * (1.0 - dVdseff_dVd); + dVASCBE_dVb = T1 * dVdseff_dVb; + } + else + { VASCBE = MAX_EXP * Leff/pParam->BSIM3v32pscbe2; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + } + else + { VASCBE = MAX_EXP; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + +/* Calculate Ids */ + CoxWovL = model->BSIM3v32cox * Weff / Leff; + beta = ueff * CoxWovL; + dbeta_dVg = CoxWovL * dueff_dVg + beta * dWeff_dVg / Weff; + dbeta_dVd = CoxWovL * dueff_dVd; + dbeta_dVb = CoxWovL * dueff_dVb + beta * dWeff_dVb / Weff; + + T0 = 1.0 - 0.5 * Abulk * Vdseff / Vgst2Vtm; + dT0_dVg = -0.5 * (Abulk * dVdseff_dVg + - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; + dT0_dVd = -0.5 * Abulk * dVdseff_dVd / Vgst2Vtm; + dT0_dVb = -0.5 * (Abulk * dVdseff_dVb + dAbulk_dVb * Vdseff) + / Vgst2Vtm; + + fgche1 = Vgsteff * T0; + dfgche1_dVg = Vgsteff * dT0_dVg + T0; + dfgche1_dVd = Vgsteff * dT0_dVd; + dfgche1_dVb = Vgsteff * dT0_dVb; + + T9 = Vdseff / EsatL; + fgche2 = 1.0 + T9; + dfgche2_dVg = (dVdseff_dVg - T9 * dEsatL_dVg) / EsatL; + dfgche2_dVd = (dVdseff_dVd - T9 * dEsatL_dVd) / EsatL; + dfgche2_dVb = (dVdseff_dVb - T9 * dEsatL_dVb) / EsatL; + + gche = beta * fgche1 / fgche2; + dgche_dVg = (beta * dfgche1_dVg + fgche1 * dbeta_dVg + - gche * dfgche2_dVg) / fgche2; + dgche_dVd = (beta * dfgche1_dVd + fgche1 * dbeta_dVd + - gche * dfgche2_dVd) / fgche2; + dgche_dVb = (beta * dfgche1_dVb + fgche1 * dbeta_dVb + - gche * dfgche2_dVb) / fgche2; + + T0 = 1.0 + gche * Rds; + T9 = Vdseff / T0; + Idl = gche * T9; + + dIdl_dVg = (gche * dVdseff_dVg + T9 * dgche_dVg) / T0 + - Idl * gche / T0 * dRds_dVg ; + + dIdl_dVd = (gche * dVdseff_dVd + T9 * dgche_dVd) / T0; + dIdl_dVb = (gche * dVdseff_dVb + T9 * dgche_dVb + - Idl * dRds_dVb * gche) / T0; + + T9 = diffVds / Va; + T0 = 1.0 + T9; + Idsa = Idl * T0; + dIdsa_dVg = T0 * dIdl_dVg - Idl * (dVdseff_dVg + T9 * dVa_dVg) / Va; + dIdsa_dVd = T0 * dIdl_dVd + Idl * (1.0 - dVdseff_dVd + - T9 * dVa_dVd) / Va; + dIdsa_dVb = T0 * dIdl_dVb - Idl * (dVdseff_dVb + T9 * dVa_dVb) / Va; + + T9 = diffVds / VASCBE; + T0 = 1.0 + T9; + Ids = Idsa * T0; + + Gm = T0 * dIdsa_dVg - Idsa * (dVdseff_dVg + T9 * dVASCBE_dVg) / VASCBE; + Gds = T0 * dIdsa_dVd + Idsa * (1.0 - dVdseff_dVd + - T9 * dVASCBE_dVd) / VASCBE; + Gmb = T0 * dIdsa_dVb - Idsa * (dVdseff_dVb + + T9 * dVASCBE_dVb) / VASCBE; + + Gds += Gm * dVgsteff_dVd; + Gmb += Gm * dVgsteff_dVb; + Gm *= dVgsteff_dVg; + Gmb *= dVbseff_dVb; + + /* Substrate current begins */ + tmp = pParam->BSIM3v32alpha0 + pParam->BSIM3v32alpha1 * Leff; + if ((tmp <= 0.0) || (pParam->BSIM3v32beta0 <= 0.0)) + { Isub = Gbd = Gbb = Gbg = 0.0; + } + else + { T2 = tmp / Leff; + if (diffVds > pParam->BSIM3v32beta0 / EXP_THRESHOLD) + { T0 = -pParam->BSIM3v32beta0 / diffVds; + T1 = T2 * diffVds * exp(T0); + T3 = T1 / diffVds * (T0 - 1.0); + dT1_dVg = T3 * dVdseff_dVg; + dT1_dVd = T3 * (dVdseff_dVd - 1.0); + dT1_dVb = T3 * dVdseff_dVb; + } + else + { T3 = T2 * MIN_EXP; + T1 = T3 * diffVds; + dT1_dVg = -T3 * dVdseff_dVg; + dT1_dVd = T3 * (1.0 - dVdseff_dVd); + dT1_dVb = -T3 * dVdseff_dVb; + } + Isub = T1 * Idsa; + Gbg = T1 * dIdsa_dVg + Idsa * dT1_dVg; + Gbd = T1 * dIdsa_dVd + Idsa * dT1_dVd; + Gbb = T1 * dIdsa_dVb + Idsa * dT1_dVb; + + Gbd += Gbg * dVgsteff_dVd; + Gbb += Gbg * dVgsteff_dVb; + Gbg *= dVgsteff_dVg; + Gbb *= dVbseff_dVb; /* bug fixing */ + } + + cdrain = Ids; + here->BSIM3v32gds = Gds; + here->BSIM3v32gm = Gm; + here->BSIM3v32gmbs = Gmb; + + here->BSIM3v32gbbs = Gbb; + here->BSIM3v32gbgs = Gbg; + here->BSIM3v32gbds = Gbd; + + here->BSIM3v32csub = Isub; + + /* BSIM3v32 thermal noise Qinv calculated from all capMod + * 0, 1, 2 & 3 stored in here->BSIM3v32qinv 1/1998 */ + + if ((model->BSIM3v32xpart < 0) || (!ChargeComputationNeeded)) + { qgate = qdrn = qsrc = qbulk = 0.0; + here->BSIM3v32cggb = here->BSIM3v32cgsb = here->BSIM3v32cgdb = 0.0; + here->BSIM3v32cdgb = here->BSIM3v32cdsb = here->BSIM3v32cddb = 0.0; + here->BSIM3v32cbgb = here->BSIM3v32cbsb = here->BSIM3v32cbdb = 0.0; + here->BSIM3v32cqdb = here->BSIM3v32cqsb = here->BSIM3v32cqgb + = here->BSIM3v32cqbb = 0.0; + here->BSIM3v32gtau = 0.0; + goto finished; + } + else if (model->BSIM3v32capMod == 0) + { + if (Vbseff < 0.0) + { Vbseff = Vbs; + dVbseff_dVb = 1.0; + } + else + { Vbseff = pParam->BSIM3v32phi - Phis; + dVbseff_dVb = -dPhis_dVb; + } + + Vfb = pParam->BSIM3v32vfbcv; + Vth = Vfb + pParam->BSIM3v32phi + pParam->BSIM3v32k1ox * sqrtPhis; + Vgst = Vgs_eff - Vth; + dVth_dVb = pParam->BSIM3v32k1ox * dsqrtPhis_dVb; + dVgst_dVb = -dVth_dVb; + dVgst_dVg = dVgs_eff_dVg; + + CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV + * pParam->BSIM3v32leffCV; + Arg1 = Vgs_eff - Vbseff - Vfb; + + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + qbulk = -qgate; + qdrn = 0.0; + + here->BSIM3v32cggb = CoxWL * dVgs_eff_dVg; + here->BSIM3v32cgdb = 0.0; + here->BSIM3v32cgsb = CoxWL * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM3v32cdgb = 0.0; + here->BSIM3v32cddb = 0.0; + here->BSIM3v32cdsb = 0.0; + + here->BSIM3v32cbgb = -CoxWL * dVgs_eff_dVg; + here->BSIM3v32cbdb = 0.0; + here->BSIM3v32cbsb = -here->BSIM3v32cgsb; + here->BSIM3v32qinv = 0.0; + } + else if (Vgst <= 0.0) + { T1 = 0.5 * pParam->BSIM3v32k1ox; + T2 = sqrt(T1 * T1 + Arg1); + qgate = CoxWL * pParam->BSIM3v32k1ox * (T2 - T1); + qbulk = -qgate; + qdrn = 0.0; + + T0 = CoxWL * T1 / T2; + here->BSIM3v32cggb = T0 * dVgs_eff_dVg; + here->BSIM3v32cgdb = 0.0; + here->BSIM3v32cgsb = T0 * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM3v32cdgb = 0.0; + here->BSIM3v32cddb = 0.0; + here->BSIM3v32cdsb = 0.0; + + here->BSIM3v32cbgb = -here->BSIM3v32cggb; + here->BSIM3v32cbdb = 0.0; + here->BSIM3v32cbsb = -here->BSIM3v32cgsb; + here->BSIM3v32qinv = 0.0; + } + else + { One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + + AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; + Vdsat = Vgst / AbulkCV; + dVdsat_dVg = dVgs_eff_dVg / AbulkCV; + dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; + + if (model->BSIM3v32xpart > 0.5) + { /* 0/100 Charge partition model */ + if (Vdsat <= Vds) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.0; + + here->BSIM3v32cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); + here->BSIM3v32cgdb = 0.0; + + here->BSIM3v32cdgb = 0.0; + here->BSIM3v32cddb = 0.0; + here->BSIM3v32cdsb = 0.0; + + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); + here->BSIM3v32cbdb = 0.0; + here->BSIM3v32qinv = -(qgate + qbulk); + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + T7 = 2.0 * Vds - T1 - 3.0 * T3; + T8 = T3 - T1 - 2.0 * Vds; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - 0.5 * (Vds - T3)); + T10 = T4 * T8; + qdrn = T4 * T7; + qbulk = -(qgate + qdrn + T10); + + T5 = T3 / T1; + here->BSIM3v32cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = -CoxWL * T5 * dVdsat_dVb; + here->BSIM3v32cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T11 + + here->BSIM3v32cgdb); + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + T7 = T9 * T7; + T8 = T9 * T8; + T9 = 2.0 * T4 * (1.0 - 3.0 * T5); + here->BSIM3v32cdgb = (T7 * dAlphaz_dVg - T9 + * dVdsat_dVg) * dVgs_eff_dVg; + T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb; + here->BSIM3v32cddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5); + here->BSIM3v32cdsb = -(here->BSIM3v32cdgb + T12 + + here->BSIM3v32cddb); + + T9 = 2.0 * T4 * (1.0 + T5); + T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb; + T12 = T4 * (2.0 * T2 + T5 - 1.0); + T0 = -(T10 + T11 + T12); + + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + + here->BSIM3v32cdgb + T10); + here->BSIM3v32cbdb = -(here->BSIM3v32cgdb + + here->BSIM3v32cddb + T12); + here->BSIM3v32cbsb = -(here->BSIM3v32cgsb + + here->BSIM3v32cdsb + T0); + here->BSIM3v32qinv = -(qgate + qbulk); + } + } + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 Charge partition model */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.4 * T2; + + here->BSIM3v32cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); + here->BSIM3v32cgdb = 0.0; + + T3 = 0.4 * Two_Third_CoxWL; + here->BSIM3v32cdgb = -T3 * dVgs_eff_dVg; + here->BSIM3v32cddb = 0.0; + T4 = T3 * dVth_dVb; + here->BSIM3v32cdsb = -(T4 + here->BSIM3v32cdgb); + + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); + here->BSIM3v32cbdb = 0.0; + here->BSIM3v32qinv = -(qgate + qbulk); + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v32phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM3v32cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM3v32cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + + here->BSIM3v32cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds + + 1.2 * Vds * Vds; + T8 = T2 / T1; + T7 = Vds - T1 - T8 * T6; + qdrn = T4 * T7; + T7 *= T9; + tmp = T8 / T1; + tmp1 = T4 * (2.0 - 4.0 * tmp * T6 + + T8 * (16.0 * Vdsat - 6.0 * Vds)); + + here->BSIM3v32cdgb = (T7 * dAlphaz_dVg - tmp1 + * dVdsat_dVg) * dVgs_eff_dVg; + T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb; + here->BSIM3v32cddb = T4 * (2.0 - (1.0 / (3.0 * T1 + * T1) + 2.0 * tmp) * T6 + T8 + * (6.0 * Vdsat - 2.4 * Vds)); + here->BSIM3v32cdsb = -(here->BSIM3v32cdgb + + T10 + here->BSIM3v32cddb); + + T7 = 2.0 * (T1 + T3); + qbulk = -(qgate - T4 * T7); + T7 *= T9; + T0 = 4.0 * T4 * (1.0 - T5); + T12 = (-T7 * dAlphaz_dVg - here->BSIM3v32cdgb + - T0 * dVdsat_dVg) * dVgs_eff_dVg; + T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; + T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) + - here->BSIM3v32cddb; + tmp = -(T10 + T11 + T12); + + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + + here->BSIM3v32cdgb + T12); + here->BSIM3v32cbdb = -(here->BSIM3v32cgdb + + here->BSIM3v32cddb + T10); /* bug fix */ + here->BSIM3v32cbsb = -(here->BSIM3v32cgsb + + here->BSIM3v32cdsb + tmp); + here->BSIM3v32qinv = -(qgate + qbulk); + } + } + else + { /* 50/50 partitioning */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.5 * T2; + + here->BSIM3v32cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); + here->BSIM3v32cgdb = 0.0; + + here->BSIM3v32cdgb = -One_Third_CoxWL * dVgs_eff_dVg; + here->BSIM3v32cddb = 0.0; + T4 = One_Third_CoxWL * dVth_dVb; + here->BSIM3v32cdsb = -(T4 + here->BSIM3v32cdgb); + + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); + here->BSIM3v32cbdb = 0.0; + here->BSIM3v32qinv = -(qgate + qbulk); + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v32phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM3v32cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM3v32cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + + here->BSIM3v32cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T7 = T1 + T3; + qdrn = -T4 * T7; + qbulk = - (qgate + qdrn + qdrn); + T7 *= T9; + T0 = T4 * (2.0 * T5 - 2.0); + + here->BSIM3v32cdgb = (T0 * dVdsat_dVg - T7 + * dAlphaz_dVg) * dVgs_eff_dVg; + T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; + here->BSIM3v32cddb = T4 * (1.0 - 2.0 * T2 - T5); + here->BSIM3v32cdsb = -(here->BSIM3v32cdgb + T12 + + here->BSIM3v32cddb); + + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + + 2.0 * here->BSIM3v32cdgb); + here->BSIM3v32cbdb = -(here->BSIM3v32cgdb + + 2.0 * here->BSIM3v32cddb); + here->BSIM3v32cbsb = -(here->BSIM3v32cgsb + + 2.0 * here->BSIM3v32cdsb); + here->BSIM3v32qinv = -(qgate + qbulk); + } + } + } + } + else + { if (Vbseff < 0.0) + { VbseffCV = Vbseff; + dVbseffCV_dVb = 1.0; + } + else + { VbseffCV = pParam->BSIM3v32phi - Phis; + dVbseffCV_dVb = -dPhis_dVb; + } + + CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV + * pParam->BSIM3v32leffCV; + + /* Seperate VgsteffCV with noff and voffcv */ + noff = n * pParam->BSIM3v32noff; + dnoff_dVd = pParam->BSIM3v32noff * dn_dVd; + dnoff_dVb = pParam->BSIM3v32noff * dn_dVb; + T0 = Vtm * noff; + voffcv = pParam->BSIM3v32voffcv; + VgstNVt = (Vgst - voffcv) / T0; + + if (VgstNVt > EXP_THRESHOLD) + { Vgsteff = Vgst - voffcv; + dVgsteff_dVg = dVgs_eff_dVg; + dVgsteff_dVd = -dVth_dVd; + dVgsteff_dVb = -dVth_dVb; + } + else if (VgstNVt < -EXP_THRESHOLD) + { Vgsteff = T0 * log(1.0 + MIN_EXP); + dVgsteff_dVg = 0.0; + dVgsteff_dVd = Vgsteff / noff; + dVgsteff_dVb = dVgsteff_dVd * dnoff_dVb; + dVgsteff_dVd *= dnoff_dVd; + } + else + { ExpVgst = exp(VgstNVt); + Vgsteff = T0 * log(1.0 + ExpVgst); + dVgsteff_dVg = ExpVgst / (1.0 + ExpVgst); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + (Vgst - voffcv) + / noff * dnoff_dVd) + Vgsteff / noff * dnoff_dVd; + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + (Vgst - voffcv) + / noff * dnoff_dVb) + Vgsteff / noff * dnoff_dVb; + dVgsteff_dVg *= dVgs_eff_dVg; + } /* End of VgsteffCV */ + + if (model->BSIM3v32capMod == 1) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Vfb = pParam->BSIM3v32vfbzb; + break; + case BSIM3v32V32: + Vfb = pParam->BSIM3v32vfbzb; + dVfb_dVb = dVfb_dVd = 0.0; + break; + default: + Vfb = Vth - pParam->BSIM3v32phi - pParam->BSIM3v32k1ox * sqrtPhis; + dVfb_dVb = dVth_dVb - pParam->BSIM3v32k1ox * dsqrtPhis_dVb; + dVfb_dVd = dVth_dVd; + } + + Arg1 = Vgs_eff - VbseffCV - Vfb - Vgsteff; + + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + Cgg = CoxWL * (dVgs_eff_dVg - dVgsteff_dVg); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cgd = -CoxWL * dVgsteff_dVd; + Cgb = -CoxWL * (dVbseffCV_dVb + dVgsteff_dVb); + break; + case BSIM3v32V32: + default: + Cgd = -CoxWL * (dVfb_dVd + dVgsteff_dVd); + Cgb = -CoxWL * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); + } + } + else + { T0 = 0.5 * pParam->BSIM3v32k1ox; + T1 = sqrt(T0 * T0 + Arg1); + T2 = CoxWL * T0 / T1; + + qgate = CoxWL * pParam->BSIM3v32k1ox * (T1 - T0); + + Cgg = T2 * (dVgs_eff_dVg - dVgsteff_dVg); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cgd = -T2 * dVgsteff_dVd; + Cgb = -T2 * (dVbseffCV_dVb + dVgsteff_dVb); + break; + case BSIM3v32V32: + default: + Cgd = -T2 * (dVfb_dVd + dVgsteff_dVd); + Cgb = -T2 * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); + } + } + qbulk = -qgate; + Cbg = -Cgg; + Cbd = -Cgd; + Cbb = -Cgb; + + One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + if (VdsatCV < Vds) + { dVdsatCV_dVg = 1.0 / AbulkCV; + dVdsatCV_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T0 = Vgsteff - VdsatCV / 3.0; + dT0_dVg = 1.0 - dVdsatCV_dVg / 3.0; + dT0_dVb = -dVdsatCV_dVb / 3.0; + qgate += CoxWL * T0; + Cgg1 = CoxWL * dT0_dVg; + Cgb1 = CoxWL * dT0_dVb + Cgg1 * dVgsteff_dVb; + Cgd1 = Cgg1 * dVgsteff_dVd; + Cgg1 *= dVgsteff_dVg; + Cgg += Cgg1; + Cgb += Cgb1; + Cgd += Cgd1; + + T0 = VdsatCV - Vgsteff; + dT0_dVg = dVdsatCV_dVg - 1.0; + dT0_dVb = dVdsatCV_dVb; + qbulk += One_Third_CoxWL * T0; + Cbg1 = One_Third_CoxWL * dT0_dVg; + Cbb1 = One_Third_CoxWL * dT0_dVb + Cbg1 * dVgsteff_dVb; + Cbd1 = Cbg1 * dVgsteff_dVd; + Cbg1 *= dVgsteff_dVg; + Cbg += Cbg1; + Cbb += Cbb1; + Cbd += Cbd1; + + if (model->BSIM3v32xpart > 0.5) + T0 = -Two_Third_CoxWL; + else if (model->BSIM3v32xpart < 0.5) + T0 = -0.4 * CoxWL; + else + T0 = -One_Third_CoxWL; + + qsrc = T0 * Vgsteff; + Csg = T0 * dVgsteff_dVg; + Csb = T0 * dVgsteff_dVb; + Csd = T0 * dVgsteff_dVd; + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + } + else + { T0 = AbulkCV * Vds; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.e-20); + T2 = Vds / T1; + T3 = T0 * T2; + dT3_dVg = -12.0 * T2 * T2 * AbulkCV; + dT3_dVd = 6.0 * T0 * (4.0 * Vgsteff - T0) / T1 / T1 - 0.5; + dT3_dVb = 12.0 * T2 * T2 * dAbulkCV_dVb * Vgsteff; + + qgate += CoxWL * (Vgsteff - 0.5 * Vds + T3); + Cgg1 = CoxWL * (1.0 + dT3_dVg); + Cgb1 = CoxWL * dT3_dVb + Cgg1 * dVgsteff_dVb; + Cgd1 = CoxWL * dT3_dVd + Cgg1 * dVgsteff_dVd; + Cgg1 *= dVgsteff_dVg; + Cgg += Cgg1; + Cgb += Cgb1; + Cgd += Cgd1; + + qbulk += CoxWL * (1.0 - AbulkCV) * (0.5 * Vds - T3); + Cbg1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVg); + Cbb1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVb + + (0.5 * Vds - T3) * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbd1 = -CoxWL * (1.0 - AbulkCV) * dT3_dVd + + Cbg1 * dVgsteff_dVd; + Cbg1 *= dVgsteff_dVg; + Cbg += Cbg1; + Cbb += Cbb1; + Cbd += Cbd1; + + if (model->BSIM3v32xpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + Csg = -CoxWL * (0.5 + 24.0 * T0 * Vds / T1 / T1 + * AbulkCV); + Csb = -CoxWL * (0.25 * Vds * dAbulkCV_dVb + - 12.0 * T0 * Vds / T1 / T1 * (4.0 * Vgsteff - T0) + * dAbulkCV_dVb) + Csg * dVgsteff_dVb; + Csd = -CoxWL * (0.25 * AbulkCV - 12.0 * AbulkCV * T0 + / T1 / T1 * (4.0 * Vgsteff - T0)) + + Csg * dVgsteff_dVd; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T4 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + Csg = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + Csb = (qsrc / T1 * Vds + T2 * T4 * Vds) * dAbulkCV_dVb + + Csg * dVgsteff_dVb; + Csd = (qsrc / T1 + T2 * T4) * AbulkCV + + Csg * dVgsteff_dVd; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + } + qdrn = -(qgate + qbulk + qsrc); + here->BSIM3v32cggb = Cgg; + here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v32cgdb = Cgd; + here->BSIM3v32cdgb = -(Cgg + Cbg + Csg); + here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v32cddb = -(Cgd + Cbd + Csd); + here->BSIM3v32cbgb = Cbg; + here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v32cbdb = Cbd; + here->BSIM3v32qinv = -(qgate + qbulk); + } + + else if (model->BSIM3v32capMod == 2) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Vfb = pParam->BSIM3v32vfbzb; + break; + case BSIM3v32V32: + Vfb = pParam->BSIM3v32vfbzb; + dVfb_dVb = dVfb_dVd = 0.0; + break; + default: /* old code prior to v3.2 */ + Vfb = Vth - pParam->BSIM3v32phi - pParam->BSIM3v32k1ox * sqrtPhis; + dVfb_dVb = dVth_dVb - pParam->BSIM3v32k1ox * dsqrtPhis_dVb; + dVfb_dVd = dVth_dVd; + } + + V3 = Vfb - Vgs_eff + VbseffCV - DELTA_3; + if (Vfb <= 0.0) + { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + T2 = -DELTA_3 / T0; + } + else + { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + T2 = DELTA_3 / T0; + } + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Do nothing */ + break; + case BSIM3v32V32: + default: + dVfbeff_dVd = (1.0 - T1 - T2) * dVfb_dVd; + } + dVfbeff_dVg = T1 * dVgs_eff_dVg; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + break; + case BSIM3v32V32: + default: + dVfbeff_dVb = (1.0 - T1 - T2) * dVfb_dVb - T1 * dVbseffCV_dVb; + } + Qac0 = CoxWL * (Vfbeff - Vfb); + dQac0_dVg = CoxWL * dVfbeff_dVg; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Do nothing */ + break; + case BSIM3v32V32: + default: + dQac0_dVd = CoxWL * (dVfbeff_dVd - dVfb_dVd); + } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dQac0_dVb = CoxWL * dVfbeff_dVb; + break; + case BSIM3v32V32: + default: + dQac0_dVb = CoxWL * (dVfbeff_dVb - dVfb_dVb); + } + + T0 = 0.5 * pParam->BSIM3v32k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM3v32k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM3v32k1ox; + T2 = CoxWL; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWL * T0 / T1; + } + + Qsub0 = CoxWL * pParam->BSIM3v32k1ox * (T1 - T0); + + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dQsub0_dVd = -T2 * dVgsteff_dVd; + break; + case BSIM3v32V32: + default: + dQsub0_dVd = -T2 * (dVfbeff_dVd + dVgsteff_dVd); + } + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + + dVgsteff_dVb); + + AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + + V4 = VdsatCV - Vds - DELTA_4; + T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); + VdseffCV = VdsatCV - 0.5 * (V4 + T0); + T1 = 0.5 * (1.0 + V4 / T0); + T2 = DELTA_4 / T0; + T3 = (1.0 - T1 - T2) / AbulkCV; + dVdseffCV_dVg = T3; + dVdseffCV_dVd = T1; + dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Added to eliminate non-zero VdseffCV at Vds=0.0 */ + if (Vds == 0.0) + { + VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + + T0 = AbulkCV * VdseffCV; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1e-20); + T2 = VdseffCV / T1; + T3 = T0 * T2; + + T4 = (1.0 - 12.0 * T2 * T2 * AbulkCV); + T5 = (6.0 * T0 * (4.0 * Vgsteff - T0) / (T1 * T1) - 0.5); + T6 = 12.0 * T2 * T2 * Vgsteff; + + qinoi = -CoxWL * (Vgsteff - 0.5 * T0 + AbulkCV * T3); + qgate = CoxWL * (Vgsteff - 0.5 * VdseffCV + T3); + Cgg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cgd1 = CoxWL * T5 * dVdseffCV_dVd + Cgg1 * dVgsteff_dVd; + Cgb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb; + Cgg1 *= dVgsteff_dVg; + + T7 = 1.0 - AbulkCV; + qbulk = CoxWL * T7 * (0.5 * VdseffCV - T3); + T4 = -T7 * (T4 - 1.0); + T5 = -T7 * T5; + T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); + Cbg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cbd1 = CoxWL * T5 * dVdseffCV_dVd + Cbg1 * dVgsteff_dVd; + Cbb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbg1 *= dVgsteff_dVg; + + if (model->BSIM3v32xpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + T7 = (4.0 * Vgsteff - T0) / (T1 * T1); + T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); + T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); + T6 = -(0.25 * VdseffCV - 12.0 * T0 * VdseffCV * T7); + Csg = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWL * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + T5 = (qsrc / T1 + T2 * T7) * AbulkCV; + T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); + Csg = (T4 + T5 * dVdseffCV_dVg); + Csd = T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + + qgate += Qac0 + Qsub0; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cgd = dQsub0_dVd + Cgd1; + break; + case BSIM3v32V32: + default: + Cgd = dQac0_dVd + dQsub0_dVd + Cgd1; + } + Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cbd = Cbd1 - dQsub0_dVd; + break; + case BSIM3v32V32: + default: + Cbd = Cbd1 - dQac0_dVd - dQsub0_dVd; + } + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM3v32cggb = Cgg; + here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v32cgdb = Cgd; + here->BSIM3v32cdgb = -(Cgg + Cbg + Csg); + here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v32cddb = -(Cgd + Cbd + Csd); + here->BSIM3v32cbgb = Cbg; + here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v32cbdb = Cbd; + here->BSIM3v32qinv = qinoi; + } + + /* New Charge-Thickness capMod (CTM) begins */ + else if (model->BSIM3v32capMod == 3) + { V3 = pParam->BSIM3v32vfbzb - Vgs_eff + VbseffCV - DELTA_3; + if (pParam->BSIM3v32vfbzb <= 0.0) + { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * pParam->BSIM3v32vfbzb); + T2 = -DELTA_3 / T0; + } + else + { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * pParam->BSIM3v32vfbzb); + T2 = DELTA_3 / T0; + } + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = pParam->BSIM3v32vfbzb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + + Cox = model->BSIM3v32cox; + Tox = 1.0e8 * model->BSIM3v32tox; + T0 = (Vgs_eff - VbseffCV - pParam->BSIM3v32vfbzb) / Tox; + dT0_dVg = dVgs_eff_dVg / Tox; + dT0_dVb = -dVbseffCV_dVb / Tox; + + tmp = T0 * pParam->BSIM3v32acde; + if ((-EXP_THRESHOLD < tmp) && (tmp < EXP_THRESHOLD)) + { Tcen = pParam->BSIM3v32ldeb * exp(tmp); + dTcen_dVg = pParam->BSIM3v32acde * Tcen; + dTcen_dVb = dTcen_dVg * dT0_dVb; + dTcen_dVg *= dT0_dVg; + } + else if (tmp <= -EXP_THRESHOLD) + { Tcen = pParam->BSIM3v32ldeb * MIN_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + else + { Tcen = pParam->BSIM3v32ldeb * MAX_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + + LINK = 1.0e-3 * model->BSIM3v32tox; + V3 = pParam->BSIM3v32ldeb - Tcen - LINK; + V4 = sqrt(V3 * V3 + 4.0 * LINK * pParam->BSIM3v32ldeb); + Tcen = pParam->BSIM3v32ldeb - 0.5 * (V3 + V4); + T1 = 0.5 * (1.0 + V3 / V4); + dTcen_dVg *= T1; + dTcen_dVb *= T1; + + Ccen = EPSSI / Tcen; + T2 = Cox / (Cox + Ccen); + Coxeff = T2 * Ccen; + T3 = -Ccen / Tcen; + dCoxeff_dVg = T2 * T2 * T3; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / Cox; + + Qac0 = CoxWLcen * (Vfbeff - pParam->BSIM3v32vfbzb); + QovCox = Qac0 / Coxeff; + dQac0_dVg = CoxWLcen * dVfbeff_dVg + + QovCox * dCoxeff_dVg; + dQac0_dVb = CoxWLcen * dVfbeff_dVb + + QovCox * dCoxeff_dVb; + + T0 = 0.5 * pParam->BSIM3v32k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM3v32k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM3v32k1ox; + T2 = CoxWLcen; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWLcen * T0 / T1; + } + + Qsub0 = CoxWLcen * pParam->BSIM3v32k1ox * (T1 - T0); + QovCox = Qsub0 / Coxeff; + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg) + + QovCox * dCoxeff_dVg; + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + dVgsteff_dVb) + + QovCox * dCoxeff_dVb; + + /* Gate-bias dependent delta Phis begins */ + if (pParam->BSIM3v32k1ox <= 0.0) + { Denomi = 0.25 * pParam->BSIM3v32moin * Vtm; + T0 = 0.5 * pParam->BSIM3v32sqrtPhi; + } + else + { Denomi = pParam->BSIM3v32moin * Vtm + * pParam->BSIM3v32k1ox * pParam->BSIM3v32k1ox; + T0 = pParam->BSIM3v32k1ox * pParam->BSIM3v32sqrtPhi; + } + T1 = 2.0 * T0 + Vgsteff; + + DeltaPhi = Vtm * log(1.0 + T1 * Vgsteff / Denomi); + dDeltaPhi_dVg = 2.0 * Vtm * (T1 -T0) / (Denomi + T1 * Vgsteff); + dDeltaPhi_dVd = dDeltaPhi_dVg * dVgsteff_dVd; + dDeltaPhi_dVb = dDeltaPhi_dVg * dVgsteff_dVb; + /* End of delta Phis */ + + T3 = 4.0 * (Vth - pParam->BSIM3v32vfbzb - pParam->BSIM3v32phi); + Tox += Tox; + if (T3 >= 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = (Vgsteff + T3) / Tox; + dT0_dVd = (dVgsteff_dVd + 4.0 * dVth_dVd) / Tox; + dT0_dVb = (dVgsteff_dVb + 4.0 * dVth_dVb) / Tox; + break; + case BSIM3v32V32: + default: + T0 = (Vgsteff + T3) / Tox; + } + } + else + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = (Vgsteff + 1.0e-20) / Tox; + dT0_dVd = dVgsteff_dVd / Tox; + dT0_dVb = dVgsteff_dVb / Tox; + break; + case BSIM3v32V32: + default: + T0 = (Vgsteff + 1.0e-20) / Tox; + } + } + tmp = exp(0.7 * log(T0)); + T1 = 1.0 + tmp; + T2 = 0.7 * tmp / (T0 * Tox); + Tcen = 1.9e-9 / T1; + dTcen_dVg = -1.9e-9 * T2 / T1 /T1; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dTcen_dVd = Tox * dTcen_dVg; + dTcen_dVb = dTcen_dVd * dT0_dVb; + dTcen_dVd *= dT0_dVd; + break; + case BSIM3v32V32: + default: + dTcen_dVd = dTcen_dVg * (4.0 * dVth_dVd + dVgsteff_dVd); + dTcen_dVb = dTcen_dVg * (4.0 * dVth_dVb + dVgsteff_dVb); + } + dTcen_dVg *= dVgsteff_dVg; + + Ccen = EPSSI / Tcen; + T0 = Cox / (Cox + Ccen); + Coxeff = T0 * Ccen; + T1 = -Ccen / Tcen; + dCoxeff_dVg = T0 * T0 * T1; + dCoxeff_dVd = dCoxeff_dVg * dTcen_dVd; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / Cox; + + AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; + VdsatCV = (Vgsteff - DeltaPhi) / AbulkCV; + V4 = VdsatCV - Vds - DELTA_4; + T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); + VdseffCV = VdsatCV - 0.5 * (V4 + T0); + T1 = 0.5 * (1.0 + V4 / T0); + T2 = DELTA_4 / T0; + T3 = (1.0 - T1 - T2) / AbulkCV; + T4 = T3 * ( 1.0 - dDeltaPhi_dVg); + dVdseffCV_dVg = T4; + dVdseffCV_dVd = T1; + dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Added to eliminate non-zero VdseffCV at Vds=0.0 */ + if (Vds == 0.0) + { + VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + + T0 = AbulkCV * VdseffCV; + T1 = Vgsteff - DeltaPhi; + T2 = 12.0 * (T1 - 0.5 * T0 + 1.0e-20); + T3 = T0 / T2; + T4 = 1.0 - 12.0 * T3 * T3; + T5 = AbulkCV * (6.0 * T0 * (4.0 * T1 - T0) / (T2 * T2) - 0.5); + T6 = T5 * VdseffCV / AbulkCV; + + qgate = qinoi = CoxWLcen * (T1 - T0 * (0.5 - T3)); + QovCox = qgate / Coxeff; + Cgg1 = CoxWLcen * (T4 * (1.0 - dDeltaPhi_dVg) + + T5 * dVdseffCV_dVg); + Cgd1 = CoxWLcen * T5 * dVdseffCV_dVd + Cgg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cgb1 = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cgg1 = Cgg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + + T7 = 1.0 - AbulkCV; + T8 = T2 * T2; + T9 = 12.0 * T7 * T0 * T0 / (T8 * AbulkCV); + T10 = T9 * (1.0 - dDeltaPhi_dVg); + T11 = -T7 * T5 / AbulkCV; + T12 = -(T9 * T1 / AbulkCV + VdseffCV * (0.5 - T0 / T2)); + + qbulk = CoxWLcen * T7 * (0.5 * VdseffCV - T0 * VdseffCV / T2); + QovCox = qbulk / Coxeff; + Cbg1 = CoxWLcen * (T10 + T11 * dVdseffCV_dVg); + Cbd1 = CoxWLcen * T11 * dVdseffCV_dVd + Cbg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cbb1 = CoxWLcen * (T11 * dVdseffCV_dVb + T12 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cbg1 = Cbg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + if (model->BSIM3v32xpart > 0.5) + { /* 0/100 partition */ + qsrc = -CoxWLcen * (T1 / 2.0 + T0 / 4.0 + - 0.5 * T0 * T0 / T2); + QovCox = qsrc / Coxeff; + T2 += T2; + T3 = T2 * T2; + T7 = -(0.25 - 12.0 * T0 * (4.0 * T1 - T0) / T3); + T4 = -(0.5 + 24.0 * T0 * T0 / T3) * (1.0 - dDeltaPhi_dVg); + T5 = T7 * AbulkCV; + T6 = T7 * VdseffCV; + + Csg = CoxWLcen * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWLcen * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd + + QovCox * dCoxeff_dVd; + Csb = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 partition */ + T2 = T2 / 12.0; + T3 = 0.5 * CoxWLcen / (T2 * T2); + T4 = T1 * (2.0 * T0 * T0 / 3.0 + T1 * (T1 - 4.0 + * T0 / 3.0)) - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T3 * T4; + QovCox = qsrc / Coxeff; + T8 = 4.0 / 3.0 * T1 * (T1 - T0) + 0.4 * T0 * T0; + T5 = -2.0 * qsrc / T2 - T3 * (T1 * (3.0 * T1 - 8.0 + * T0 / 3.0) + 2.0 * T0 * T0 / 3.0); + T6 = AbulkCV * (qsrc / T2 + T3 * T8); + T7 = T6 * VdseffCV / AbulkCV; + + Csg = T5 * (1.0 - dDeltaPhi_dVg) + T6 * dVdseffCV_dVg; + Csd = Csg * dVgsteff_dVd + T6 * dVdseffCV_dVd + + QovCox * dCoxeff_dVd; + Csb = Csg * dVgsteff_dVb + T6 * dVdseffCV_dVb + + T7 * dAbulkCV_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else + { /* 50/50 partition */ + qsrc = -0.5 * qgate; + Csg = -0.5 * Cgg1; + Csd = -0.5 * Cgd1; + Csb = -0.5 * Cgb1; + } + + qgate += Qac0 + Qsub0 - qbulk; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgg = Cgg1 - Cbg; + Cgd = Cgd1 - Cbd; + Cgb = Cgb1 - Cbb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM3v32cggb = Cgg; + here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v32cgdb = Cgd; + here->BSIM3v32cdgb = -(Cgg + Cbg + Csg); + here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v32cddb = -(Cgd + Cbd + Csd); + here->BSIM3v32cbgb = Cbg; + here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v32cbdb = Cbd; + here->BSIM3v32qinv = -qinoi; + } /* End of CTM */ + } + +finished: + /* Returning Values to Calling Routine */ + /* + * COMPUTE EQUIVALENT DRAIN CURRENT SOURCE + */ + + here->BSIM3v32qgate = qgate; + here->BSIM3v32qbulk = qbulk; + here->BSIM3v32qdrn = qdrn; + here->BSIM3v32cd = cdrain; + + if (ChargeComputationNeeded) + { /* charge storage elements + * bulk-drain and bulk-source depletion capacitances + * czbd : zero bias drain junction capacitance + * czbs : zero bias source junction capacitance + * czbdsw: zero bias drain junction sidewall capacitance + along field oxide + * czbssw: zero bias source junction sidewall capacitance + along field oxide + * czbdswg: zero bias drain junction sidewall capacitance + along gate side + * czbsswg: zero bias source junction sidewall capacitance + along gate side + */ + + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbd = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32drainArea; /*bug fix */ + czbs = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32sourceArea; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbd = model->BSIM3v32unitAreaJctCap * here->BSIM3v32drainArea; + czbs = model->BSIM3v32unitAreaJctCap * here->BSIM3v32sourceArea; + } + + if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * here->BSIM3v32drainPerimeter; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbdswg = model->BSIM3v32unitLengthGateSidewallJctCap + * here->BSIM3v32drainPerimeter; + } + czbdsw = 0.0; + } + else + { + czbdsw = model->BSIM3v32unitLengthSidewallTempJctCap + * (here->BSIM3v32drainPerimeter - pParam->BSIM3v32weff); + czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * pParam->BSIM3v32weff; + } + if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff) + { + czbssw = 0.0; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * here->BSIM3v32sourcePerimeter; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap + * here->BSIM3v32sourcePerimeter; + } + } + else + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbssw = model->BSIM3v32unitLengthSidewallTempJctCap + * (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff); + czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * pParam->BSIM3v32weff; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbssw = model->BSIM3v32unitLengthSidewallJctCap + * (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff); + czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap + * pParam->BSIM3v32weff; + } + } + + MJ = model->BSIM3v32bulkJctBotGradingCoeff; + MJSW = model->BSIM3v32bulkJctSideGradingCoeff; + MJSWG = model->BSIM3v32bulkJctGateSideGradingCoeff; + + /* Source Bulk Junction */ + if (vbs == 0.0) + { *(ckt->CKTstate0 + here->BSIM3v32qbs) = 0.0; + here->BSIM3v32capbs = czbs + czbssw + czbsswg; + } + else if (vbs < 0.0) + { if (czbs > 0.0) + { arg = 1.0 - vbs / model->BSIM3v32PhiB; + if (MJ == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJ * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v32qbs) = model->BSIM3v32PhiB * czbs + * (1.0 - arg * sarg) / (1.0 - MJ); + here->BSIM3v32capbs = czbs * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM3v32qbs) = 0.0; + here->BSIM3v32capbs = 0.0; + } + if (czbssw > 0.0) + { arg = 1.0 - vbs / model->BSIM3v32PhiBSW; + if (MJSW == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSW * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v32qbs) += model->BSIM3v32PhiBSW * czbssw + * (1.0 - arg * sarg) / (1.0 - MJSW); + here->BSIM3v32capbs += czbssw * sarg; + } + if (czbsswg > 0.0) + { arg = 1.0 - vbs / model->BSIM3v32PhiBSWG; + if (MJSWG == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWG * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v32qbs) += model->BSIM3v32PhiBSWG * czbsswg + * (1.0 - arg * sarg) / (1.0 - MJSWG); + here->BSIM3v32capbs += czbsswg * sarg; + } + + } + else + { T0 = czbs + czbssw + czbsswg; + T1 = vbs * (czbs * MJ / model->BSIM3v32PhiB + czbssw * MJSW + / model->BSIM3v32PhiBSW + czbsswg * MJSWG / model->BSIM3v32PhiBSWG); + *(ckt->CKTstate0 + here->BSIM3v32qbs) = vbs * (T0 + 0.5 * T1); + here->BSIM3v32capbs = T0 + T1; + } + + /* Drain Bulk Junction */ + if (vbd == 0.0) + { *(ckt->CKTstate0 + here->BSIM3v32qbd) = 0.0; + here->BSIM3v32capbd = czbd + czbdsw + czbdswg; + } + else if (vbd < 0.0) + { if (czbd > 0.0) + { arg = 1.0 - vbd / model->BSIM3v32PhiB; + if (MJ == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJ * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v32qbd) = model->BSIM3v32PhiB * czbd + * (1.0 - arg * sarg) / (1.0 - MJ); + here->BSIM3v32capbd = czbd * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM3v32qbd) = 0.0; + here->BSIM3v32capbd = 0.0; + } + if (czbdsw > 0.0) + { arg = 1.0 - vbd / model->BSIM3v32PhiBSW; + if (MJSW == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSW * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v32qbd) += model->BSIM3v32PhiBSW * czbdsw + * (1.0 - arg * sarg) / (1.0 - MJSW); + here->BSIM3v32capbd += czbdsw * sarg; + } + if (czbdswg > 0.0) + { arg = 1.0 - vbd / model->BSIM3v32PhiBSWG; + if (MJSWG == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWG * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v32qbd) += model->BSIM3v32PhiBSWG * czbdswg + * (1.0 - arg * sarg) / (1.0 - MJSWG); + here->BSIM3v32capbd += czbdswg * sarg; + } + } + else + { T0 = czbd + czbdsw + czbdswg; + T1 = vbd * (czbd * MJ / model->BSIM3v32PhiB + czbdsw * MJSW + / model->BSIM3v32PhiBSW + czbdswg * MJSWG / model->BSIM3v32PhiBSWG); + *(ckt->CKTstate0 + here->BSIM3v32qbd) = vbd * (T0 + 0.5 * T1); + here->BSIM3v32capbd = T0 + T1; + } + } + + /* + * check convergence + */ + if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { if (Check == 1) + { ckt->CKTnoncon++; +//#ifndef NEWCONV +// } +// else +// { if (here->BSIM3v32mode >= 0) +// { Idtot = here->BSIM3v32cd + here->BSIM3v32csub - here->BSIM3v32cbd; +// } +// else +// { Idtot = here->BSIM3v32cd - here->BSIM3v32cbd; +// } +// tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot)) +// + ckt->CKTabstol; +// if (fabs(cdhat - Idtot) >= tol) +// { ckt->CKTnoncon++; +// } +// else +// { Ibtot = here->BSIM3v32cbs + here->BSIM3v32cbd - here->BSIM3v32csub; +// tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot)) +// + ckt->CKTabstol; +// if (fabs(cbhat - Ibtot) > tol) +// { ckt->CKTnoncon++; +// } +// } +//#endif /* NEWCONV */ + } + } + *(ckt->CKTstate0 + here->BSIM3v32vbs) = vbs; + *(ckt->CKTstate0 + here->BSIM3v32vbd) = vbd; + *(ckt->CKTstate0 + here->BSIM3v32vgs) = vgs; + *(ckt->CKTstate0 + here->BSIM3v32vds) = vds; + *(ckt->CKTstate0 + here->BSIM3v32qdef) = qdef; + + /* bulk and channel charge plus overlaps */ + + if (!ChargeComputationNeeded) + goto line850; + +line755: + /* NQS begins */ + if (here->BSIM3v32nqsMod) + { qcheq = -(qbulk + qgate); + + here->BSIM3v32cqgb = -(here->BSIM3v32cggb + here->BSIM3v32cbgb); + here->BSIM3v32cqdb = -(here->BSIM3v32cgdb + here->BSIM3v32cbdb); + here->BSIM3v32cqsb = -(here->BSIM3v32cgsb + here->BSIM3v32cbsb); + here->BSIM3v32cqbb = -(here->BSIM3v32cqgb + here->BSIM3v32cqdb + + here->BSIM3v32cqsb); + + gtau_drift = fabs(pParam->BSIM3v32tconst * qcheq) * ScalingFactor; + T0 = pParam->BSIM3v32leffCV * pParam->BSIM3v32leffCV; + gtau_diff = 16.0 * pParam->BSIM3v32u0temp * model->BSIM3v32vtm / T0 + * ScalingFactor; + here->BSIM3v32gtau = gtau_drift + gtau_diff; + } + + if (model->BSIM3v32capMod == 0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + /* code merge -JX */ + cgdo = pParam->BSIM3v32cgdo; + qgdo = pParam->BSIM3v32cgdo * vgd; + cgso = pParam->BSIM3v32cgso; + qgso = pParam->BSIM3v32cgso * vgs; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + if (vgd < 0.0) + { + cgdo = pParam->BSIM3v32cgdo; + qgdo = pParam->BSIM3v32cgdo * vgd; + } + else + { + cgdo = pParam->BSIM3v32cgdo; + qgdo = pParam->BSIM3v32cgdo * vgd; + } + + if (vgs < 0.0) + { + cgso = pParam->BSIM3v32cgso; + qgso = pParam->BSIM3v32cgso * vgs; + } + else + { + cgso = pParam->BSIM3v32cgso; + qgso = pParam->BSIM3v32cgso * vgs; + } + } + } + else if (model->BSIM3v32capMod == 1) + { if (vgd < 0.0) + { T1 = sqrt(1.0 - 4.0 * vgd / pParam->BSIM3v32ckappa); + cgdo = pParam->BSIM3v32cgdo + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgdl / T1; + qgdo = pParam->BSIM3v32cgdo * vgd - pParam->BSIM3v32weffCV * 0.5 + * pParam->BSIM3v32cgdl * pParam->BSIM3v32ckappa * (T1 - 1.0); + } + else + { cgdo = pParam->BSIM3v32cgdo + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgdl; + qgdo = (pParam->BSIM3v32weffCV * pParam->BSIM3v32cgdl + + pParam->BSIM3v32cgdo) * vgd; + } + + if (vgs < 0.0) + { T1 = sqrt(1.0 - 4.0 * vgs / pParam->BSIM3v32ckappa); + cgso = pParam->BSIM3v32cgso + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgsl / T1; + qgso = pParam->BSIM3v32cgso * vgs - pParam->BSIM3v32weffCV * 0.5 + * pParam->BSIM3v32cgsl * pParam->BSIM3v32ckappa * (T1 - 1.0); + } + else + { cgso = pParam->BSIM3v32cgso + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgsl; + qgso = (pParam->BSIM3v32weffCV * pParam->BSIM3v32cgsl + + pParam->BSIM3v32cgso) * vgs; + } + } + else + { T0 = vgd + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + + T3 = pParam->BSIM3v32weffCV * pParam->BSIM3v32cgdl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v32ckappa); + cgdo = pParam->BSIM3v32cgdo + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgdo = (pParam->BSIM3v32cgdo + T3) * vgd - T3 * (T2 + + 0.5 * pParam->BSIM3v32ckappa * (T4 - 1.0)); + + T0 = vgs + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + T3 = pParam->BSIM3v32weffCV * pParam->BSIM3v32cgsl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v32ckappa); + cgso = pParam->BSIM3v32cgso + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgso = (pParam->BSIM3v32cgso + T3) * vgs - T3 * (T2 + + 0.5 * pParam->BSIM3v32ckappa * (T4 - 1.0)); + } + + here->BSIM3v32cgdo = cgdo; + here->BSIM3v32cgso = cgso; + + ag0 = ckt->CKTag[0]; + if (here->BSIM3v32mode > 0) + { if (here->BSIM3v32nqsMod == 0) + { gcggb = (here->BSIM3v32cggb + cgdo + cgso + + pParam->BSIM3v32cgbo ) * ag0; + gcgdb = (here->BSIM3v32cgdb - cgdo) * ag0; + gcgsb = (here->BSIM3v32cgsb - cgso) * ag0; + + gcdgb = (here->BSIM3v32cdgb - cgdo) * ag0; + gcddb = (here->BSIM3v32cddb + here->BSIM3v32capbd + cgdo) * ag0; + gcdsb = here->BSIM3v32cdsb * ag0; + + gcsgb = -(here->BSIM3v32cggb + here->BSIM3v32cbgb + + here->BSIM3v32cdgb + cgso) * ag0; + gcsdb = -(here->BSIM3v32cgdb + here->BSIM3v32cbdb + + here->BSIM3v32cddb) * ag0; + gcssb = (here->BSIM3v32capbs + cgso - (here->BSIM3v32cgsb + + here->BSIM3v32cbsb + here->BSIM3v32cdsb)) * ag0; + + gcbgb = (here->BSIM3v32cbgb - pParam->BSIM3v32cgbo) * ag0; + gcbdb = (here->BSIM3v32cbdb - here->BSIM3v32capbd) * ag0; + gcbsb = (here->BSIM3v32cbsb - here->BSIM3v32capbs) * ag0; + + qgd = qgdo; + qgs = qgso; + qgb = pParam->BSIM3v32cgbo * vgb; + qgate += qgd + qgs + qgb; + qbulk -= qgb; + qdrn -= qgd; + qsrc = -(qgate + qbulk + qdrn); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { if (qcheq > 0.0) + T0 = pParam->BSIM3v32tconst * qdef * ScalingFactor; + else + T0 = -pParam->BSIM3v32tconst * qdef * ScalingFactor; + ggtg = here->BSIM3v32gtg = T0 * here->BSIM3v32cqgb; + ggtd = here->BSIM3v32gtd = T0 * here->BSIM3v32cqdb; + ggts = here->BSIM3v32gts = T0 * here->BSIM3v32cqsb; + ggtb = here->BSIM3v32gtb = T0 * here->BSIM3v32cqbb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM3v32cqgb * ag0; + gcqdb = here->BSIM3v32cqdb * ag0; + gcqsb = here->BSIM3v32cqsb * ag0; + gcqbb = here->BSIM3v32cqbb * ag0; + + gcggb = (cgdo + cgso + pParam->BSIM3v32cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + + gcdgb = -cgdo * ag0; + gcddb = (here->BSIM3v32capbd + cgdo) * ag0; + gcdsb = 0.0; + + gcsgb = -cgso * ag0; + gcsdb = 0.0; + gcssb = (here->BSIM3v32capbs + cgso) * ag0; + + gcbgb = -pParam->BSIM3v32cgbo * ag0; + gcbdb = -here->BSIM3v32capbd * ag0; + gcbsb = -here->BSIM3v32capbs * ag0; + + CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV + * pParam->BSIM3v32leffCV; + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = qdrn / qcheq; + Cdd = here->BSIM3v32cddb; + Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM3v32cdgb; + Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM3v32cdsb; + Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + + qgd = qgdo; + qgs = qgso; + qgb = pParam->BSIM3v32cgbo * vgb; + qgate = qgd + qgs + qgb; + qbulk = -qgb; + qdrn = -qgd; + qsrc = -(qgate + qbulk + qdrn); + } + } + else + { if (here->BSIM3v32nqsMod == 0) + { gcggb = (here->BSIM3v32cggb + cgdo + cgso + + pParam->BSIM3v32cgbo ) * ag0; + gcgdb = (here->BSIM3v32cgsb - cgdo) * ag0; + gcgsb = (here->BSIM3v32cgdb - cgso) * ag0; + + gcdgb = -(here->BSIM3v32cggb + here->BSIM3v32cbgb + + here->BSIM3v32cdgb + cgdo) * ag0; + gcddb = (here->BSIM3v32capbd + cgdo - (here->BSIM3v32cgsb + + here->BSIM3v32cbsb + here->BSIM3v32cdsb)) * ag0; + gcdsb = -(here->BSIM3v32cgdb + here->BSIM3v32cbdb + + here->BSIM3v32cddb) * ag0; + + gcsgb = (here->BSIM3v32cdgb - cgso) * ag0; + gcsdb = here->BSIM3v32cdsb * ag0; + gcssb = (here->BSIM3v32cddb + here->BSIM3v32capbs + cgso) * ag0; + + gcbgb = (here->BSIM3v32cbgb - pParam->BSIM3v32cgbo) * ag0; + gcbdb = (here->BSIM3v32cbsb - here->BSIM3v32capbd) * ag0; + gcbsb = (here->BSIM3v32cbdb - here->BSIM3v32capbs) * ag0; + + qgd = qgdo; + qgs = qgso; + qgb = pParam->BSIM3v32cgbo * vgb; + qgate += qgd + qgs + qgb; + qbulk -= qgb; + qsrc = qdrn - qgs; + qdrn = -(qgate + qbulk + qsrc); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { if (qcheq > 0.0) + T0 = pParam->BSIM3v32tconst * qdef * ScalingFactor; + else + T0 = -pParam->BSIM3v32tconst * qdef * ScalingFactor; + ggtg = here->BSIM3v32gtg = T0 * here->BSIM3v32cqgb; + ggts = here->BSIM3v32gtd = T0 * here->BSIM3v32cqdb; + ggtd = here->BSIM3v32gts = T0 * here->BSIM3v32cqsb; + ggtb = here->BSIM3v32gtb = T0 * here->BSIM3v32cqbb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM3v32cqgb * ag0; + gcqdb = here->BSIM3v32cqsb * ag0; + gcqsb = here->BSIM3v32cqdb * ag0; + gcqbb = here->BSIM3v32cqbb * ag0; + + gcggb = (cgdo + cgso + pParam->BSIM3v32cgbo) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + + gcdgb = -cgdo * ag0; + gcddb = (here->BSIM3v32capbd + cgdo) * ag0; + gcdsb = 0.0; + + gcsgb = -cgso * ag0; + gcsdb = 0.0; + gcssb = (here->BSIM3v32capbs + cgso) * ag0; + + gcbgb = -pParam->BSIM3v32cgbo * ag0; + gcbdb = -here->BSIM3v32capbd * ag0; + gcbsb = -here->BSIM3v32capbs * ag0; + + CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV + * pParam->BSIM3v32leffCV; + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = qdrn / qcheq; + Css = here->BSIM3v32cddb; + Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM3v32cdgb; + Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM3v32cdsb; + Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + + qgd = qgdo; + qgs = qgso; + qgb = pParam->BSIM3v32cgbo * vgb; + qgate = qgd + qgs + qgb; + qbulk = -qgb; + qsrc = -qgs; + qdrn = -(qgate + qbulk + qsrc); + } + } + + cqdef = cqcheq = 0.0; + if (ByPass) goto line860; + + *(ckt->CKTstate0 + here->BSIM3v32qg) = qgate; + *(ckt->CKTstate0 + here->BSIM3v32qd) = qdrn + - *(ckt->CKTstate0 + here->BSIM3v32qbd); + *(ckt->CKTstate0 + here->BSIM3v32qb) = qbulk + + *(ckt->CKTstate0 + here->BSIM3v32qbd) + + *(ckt->CKTstate0 + here->BSIM3v32qbs); + + if (here->BSIM3v32nqsMod) + { *(ckt->CKTstate0 + here->BSIM3v32qcdump) = qdef * ScalingFactor; + *(ckt->CKTstate0 + here->BSIM3v32qcheq) = qcheq; + } + + /* store small signal parameters */ + if (ckt->CKTmode & MODEINITSMSIG) + { goto line1000; + } + if (!ChargeComputationNeeded) + goto line850; + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM3v32qb) = + *(ckt->CKTstate0 + here->BSIM3v32qb); + *(ckt->CKTstate1 + here->BSIM3v32qg) = + *(ckt->CKTstate0 + here->BSIM3v32qg); + *(ckt->CKTstate1 + here->BSIM3v32qd) = + *(ckt->CKTstate0 + here->BSIM3v32qd); + if (here->BSIM3v32nqsMod) + { *(ckt->CKTstate1 + here->BSIM3v32qcheq) = + *(ckt->CKTstate0 + here->BSIM3v32qcheq); + *(ckt->CKTstate1 + here->BSIM3v32qcdump) = + *(ckt->CKTstate0 + here->BSIM3v32qcdump); + } + } + + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v32qb); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v32qg); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v32qd); + if (error) + return(error); + if (here->BSIM3v32nqsMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v32qcdump); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v32qcheq); + if (error) + return(error); + } + + goto line860; + +line850: + /* initialize to zero charge conductance and current */ + ceqqg = ceqqb = ceqqd = 0.0; + cqcheq = cqdef = 0.0; + + gcdgb = gcddb = gcdsb = 0.0; + gcsgb = gcsdb = gcssb = 0.0; + gcggb = gcgdb = gcgsb = 0.0; + gcbgb = gcbdb = gcbsb = 0.0; + + gqdef = gcqgb = gcqdb = gcqsb = gcqbb = 0.0; + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = (1.0 - (dxpart = (here->BSIM3v32mode > 0) ? 0.4 : 0.6)); + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + + if (here->BSIM3v32nqsMod) + here->BSIM3v32gtau = 16.0 * pParam->BSIM3v32u0temp * model->BSIM3v32vtm + / pParam->BSIM3v32leffCV / pParam->BSIM3v32leffCV + * ScalingFactor; + else + here->BSIM3v32gtau = 0.0; + + goto line900; + +line860: + /* evaluate equivalent charge current */ + + cqgate = *(ckt->CKTstate0 + here->BSIM3v32cqg); + cqbulk = *(ckt->CKTstate0 + here->BSIM3v32cqb); + cqdrn = *(ckt->CKTstate0 + here->BSIM3v32cqd); + + ceqqg = cqgate - gcggb * vgb + gcgdb * vbd + gcgsb * vbs; + ceqqb = cqbulk - gcbgb * vgb + gcbdb * vbd + gcbsb * vbs; + ceqqd = cqdrn - gcdgb * vgb + gcddb * vbd + gcdsb * vbs; + + if (here->BSIM3v32nqsMod) + { T0 = ggtg * vgb - ggtd * vbd - ggts * vbs; + ceqqg += T0; + T1 = qdef * here->BSIM3v32gtau; + ceqqd -= dxpart * T0 + T1 * (ddxpart_dVg * vgb - ddxpart_dVd + * vbd - ddxpart_dVs * vbs); + cqdef = *(ckt->CKTstate0 + here->BSIM3v32cqcdump) - gqdef * qdef; + cqcheq = *(ckt->CKTstate0 + here->BSIM3v32cqcheq) + - (gcqgb * vgb - gcqdb * vbd - gcqsb * vbs) + T0; + } + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM3v32cqb) = + *(ckt->CKTstate0 + here->BSIM3v32cqb); + *(ckt->CKTstate1 + here->BSIM3v32cqg) = + *(ckt->CKTstate0 + here->BSIM3v32cqg); + *(ckt->CKTstate1 + here->BSIM3v32cqd) = + *(ckt->CKTstate0 + here->BSIM3v32cqd); + + if (here->BSIM3v32nqsMod) + { *(ckt->CKTstate1 + here->BSIM3v32cqcheq) = + *(ckt->CKTstate0 + here->BSIM3v32cqcheq); + *(ckt->CKTstate1 + here->BSIM3v32cqcdump) = + *(ckt->CKTstate0 + here->BSIM3v32cqcdump); + } + } + + /* + * load current vector + */ +line900: + + if (here->BSIM3v32mode >= 0) + { Gm = here->BSIM3v32gm; + Gmbs = here->BSIM3v32gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + cdreq = model->BSIM3v32type * (cdrain - here->BSIM3v32gds * vds + - Gm * vgs - Gmbs * vbs); + + ceqbd = -model->BSIM3v32type * (here->BSIM3v32csub + - here->BSIM3v32gbds * vds - here->BSIM3v32gbgs * vgs + - here->BSIM3v32gbbs * vbs); + ceqbs = 0.0; + + gbbdp = -here->BSIM3v32gbds; + gbbsp = (here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs); + + gbdpg = here->BSIM3v32gbgs; + gbdpdp = here->BSIM3v32gbds; + gbdpb = here->BSIM3v32gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspg = 0.0; + gbspdp = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + } + else + { Gm = -here->BSIM3v32gm; + Gmbs = -here->BSIM3v32gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + cdreq = -model->BSIM3v32type * (cdrain + here->BSIM3v32gds * vds + + Gm * vgd + Gmbs * vbd); + + ceqbs = -model->BSIM3v32type * (here->BSIM3v32csub + + here->BSIM3v32gbds * vds - here->BSIM3v32gbgs * vgd + - here->BSIM3v32gbbs * vbd); + ceqbd = 0.0; + + gbbsp = -here->BSIM3v32gbds; + gbbdp = (here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs); + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM3v32gbgs; + gbspsp = here->BSIM3v32gbds; + gbspb = here->BSIM3v32gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + } + + if (model->BSIM3v32type > 0) + { ceqbs += (here->BSIM3v32cbs - here->BSIM3v32gbs * vbs); + ceqbd += (here->BSIM3v32cbd - here->BSIM3v32gbd * vbd); + /* + ceqqg = ceqqg; + ceqqb = ceqqb; + ceqqd = ceqqd; + cqdef = cqdef; + cqcheq = cqcheq; + */ + } + else + { ceqbs -= (here->BSIM3v32cbs - here->BSIM3v32gbs * vbs); + ceqbd -= (here->BSIM3v32cbd - here->BSIM3v32gbd * vbd); + ceqqg = -ceqqg; + ceqqb = -ceqqb; + ceqqd = -ceqqd; + cqdef = -cqdef; + cqcheq = -cqcheq; + } + + m = here->BSIM3v32m; + + (*(ckt->CKTrhs + here->BSIM3v32gNode) -= m * ceqqg); + (*(ckt->CKTrhs + here->BSIM3v32bNode) -= m * (ceqbs + ceqbd + ceqqb)); + (*(ckt->CKTrhs + here->BSIM3v32dNodePrime) += m * (ceqbd - cdreq - ceqqd)); + (*(ckt->CKTrhs + here->BSIM3v32sNodePrime) += m * (cdreq + ceqbs + ceqqg + + ceqqb + ceqqd)); + if (here->BSIM3v32nqsMod) + *(ckt->CKTrhs + here->BSIM3v32qNode) += m * (cqcheq - cqdef); + + /* + * load y matrix + */ + + T1 = qdef * here->BSIM3v32gtau; + (*(here->BSIM3v32DdPtr) += m * here->BSIM3v32drainConductance); + (*(here->BSIM3v32GgPtr) += m * (gcggb - ggtg)); + (*(here->BSIM3v32SsPtr) += m * here->BSIM3v32sourceConductance); + (*(here->BSIM3v32BbPtr) += m * (here->BSIM3v32gbd + here->BSIM3v32gbs + - gcbgb - gcbdb - gcbsb - here->BSIM3v32gbbs)); + (*(here->BSIM3v32DPdpPtr) += m * (here->BSIM3v32drainConductance + + here->BSIM3v32gds + here->BSIM3v32gbd + + RevSum + gcddb + dxpart * ggtd + + T1 * ddxpart_dVd + gbdpdp)); + (*(here->BSIM3v32SPspPtr) += m * (here->BSIM3v32sourceConductance + + here->BSIM3v32gds + here->BSIM3v32gbs + + FwdSum + gcssb + sxpart * ggts + + T1 * dsxpart_dVs + gbspsp)); + (*(here->BSIM3v32DdpPtr) -= m * here->BSIM3v32drainConductance); + (*(here->BSIM3v32GbPtr) -= m * (gcggb + gcgdb + gcgsb + ggtb)); + (*(here->BSIM3v32GdpPtr) += m * (gcgdb - ggtd)); + (*(here->BSIM3v32GspPtr) += m * (gcgsb - ggts)); + (*(here->BSIM3v32SspPtr) -= m * here->BSIM3v32sourceConductance); + (*(here->BSIM3v32BgPtr) += m * (gcbgb - here->BSIM3v32gbgs)); + (*(here->BSIM3v32BdpPtr) += m * (gcbdb - here->BSIM3v32gbd + gbbdp)); + (*(here->BSIM3v32BspPtr) += m * (gcbsb - here->BSIM3v32gbs + gbbsp)); + (*(here->BSIM3v32DPdPtr) -= m * here->BSIM3v32drainConductance); + (*(here->BSIM3v32DPgPtr) += m * (Gm + gcdgb + dxpart * ggtg + + T1 * ddxpart_dVg + gbdpg)); + (*(here->BSIM3v32DPbPtr) -= m * (here->BSIM3v32gbd - Gmbs + gcdgb + gcddb + + gcdsb - dxpart * ggtb + - T1 * ddxpart_dVb - gbdpb)); + (*(here->BSIM3v32DPspPtr) -= m * (here->BSIM3v32gds + FwdSum - gcdsb + - dxpart * ggts - T1 * ddxpart_dVs - gbdpsp)); + (*(here->BSIM3v32SPgPtr) += m * (gcsgb - Gm + sxpart * ggtg + + T1 * dsxpart_dVg + gbspg)); + (*(here->BSIM3v32SPsPtr) -= m * here->BSIM3v32sourceConductance); + (*(here->BSIM3v32SPbPtr) -= m * (here->BSIM3v32gbs + Gmbs + gcsgb + gcsdb + + gcssb - sxpart * ggtb + - T1 * dsxpart_dVb - gbspb)); + (*(here->BSIM3v32SPdpPtr) -= m * (here->BSIM3v32gds + RevSum - gcsdb + - sxpart * ggtd - T1 * dsxpart_dVd - gbspdp)); + + if (here->BSIM3v32nqsMod) + { + *(here->BSIM3v32QqPtr) += m * (gqdef + here->BSIM3v32gtau); + + *(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau); + *(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau); + *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; + + *(here->BSIM3v32QgPtr) += m * (ggtg - gcqgb); + *(here->BSIM3v32QdpPtr) += m * (ggtd - gcqdb); + *(here->BSIM3v32QspPtr) += m * (ggts - gcqsb); + *(here->BSIM3v32QbPtr) += m * (ggtb - gcqbb); + } + +line1000: ; + + } /* End of Mosfet Instance */ +} /* End of Model Instance */ + +return(OK); +} + diff --git a/src/spicelib/devices/bsim3v32/b3v32mask.c b/src/spicelib/devices/bsim3v32/b3v32mask.c new file mode 100644 index 000000000..43292b485 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32mask.c @@ -0,0 +1,1269 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3mask.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) +{ + BSIM3v32model *model = (BSIM3v32model *)inst; + switch(which) + { case BSIM3v32_MOD_MOBMOD: + value->iValue = model->BSIM3v32mobMod; + return(OK); + case BSIM3v32_MOD_PARAMCHK: + value->iValue = model->BSIM3v32paramChk; + return(OK); + case BSIM3v32_MOD_BINUNIT: + value->iValue = model->BSIM3v32binUnit; + return(OK); + case BSIM3v32_MOD_CAPMOD: + value->iValue = model->BSIM3v32capMod; + return(OK); + case BSIM3v32_MOD_NOIMOD: + value->iValue = model->BSIM3v32noiMod; + return(OK); + case BSIM3v32_MOD_ACMMOD: + value->iValue = model->BSIM3v32acmMod; + return(OK); + case BSIM3v32_MOD_VERSION : + value->sValue = model->BSIM3v32version; + return(OK); + case BSIM3v32_MOD_TOX : + value->rValue = model->BSIM3v32tox; + return(OK); + case BSIM3v32_MOD_TOXM : + value->rValue = model->BSIM3v32toxm; + return(OK); + case BSIM3v32_MOD_CDSC : + value->rValue = model->BSIM3v32cdsc; + return(OK); + case BSIM3v32_MOD_CDSCB : + value->rValue = model->BSIM3v32cdscb; + return(OK); + + case BSIM3v32_MOD_CDSCD : + value->rValue = model->BSIM3v32cdscd; + return(OK); + + case BSIM3v32_MOD_CIT : + value->rValue = model->BSIM3v32cit; + return(OK); + case BSIM3v32_MOD_NFACTOR : + value->rValue = model->BSIM3v32nfactor; + return(OK); + case BSIM3v32_MOD_XJ: + value->rValue = model->BSIM3v32xj; + return(OK); + case BSIM3v32_MOD_VSAT: + value->rValue = model->BSIM3v32vsat; + return(OK); + case BSIM3v32_MOD_AT: + value->rValue = model->BSIM3v32at; + return(OK); + case BSIM3v32_MOD_A0: + value->rValue = model->BSIM3v32a0; + return(OK); + + case BSIM3v32_MOD_AGS: + value->rValue = model->BSIM3v32ags; + return(OK); + + case BSIM3v32_MOD_A1: + value->rValue = model->BSIM3v32a1; + return(OK); + case BSIM3v32_MOD_A2: + value->rValue = model->BSIM3v32a2; + return(OK); + case BSIM3v32_MOD_KETA: + value->rValue = model->BSIM3v32keta; + return(OK); + case BSIM3v32_MOD_NSUB: + value->rValue = model->BSIM3v32nsub; + return(OK); + case BSIM3v32_MOD_NPEAK: + value->rValue = model->BSIM3v32npeak; + return(OK); + case BSIM3v32_MOD_NGATE: + value->rValue = model->BSIM3v32ngate; + return(OK); + case BSIM3v32_MOD_GAMMA1: + value->rValue = model->BSIM3v32gamma1; + return(OK); + case BSIM3v32_MOD_GAMMA2: + value->rValue = model->BSIM3v32gamma2; + return(OK); + case BSIM3v32_MOD_VBX: + value->rValue = model->BSIM3v32vbx; + return(OK); + case BSIM3v32_MOD_VBM: + value->rValue = model->BSIM3v32vbm; + return(OK); + case BSIM3v32_MOD_XT: + value->rValue = model->BSIM3v32xt; + return(OK); + case BSIM3v32_MOD_K1: + value->rValue = model->BSIM3v32k1; + return(OK); + case BSIM3v32_MOD_KT1: + value->rValue = model->BSIM3v32kt1; + return(OK); + case BSIM3v32_MOD_KT1L: + value->rValue = model->BSIM3v32kt1l; + return(OK); + case BSIM3v32_MOD_KT2 : + value->rValue = model->BSIM3v32kt2; + return(OK); + case BSIM3v32_MOD_K2 : + value->rValue = model->BSIM3v32k2; + return(OK); + case BSIM3v32_MOD_K3: + value->rValue = model->BSIM3v32k3; + return(OK); + case BSIM3v32_MOD_K3B: + value->rValue = model->BSIM3v32k3b; + return(OK); + case BSIM3v32_MOD_W0: + value->rValue = model->BSIM3v32w0; + return(OK); + case BSIM3v32_MOD_NLX: + value->rValue = model->BSIM3v32nlx; + return(OK); + case BSIM3v32_MOD_DVT0 : + value->rValue = model->BSIM3v32dvt0; + return(OK); + case BSIM3v32_MOD_DVT1 : + value->rValue = model->BSIM3v32dvt1; + return(OK); + case BSIM3v32_MOD_DVT2 : + value->rValue = model->BSIM3v32dvt2; + return(OK); + case BSIM3v32_MOD_DVT0W : + value->rValue = model->BSIM3v32dvt0w; + return(OK); + case BSIM3v32_MOD_DVT1W : + value->rValue = model->BSIM3v32dvt1w; + return(OK); + case BSIM3v32_MOD_DVT2W : + value->rValue = model->BSIM3v32dvt2w; + return(OK); + case BSIM3v32_MOD_DROUT : + value->rValue = model->BSIM3v32drout; + return(OK); + case BSIM3v32_MOD_DSUB : + value->rValue = model->BSIM3v32dsub; + return(OK); + case BSIM3v32_MOD_VTH0: + value->rValue = model->BSIM3v32vth0; + return(OK); + case BSIM3v32_MOD_UA: + value->rValue = model->BSIM3v32ua; + return(OK); + case BSIM3v32_MOD_UA1: + value->rValue = model->BSIM3v32ua1; + return(OK); + case BSIM3v32_MOD_UB: + value->rValue = model->BSIM3v32ub; + return(OK); + case BSIM3v32_MOD_UB1: + value->rValue = model->BSIM3v32ub1; + return(OK); + case BSIM3v32_MOD_UC: + value->rValue = model->BSIM3v32uc; + return(OK); + case BSIM3v32_MOD_UC1: + value->rValue = model->BSIM3v32uc1; + return(OK); + case BSIM3v32_MOD_U0: + value->rValue = model->BSIM3v32u0; + return(OK); + case BSIM3v32_MOD_UTE: + value->rValue = model->BSIM3v32ute; + return(OK); + case BSIM3v32_MOD_VOFF: + value->rValue = model->BSIM3v32voff; + return(OK); + case BSIM3v32_MOD_DELTA: + value->rValue = model->BSIM3v32delta; + return(OK); + case BSIM3v32_MOD_RDSW: + value->rValue = model->BSIM3v32rdsw; + return(OK); + case BSIM3v32_MOD_PRWG: + value->rValue = model->BSIM3v32prwg; + return(OK); + case BSIM3v32_MOD_PRWB: + value->rValue = model->BSIM3v32prwb; + return(OK); + case BSIM3v32_MOD_PRT: + value->rValue = model->BSIM3v32prt; + return(OK); + case BSIM3v32_MOD_ETA0: + value->rValue = model->BSIM3v32eta0; + return(OK); + case BSIM3v32_MOD_ETAB: + value->rValue = model->BSIM3v32etab; + return(OK); + case BSIM3v32_MOD_PCLM: + value->rValue = model->BSIM3v32pclm; + return(OK); + case BSIM3v32_MOD_PDIBL1: + value->rValue = model->BSIM3v32pdibl1; + return(OK); + case BSIM3v32_MOD_PDIBL2: + value->rValue = model->BSIM3v32pdibl2; + return(OK); + case BSIM3v32_MOD_PDIBLB: + value->rValue = model->BSIM3v32pdiblb; + return(OK); + case BSIM3v32_MOD_PSCBE1: + value->rValue = model->BSIM3v32pscbe1; + return(OK); + case BSIM3v32_MOD_PSCBE2: + value->rValue = model->BSIM3v32pscbe2; + return(OK); + case BSIM3v32_MOD_PVAG: + value->rValue = model->BSIM3v32pvag; + return(OK); + case BSIM3v32_MOD_WR: + value->rValue = model->BSIM3v32wr; + return(OK); + case BSIM3v32_MOD_DWG: + value->rValue = model->BSIM3v32dwg; + return(OK); + case BSIM3v32_MOD_DWB: + value->rValue = model->BSIM3v32dwb; + return(OK); + case BSIM3v32_MOD_B0: + value->rValue = model->BSIM3v32b0; + return(OK); + case BSIM3v32_MOD_B1: + value->rValue = model->BSIM3v32b1; + return(OK); + case BSIM3v32_MOD_ALPHA0: + value->rValue = model->BSIM3v32alpha0; + return(OK); + case BSIM3v32_MOD_ALPHA1: + value->rValue = model->BSIM3v32alpha1; + return(OK); + case BSIM3v32_MOD_BETA0: + value->rValue = model->BSIM3v32beta0; + return(OK); + case BSIM3v32_MOD_IJTH: + value->rValue = model->BSIM3v32ijth; + return(OK); + case BSIM3v32_MOD_VFB: + value->rValue = model->BSIM3v32vfb; + return(OK); + + case BSIM3v32_MOD_ELM: + value->rValue = model->BSIM3v32elm; + return(OK); + case BSIM3v32_MOD_CGSL: + value->rValue = model->BSIM3v32cgsl; + return(OK); + case BSIM3v32_MOD_CGDL: + value->rValue = model->BSIM3v32cgdl; + return(OK); + case BSIM3v32_MOD_CKAPPA: + value->rValue = model->BSIM3v32ckappa; + return(OK); + case BSIM3v32_MOD_CF: + value->rValue = model->BSIM3v32cf; + return(OK); + case BSIM3v32_MOD_CLC: + value->rValue = model->BSIM3v32clc; + return(OK); + case BSIM3v32_MOD_CLE: + value->rValue = model->BSIM3v32cle; + return(OK); + case BSIM3v32_MOD_DWC: + value->rValue = model->BSIM3v32dwc; + return(OK); + case BSIM3v32_MOD_DLC: + value->rValue = model->BSIM3v32dlc; + return(OK); + case BSIM3v32_MOD_VFBCV: + value->rValue = model->BSIM3v32vfbcv; + return(OK); + case BSIM3v32_MOD_ACDE: + value->rValue = model->BSIM3v32acde; + return(OK); + case BSIM3v32_MOD_MOIN: + value->rValue = model->BSIM3v32moin; + return(OK); + case BSIM3v32_MOD_NOFF: + value->rValue = model->BSIM3v32noff; + return(OK); + case BSIM3v32_MOD_VOFFCV: + value->rValue = model->BSIM3v32voffcv; + return(OK); + case BSIM3v32_MOD_TCJ: + value->rValue = model->BSIM3v32tcj; + return(OK); + case BSIM3v32_MOD_TPB: + value->rValue = model->BSIM3v32tpb; + return(OK); + case BSIM3v32_MOD_TCJSW: + value->rValue = model->BSIM3v32tcjsw; + return(OK); + case BSIM3v32_MOD_TPBSW: + value->rValue = model->BSIM3v32tpbsw; + return(OK); + case BSIM3v32_MOD_TCJSWG: + value->rValue = model->BSIM3v32tcjswg; + return(OK); + case BSIM3v32_MOD_TPBSWG: + value->rValue = model->BSIM3v32tpbswg; + return(OK); + + /* acm model */ + case BSIM3v32_MOD_HDIF: + value->rValue = model->BSIM3v32hdif; + return(OK); + case BSIM3v32_MOD_LDIF: + value->rValue = model->BSIM3v32ldif; + return(OK); + case BSIM3v32_MOD_LD: + value->rValue = model->BSIM3v32ld; + return(OK); + case BSIM3v32_MOD_RD: + value->rValue = model->BSIM3v32rd; + return(OK); + case BSIM3v32_MOD_RS: + value->rValue = model->BSIM3v32rs; + return(OK); + case BSIM3v32_MOD_RDC: + value->rValue = model->BSIM3v32rdc; + return(OK); + case BSIM3v32_MOD_RSC: + value->rValue = model->BSIM3v32rsc; + return(OK); + + /* Length dependence */ + case BSIM3v32_MOD_LCDSC : + value->rValue = model->BSIM3v32lcdsc; + return(OK); + case BSIM3v32_MOD_LCDSCB : + value->rValue = model->BSIM3v32lcdscb; + return(OK); + case BSIM3v32_MOD_LCDSCD : + value->rValue = model->BSIM3v32lcdscd; + return(OK); + case BSIM3v32_MOD_LCIT : + value->rValue = model->BSIM3v32lcit; + return(OK); + case BSIM3v32_MOD_LNFACTOR : + value->rValue = model->BSIM3v32lnfactor; + return(OK); + case BSIM3v32_MOD_LXJ: + value->rValue = model->BSIM3v32lxj; + return(OK); + case BSIM3v32_MOD_LVSAT: + value->rValue = model->BSIM3v32lvsat; + return(OK); + case BSIM3v32_MOD_LAT: + value->rValue = model->BSIM3v32lat; + return(OK); + case BSIM3v32_MOD_LA0: + value->rValue = model->BSIM3v32la0; + return(OK); + case BSIM3v32_MOD_LAGS: + value->rValue = model->BSIM3v32lags; + return(OK); + case BSIM3v32_MOD_LA1: + value->rValue = model->BSIM3v32la1; + return(OK); + case BSIM3v32_MOD_LA2: + value->rValue = model->BSIM3v32la2; + return(OK); + case BSIM3v32_MOD_LKETA: + value->rValue = model->BSIM3v32lketa; + return(OK); + case BSIM3v32_MOD_LNSUB: + value->rValue = model->BSIM3v32lnsub; + return(OK); + case BSIM3v32_MOD_LNPEAK: + value->rValue = model->BSIM3v32lnpeak; + return(OK); + case BSIM3v32_MOD_LNGATE: + value->rValue = model->BSIM3v32lngate; + return(OK); + case BSIM3v32_MOD_LGAMMA1: + value->rValue = model->BSIM3v32lgamma1; + return(OK); + case BSIM3v32_MOD_LGAMMA2: + value->rValue = model->BSIM3v32lgamma2; + return(OK); + case BSIM3v32_MOD_LVBX: + value->rValue = model->BSIM3v32lvbx; + return(OK); + case BSIM3v32_MOD_LVBM: + value->rValue = model->BSIM3v32lvbm; + return(OK); + case BSIM3v32_MOD_LXT: + value->rValue = model->BSIM3v32lxt; + return(OK); + case BSIM3v32_MOD_LK1: + value->rValue = model->BSIM3v32lk1; + return(OK); + case BSIM3v32_MOD_LKT1: + value->rValue = model->BSIM3v32lkt1; + return(OK); + case BSIM3v32_MOD_LKT1L: + value->rValue = model->BSIM3v32lkt1l; + return(OK); + case BSIM3v32_MOD_LKT2 : + value->rValue = model->BSIM3v32lkt2; + return(OK); + case BSIM3v32_MOD_LK2 : + value->rValue = model->BSIM3v32lk2; + return(OK); + case BSIM3v32_MOD_LK3: + value->rValue = model->BSIM3v32lk3; + return(OK); + case BSIM3v32_MOD_LK3B: + value->rValue = model->BSIM3v32lk3b; + return(OK); + case BSIM3v32_MOD_LW0: + value->rValue = model->BSIM3v32lw0; + return(OK); + case BSIM3v32_MOD_LNLX: + value->rValue = model->BSIM3v32lnlx; + return(OK); + case BSIM3v32_MOD_LDVT0: + value->rValue = model->BSIM3v32ldvt0; + return(OK); + case BSIM3v32_MOD_LDVT1 : + value->rValue = model->BSIM3v32ldvt1; + return(OK); + case BSIM3v32_MOD_LDVT2 : + value->rValue = model->BSIM3v32ldvt2; + return(OK); + case BSIM3v32_MOD_LDVT0W : + value->rValue = model->BSIM3v32ldvt0w; + return(OK); + case BSIM3v32_MOD_LDVT1W : + value->rValue = model->BSIM3v32ldvt1w; + return(OK); + case BSIM3v32_MOD_LDVT2W : + value->rValue = model->BSIM3v32ldvt2w; + return(OK); + case BSIM3v32_MOD_LDROUT : + value->rValue = model->BSIM3v32ldrout; + return(OK); + case BSIM3v32_MOD_LDSUB : + value->rValue = model->BSIM3v32ldsub; + return(OK); + case BSIM3v32_MOD_LVTH0: + value->rValue = model->BSIM3v32lvth0; + return(OK); + case BSIM3v32_MOD_LUA: + value->rValue = model->BSIM3v32lua; + return(OK); + case BSIM3v32_MOD_LUA1: + value->rValue = model->BSIM3v32lua1; + return(OK); + case BSIM3v32_MOD_LUB: + value->rValue = model->BSIM3v32lub; + return(OK); + case BSIM3v32_MOD_LUB1: + value->rValue = model->BSIM3v32lub1; + return(OK); + case BSIM3v32_MOD_LUC: + value->rValue = model->BSIM3v32luc; + return(OK); + case BSIM3v32_MOD_LUC1: + value->rValue = model->BSIM3v32luc1; + return(OK); + case BSIM3v32_MOD_LU0: + value->rValue = model->BSIM3v32lu0; + return(OK); + case BSIM3v32_MOD_LUTE: + value->rValue = model->BSIM3v32lute; + return(OK); + case BSIM3v32_MOD_LVOFF: + value->rValue = model->BSIM3v32lvoff; + return(OK); + case BSIM3v32_MOD_LDELTA: + value->rValue = model->BSIM3v32ldelta; + return(OK); + case BSIM3v32_MOD_LRDSW: + value->rValue = model->BSIM3v32lrdsw; + return(OK); + case BSIM3v32_MOD_LPRWB: + value->rValue = model->BSIM3v32lprwb; + return(OK); + case BSIM3v32_MOD_LPRWG: + value->rValue = model->BSIM3v32lprwg; + return(OK); + case BSIM3v32_MOD_LPRT: + value->rValue = model->BSIM3v32lprt; + return(OK); + case BSIM3v32_MOD_LETA0: + value->rValue = model->BSIM3v32leta0; + return(OK); + case BSIM3v32_MOD_LETAB: + value->rValue = model->BSIM3v32letab; + return(OK); + case BSIM3v32_MOD_LPCLM: + value->rValue = model->BSIM3v32lpclm; + return(OK); + case BSIM3v32_MOD_LPDIBL1: + value->rValue = model->BSIM3v32lpdibl1; + return(OK); + case BSIM3v32_MOD_LPDIBL2: + value->rValue = model->BSIM3v32lpdibl2; + return(OK); + case BSIM3v32_MOD_LPDIBLB: + value->rValue = model->BSIM3v32lpdiblb; + return(OK); + case BSIM3v32_MOD_LPSCBE1: + value->rValue = model->BSIM3v32lpscbe1; + return(OK); + case BSIM3v32_MOD_LPSCBE2: + value->rValue = model->BSIM3v32lpscbe2; + return(OK); + case BSIM3v32_MOD_LPVAG: + value->rValue = model->BSIM3v32lpvag; + return(OK); + case BSIM3v32_MOD_LWR: + value->rValue = model->BSIM3v32lwr; + return(OK); + case BSIM3v32_MOD_LDWG: + value->rValue = model->BSIM3v32ldwg; + return(OK); + case BSIM3v32_MOD_LDWB: + value->rValue = model->BSIM3v32ldwb; + return(OK); + case BSIM3v32_MOD_LB0: + value->rValue = model->BSIM3v32lb0; + return(OK); + case BSIM3v32_MOD_LB1: + value->rValue = model->BSIM3v32lb1; + return(OK); + case BSIM3v32_MOD_LALPHA0: + value->rValue = model->BSIM3v32lalpha0; + return(OK); + case BSIM3v32_MOD_LALPHA1: + value->rValue = model->BSIM3v32lalpha1; + return(OK); + case BSIM3v32_MOD_LBETA0: + value->rValue = model->BSIM3v32lbeta0; + return(OK); + case BSIM3v32_MOD_LVFB: + value->rValue = model->BSIM3v32lvfb; + return(OK); + + case BSIM3v32_MOD_LELM: + value->rValue = model->BSIM3v32lelm; + return(OK); + case BSIM3v32_MOD_LCGSL: + value->rValue = model->BSIM3v32lcgsl; + return(OK); + case BSIM3v32_MOD_LCGDL: + value->rValue = model->BSIM3v32lcgdl; + return(OK); + case BSIM3v32_MOD_LCKAPPA: + value->rValue = model->BSIM3v32lckappa; + return(OK); + case BSIM3v32_MOD_LCF: + value->rValue = model->BSIM3v32lcf; + return(OK); + case BSIM3v32_MOD_LCLC: + value->rValue = model->BSIM3v32lclc; + return(OK); + case BSIM3v32_MOD_LCLE: + value->rValue = model->BSIM3v32lcle; + return(OK); + case BSIM3v32_MOD_LVFBCV: + value->rValue = model->BSIM3v32lvfbcv; + return(OK); + case BSIM3v32_MOD_LACDE: + value->rValue = model->BSIM3v32lacde; + return(OK); + case BSIM3v32_MOD_LMOIN: + value->rValue = model->BSIM3v32lmoin; + return(OK); + case BSIM3v32_MOD_LNOFF: + value->rValue = model->BSIM3v32lnoff; + return(OK); + case BSIM3v32_MOD_LVOFFCV: + value->rValue = model->BSIM3v32lvoffcv; + return(OK); + + /* Width dependence */ + case BSIM3v32_MOD_WCDSC : + value->rValue = model->BSIM3v32wcdsc; + return(OK); + case BSIM3v32_MOD_WCDSCB : + value->rValue = model->BSIM3v32wcdscb; + return(OK); + case BSIM3v32_MOD_WCDSCD : + value->rValue = model->BSIM3v32wcdscd; + return(OK); + case BSIM3v32_MOD_WCIT : + value->rValue = model->BSIM3v32wcit; + return(OK); + case BSIM3v32_MOD_WNFACTOR : + value->rValue = model->BSIM3v32wnfactor; + return(OK); + case BSIM3v32_MOD_WXJ: + value->rValue = model->BSIM3v32wxj; + return(OK); + case BSIM3v32_MOD_WVSAT: + value->rValue = model->BSIM3v32wvsat; + return(OK); + case BSIM3v32_MOD_WAT: + value->rValue = model->BSIM3v32wat; + return(OK); + case BSIM3v32_MOD_WA0: + value->rValue = model->BSIM3v32wa0; + return(OK); + case BSIM3v32_MOD_WAGS: + value->rValue = model->BSIM3v32wags; + return(OK); + case BSIM3v32_MOD_WA1: + value->rValue = model->BSIM3v32wa1; + return(OK); + case BSIM3v32_MOD_WA2: + value->rValue = model->BSIM3v32wa2; + return(OK); + case BSIM3v32_MOD_WKETA: + value->rValue = model->BSIM3v32wketa; + return(OK); + case BSIM3v32_MOD_WNSUB: + value->rValue = model->BSIM3v32wnsub; + return(OK); + case BSIM3v32_MOD_WNPEAK: + value->rValue = model->BSIM3v32wnpeak; + return(OK); + case BSIM3v32_MOD_WNGATE: + value->rValue = model->BSIM3v32wngate; + return(OK); + case BSIM3v32_MOD_WGAMMA1: + value->rValue = model->BSIM3v32wgamma1; + return(OK); + case BSIM3v32_MOD_WGAMMA2: + value->rValue = model->BSIM3v32wgamma2; + return(OK); + case BSIM3v32_MOD_WVBX: + value->rValue = model->BSIM3v32wvbx; + return(OK); + case BSIM3v32_MOD_WVBM: + value->rValue = model->BSIM3v32wvbm; + return(OK); + case BSIM3v32_MOD_WXT: + value->rValue = model->BSIM3v32wxt; + return(OK); + case BSIM3v32_MOD_WK1: + value->rValue = model->BSIM3v32wk1; + return(OK); + case BSIM3v32_MOD_WKT1: + value->rValue = model->BSIM3v32wkt1; + return(OK); + case BSIM3v32_MOD_WKT1L: + value->rValue = model->BSIM3v32wkt1l; + return(OK); + case BSIM3v32_MOD_WKT2 : + value->rValue = model->BSIM3v32wkt2; + return(OK); + case BSIM3v32_MOD_WK2 : + value->rValue = model->BSIM3v32wk2; + return(OK); + case BSIM3v32_MOD_WK3: + value->rValue = model->BSIM3v32wk3; + return(OK); + case BSIM3v32_MOD_WK3B: + value->rValue = model->BSIM3v32wk3b; + return(OK); + case BSIM3v32_MOD_WW0: + value->rValue = model->BSIM3v32ww0; + return(OK); + case BSIM3v32_MOD_WNLX: + value->rValue = model->BSIM3v32wnlx; + return(OK); + case BSIM3v32_MOD_WDVT0: + value->rValue = model->BSIM3v32wdvt0; + return(OK); + case BSIM3v32_MOD_WDVT1 : + value->rValue = model->BSIM3v32wdvt1; + return(OK); + case BSIM3v32_MOD_WDVT2 : + value->rValue = model->BSIM3v32wdvt2; + return(OK); + case BSIM3v32_MOD_WDVT0W : + value->rValue = model->BSIM3v32wdvt0w; + return(OK); + case BSIM3v32_MOD_WDVT1W : + value->rValue = model->BSIM3v32wdvt1w; + return(OK); + case BSIM3v32_MOD_WDVT2W : + value->rValue = model->BSIM3v32wdvt2w; + return(OK); + case BSIM3v32_MOD_WDROUT : + value->rValue = model->BSIM3v32wdrout; + return(OK); + case BSIM3v32_MOD_WDSUB : + value->rValue = model->BSIM3v32wdsub; + return(OK); + case BSIM3v32_MOD_WVTH0: + value->rValue = model->BSIM3v32wvth0; + return(OK); + case BSIM3v32_MOD_WUA: + value->rValue = model->BSIM3v32wua; + return(OK); + case BSIM3v32_MOD_WUA1: + value->rValue = model->BSIM3v32wua1; + return(OK); + case BSIM3v32_MOD_WUB: + value->rValue = model->BSIM3v32wub; + return(OK); + case BSIM3v32_MOD_WUB1: + value->rValue = model->BSIM3v32wub1; + return(OK); + case BSIM3v32_MOD_WUC: + value->rValue = model->BSIM3v32wuc; + return(OK); + case BSIM3v32_MOD_WUC1: + value->rValue = model->BSIM3v32wuc1; + return(OK); + case BSIM3v32_MOD_WU0: + value->rValue = model->BSIM3v32wu0; + return(OK); + case BSIM3v32_MOD_WUTE: + value->rValue = model->BSIM3v32wute; + return(OK); + case BSIM3v32_MOD_WVOFF: + value->rValue = model->BSIM3v32wvoff; + return(OK); + case BSIM3v32_MOD_WDELTA: + value->rValue = model->BSIM3v32wdelta; + return(OK); + case BSIM3v32_MOD_WRDSW: + value->rValue = model->BSIM3v32wrdsw; + return(OK); + case BSIM3v32_MOD_WPRWB: + value->rValue = model->BSIM3v32wprwb; + return(OK); + case BSIM3v32_MOD_WPRWG: + value->rValue = model->BSIM3v32wprwg; + return(OK); + case BSIM3v32_MOD_WPRT: + value->rValue = model->BSIM3v32wprt; + return(OK); + case BSIM3v32_MOD_WETA0: + value->rValue = model->BSIM3v32weta0; + return(OK); + case BSIM3v32_MOD_WETAB: + value->rValue = model->BSIM3v32wetab; + return(OK); + case BSIM3v32_MOD_WPCLM: + value->rValue = model->BSIM3v32wpclm; + return(OK); + case BSIM3v32_MOD_WPDIBL1: + value->rValue = model->BSIM3v32wpdibl1; + return(OK); + case BSIM3v32_MOD_WPDIBL2: + value->rValue = model->BSIM3v32wpdibl2; + return(OK); + case BSIM3v32_MOD_WPDIBLB: + value->rValue = model->BSIM3v32wpdiblb; + return(OK); + case BSIM3v32_MOD_WPSCBE1: + value->rValue = model->BSIM3v32wpscbe1; + return(OK); + case BSIM3v32_MOD_WPSCBE2: + value->rValue = model->BSIM3v32wpscbe2; + return(OK); + case BSIM3v32_MOD_WPVAG: + value->rValue = model->BSIM3v32wpvag; + return(OK); + case BSIM3v32_MOD_WWR: + value->rValue = model->BSIM3v32wwr; + return(OK); + case BSIM3v32_MOD_WDWG: + value->rValue = model->BSIM3v32wdwg; + return(OK); + case BSIM3v32_MOD_WDWB: + value->rValue = model->BSIM3v32wdwb; + return(OK); + case BSIM3v32_MOD_WB0: + value->rValue = model->BSIM3v32wb0; + return(OK); + case BSIM3v32_MOD_WB1: + value->rValue = model->BSIM3v32wb1; + return(OK); + case BSIM3v32_MOD_WALPHA0: + value->rValue = model->BSIM3v32walpha0; + return(OK); + case BSIM3v32_MOD_WALPHA1: + value->rValue = model->BSIM3v32walpha1; + return(OK); + case BSIM3v32_MOD_WBETA0: + value->rValue = model->BSIM3v32wbeta0; + return(OK); + case BSIM3v32_MOD_WVFB: + value->rValue = model->BSIM3v32wvfb; + return(OK); + + case BSIM3v32_MOD_WELM: + value->rValue = model->BSIM3v32welm; + return(OK); + case BSIM3v32_MOD_WCGSL: + value->rValue = model->BSIM3v32wcgsl; + return(OK); + case BSIM3v32_MOD_WCGDL: + value->rValue = model->BSIM3v32wcgdl; + return(OK); + case BSIM3v32_MOD_WCKAPPA: + value->rValue = model->BSIM3v32wckappa; + return(OK); + case BSIM3v32_MOD_WCF: + value->rValue = model->BSIM3v32wcf; + return(OK); + case BSIM3v32_MOD_WCLC: + value->rValue = model->BSIM3v32wclc; + return(OK); + case BSIM3v32_MOD_WCLE: + value->rValue = model->BSIM3v32wcle; + return(OK); + case BSIM3v32_MOD_WVFBCV: + value->rValue = model->BSIM3v32wvfbcv; + return(OK); + case BSIM3v32_MOD_WACDE: + value->rValue = model->BSIM3v32wacde; + return(OK); + case BSIM3v32_MOD_WMOIN: + value->rValue = model->BSIM3v32wmoin; + return(OK); + case BSIM3v32_MOD_WNOFF: + value->rValue = model->BSIM3v32wnoff; + return(OK); + case BSIM3v32_MOD_WVOFFCV: + value->rValue = model->BSIM3v32wvoffcv; + return(OK); + + /* Cross-term dependence */ + case BSIM3v32_MOD_PCDSC : + value->rValue = model->BSIM3v32pcdsc; + return(OK); + case BSIM3v32_MOD_PCDSCB : + value->rValue = model->BSIM3v32pcdscb; + return(OK); + case BSIM3v32_MOD_PCDSCD : + value->rValue = model->BSIM3v32pcdscd; + return(OK); + case BSIM3v32_MOD_PCIT : + value->rValue = model->BSIM3v32pcit; + return(OK); + case BSIM3v32_MOD_PNFACTOR : + value->rValue = model->BSIM3v32pnfactor; + return(OK); + case BSIM3v32_MOD_PXJ: + value->rValue = model->BSIM3v32pxj; + return(OK); + case BSIM3v32_MOD_PVSAT: + value->rValue = model->BSIM3v32pvsat; + return(OK); + case BSIM3v32_MOD_PAT: + value->rValue = model->BSIM3v32pat; + return(OK); + case BSIM3v32_MOD_PA0: + value->rValue = model->BSIM3v32pa0; + return(OK); + case BSIM3v32_MOD_PAGS: + value->rValue = model->BSIM3v32pags; + return(OK); + case BSIM3v32_MOD_PA1: + value->rValue = model->BSIM3v32pa1; + return(OK); + case BSIM3v32_MOD_PA2: + value->rValue = model->BSIM3v32pa2; + return(OK); + case BSIM3v32_MOD_PKETA: + value->rValue = model->BSIM3v32pketa; + return(OK); + case BSIM3v32_MOD_PNSUB: + value->rValue = model->BSIM3v32pnsub; + return(OK); + case BSIM3v32_MOD_PNPEAK: + value->rValue = model->BSIM3v32pnpeak; + return(OK); + case BSIM3v32_MOD_PNGATE: + value->rValue = model->BSIM3v32pngate; + return(OK); + case BSIM3v32_MOD_PGAMMA1: + value->rValue = model->BSIM3v32pgamma1; + return(OK); + case BSIM3v32_MOD_PGAMMA2: + value->rValue = model->BSIM3v32pgamma2; + return(OK); + case BSIM3v32_MOD_PVBX: + value->rValue = model->BSIM3v32pvbx; + return(OK); + case BSIM3v32_MOD_PVBM: + value->rValue = model->BSIM3v32pvbm; + return(OK); + case BSIM3v32_MOD_PXT: + value->rValue = model->BSIM3v32pxt; + return(OK); + case BSIM3v32_MOD_PK1: + value->rValue = model->BSIM3v32pk1; + return(OK); + case BSIM3v32_MOD_PKT1: + value->rValue = model->BSIM3v32pkt1; + return(OK); + case BSIM3v32_MOD_PKT1L: + value->rValue = model->BSIM3v32pkt1l; + return(OK); + case BSIM3v32_MOD_PKT2 : + value->rValue = model->BSIM3v32pkt2; + return(OK); + case BSIM3v32_MOD_PK2 : + value->rValue = model->BSIM3v32pk2; + return(OK); + case BSIM3v32_MOD_PK3: + value->rValue = model->BSIM3v32pk3; + return(OK); + case BSIM3v32_MOD_PK3B: + value->rValue = model->BSIM3v32pk3b; + return(OK); + case BSIM3v32_MOD_PW0: + value->rValue = model->BSIM3v32pw0; + return(OK); + case BSIM3v32_MOD_PNLX: + value->rValue = model->BSIM3v32pnlx; + return(OK); + case BSIM3v32_MOD_PDVT0 : + value->rValue = model->BSIM3v32pdvt0; + return(OK); + case BSIM3v32_MOD_PDVT1 : + value->rValue = model->BSIM3v32pdvt1; + return(OK); + case BSIM3v32_MOD_PDVT2 : + value->rValue = model->BSIM3v32pdvt2; + return(OK); + case BSIM3v32_MOD_PDVT0W : + value->rValue = model->BSIM3v32pdvt0w; + return(OK); + case BSIM3v32_MOD_PDVT1W : + value->rValue = model->BSIM3v32pdvt1w; + return(OK); + case BSIM3v32_MOD_PDVT2W : + value->rValue = model->BSIM3v32pdvt2w; + return(OK); + case BSIM3v32_MOD_PDROUT : + value->rValue = model->BSIM3v32pdrout; + return(OK); + case BSIM3v32_MOD_PDSUB : + value->rValue = model->BSIM3v32pdsub; + return(OK); + case BSIM3v32_MOD_PVTH0: + value->rValue = model->BSIM3v32pvth0; + return(OK); + case BSIM3v32_MOD_PUA: + value->rValue = model->BSIM3v32pua; + return(OK); + case BSIM3v32_MOD_PUA1: + value->rValue = model->BSIM3v32pua1; + return(OK); + case BSIM3v32_MOD_PUB: + value->rValue = model->BSIM3v32pub; + return(OK); + case BSIM3v32_MOD_PUB1: + value->rValue = model->BSIM3v32pub1; + return(OK); + case BSIM3v32_MOD_PUC: + value->rValue = model->BSIM3v32puc; + return(OK); + case BSIM3v32_MOD_PUC1: + value->rValue = model->BSIM3v32puc1; + return(OK); + case BSIM3v32_MOD_PU0: + value->rValue = model->BSIM3v32pu0; + return(OK); + case BSIM3v32_MOD_PUTE: + value->rValue = model->BSIM3v32pute; + return(OK); + case BSIM3v32_MOD_PVOFF: + value->rValue = model->BSIM3v32pvoff; + return(OK); + case BSIM3v32_MOD_PDELTA: + value->rValue = model->BSIM3v32pdelta; + return(OK); + case BSIM3v32_MOD_PRDSW: + value->rValue = model->BSIM3v32prdsw; + return(OK); + case BSIM3v32_MOD_PPRWB: + value->rValue = model->BSIM3v32pprwb; + return(OK); + case BSIM3v32_MOD_PPRWG: + value->rValue = model->BSIM3v32pprwg; + return(OK); + case BSIM3v32_MOD_PPRT: + value->rValue = model->BSIM3v32pprt; + return(OK); + case BSIM3v32_MOD_PETA0: + value->rValue = model->BSIM3v32peta0; + return(OK); + case BSIM3v32_MOD_PETAB: + value->rValue = model->BSIM3v32petab; + return(OK); + case BSIM3v32_MOD_PPCLM: + value->rValue = model->BSIM3v32ppclm; + return(OK); + case BSIM3v32_MOD_PPDIBL1: + value->rValue = model->BSIM3v32ppdibl1; + return(OK); + case BSIM3v32_MOD_PPDIBL2: + value->rValue = model->BSIM3v32ppdibl2; + return(OK); + case BSIM3v32_MOD_PPDIBLB: + value->rValue = model->BSIM3v32ppdiblb; + return(OK); + case BSIM3v32_MOD_PPSCBE1: + value->rValue = model->BSIM3v32ppscbe1; + return(OK); + case BSIM3v32_MOD_PPSCBE2: + value->rValue = model->BSIM3v32ppscbe2; + return(OK); + case BSIM3v32_MOD_PPVAG: + value->rValue = model->BSIM3v32ppvag; + return(OK); + case BSIM3v32_MOD_PWR: + value->rValue = model->BSIM3v32pwr; + return(OK); + case BSIM3v32_MOD_PDWG: + value->rValue = model->BSIM3v32pdwg; + return(OK); + case BSIM3v32_MOD_PDWB: + value->rValue = model->BSIM3v32pdwb; + return(OK); + case BSIM3v32_MOD_PB0: + value->rValue = model->BSIM3v32pb0; + return(OK); + case BSIM3v32_MOD_PB1: + value->rValue = model->BSIM3v32pb1; + return(OK); + case BSIM3v32_MOD_PALPHA0: + value->rValue = model->BSIM3v32palpha0; + return(OK); + case BSIM3v32_MOD_PALPHA1: + value->rValue = model->BSIM3v32palpha1; + return(OK); + case BSIM3v32_MOD_PBETA0: + value->rValue = model->BSIM3v32pbeta0; + return(OK); + case BSIM3v32_MOD_PVFB: + value->rValue = model->BSIM3v32pvfb; + return(OK); + + case BSIM3v32_MOD_PELM: + value->rValue = model->BSIM3v32pelm; + return(OK); + case BSIM3v32_MOD_PCGSL: + value->rValue = model->BSIM3v32pcgsl; + return(OK); + case BSIM3v32_MOD_PCGDL: + value->rValue = model->BSIM3v32pcgdl; + return(OK); + case BSIM3v32_MOD_PCKAPPA: + value->rValue = model->BSIM3v32pckappa; + return(OK); + case BSIM3v32_MOD_PCF: + value->rValue = model->BSIM3v32pcf; + return(OK); + case BSIM3v32_MOD_PCLC: + value->rValue = model->BSIM3v32pclc; + return(OK); + case BSIM3v32_MOD_PCLE: + value->rValue = model->BSIM3v32pcle; + return(OK); + case BSIM3v32_MOD_PVFBCV: + value->rValue = model->BSIM3v32pvfbcv; + return(OK); + case BSIM3v32_MOD_PACDE: + value->rValue = model->BSIM3v32pacde; + return(OK); + case BSIM3v32_MOD_PMOIN: + value->rValue = model->BSIM3v32pmoin; + return(OK); + case BSIM3v32_MOD_PNOFF: + value->rValue = model->BSIM3v32pnoff; + return(OK); + case BSIM3v32_MOD_PVOFFCV: + value->rValue = model->BSIM3v32pvoffcv; + return(OK); + + case BSIM3v32_MOD_TNOM : + value->rValue = model->BSIM3v32tnom; + return(OK); + case BSIM3v32_MOD_CGSO: + value->rValue = model->BSIM3v32cgso; + return(OK); + case BSIM3v32_MOD_CGDO: + value->rValue = model->BSIM3v32cgdo; + return(OK); + case BSIM3v32_MOD_CGBO: + value->rValue = model->BSIM3v32cgbo; + return(OK); + case BSIM3v32_MOD_XPART: + value->rValue = model->BSIM3v32xpart; + return(OK); + case BSIM3v32_MOD_RSH: + value->rValue = model->BSIM3v32sheetResistance; + return(OK); + case BSIM3v32_MOD_JS: + value->rValue = model->BSIM3v32jctSatCurDensity; + return(OK); + case BSIM3v32_MOD_JSW: + value->rValue = model->BSIM3v32jctSidewallSatCurDensity; + return(OK); + case BSIM3v32_MOD_PB: + value->rValue = model->BSIM3v32bulkJctPotential; + return(OK); + case BSIM3v32_MOD_MJ: + value->rValue = model->BSIM3v32bulkJctBotGradingCoeff; + return(OK); + case BSIM3v32_MOD_PBSW: + value->rValue = model->BSIM3v32sidewallJctPotential; + return(OK); + case BSIM3v32_MOD_MJSW: + value->rValue = model->BSIM3v32bulkJctSideGradingCoeff; + return(OK); + case BSIM3v32_MOD_CJ: + value->rValue = model->BSIM3v32unitAreaJctCap; + return(OK); + case BSIM3v32_MOD_CJSW: + value->rValue = model->BSIM3v32unitLengthSidewallJctCap; + return(OK); + case BSIM3v32_MOD_PBSWG: + value->rValue = model->BSIM3v32GatesidewallJctPotential; + return(OK); + case BSIM3v32_MOD_MJSWG: + value->rValue = model->BSIM3v32bulkJctGateSideGradingCoeff; + return(OK); + case BSIM3v32_MOD_CJSWG: + value->rValue = model->BSIM3v32unitLengthGateSidewallJctCap; + return(OK); + case BSIM3v32_MOD_NJ: + value->rValue = model->BSIM3v32jctEmissionCoeff; + return(OK); + case BSIM3v32_MOD_XTI: + value->rValue = model->BSIM3v32jctTempExponent; + return(OK); + case BSIM3v32_MOD_LINT: + value->rValue = model->BSIM3v32Lint; + return(OK); + case BSIM3v32_MOD_LL: + value->rValue = model->BSIM3v32Ll; + return(OK); + case BSIM3v32_MOD_LLC: + value->rValue = model->BSIM3v32Llc; + return(OK); + case BSIM3v32_MOD_LLN: + value->rValue = model->BSIM3v32Lln; + return(OK); + case BSIM3v32_MOD_LW: + value->rValue = model->BSIM3v32Lw; + return(OK); + case BSIM3v32_MOD_LWC: + value->rValue = model->BSIM3v32Lwc; + return(OK); + case BSIM3v32_MOD_LWN: + value->rValue = model->BSIM3v32Lwn; + return(OK); + case BSIM3v32_MOD_LWL: + value->rValue = model->BSIM3v32Lwl; + return(OK); + case BSIM3v32_MOD_LWLC: + value->rValue = model->BSIM3v32Lwlc; + return(OK); + case BSIM3v32_MOD_LMIN: + value->rValue = model->BSIM3v32Lmin; + return(OK); + case BSIM3v32_MOD_LMAX: + value->rValue = model->BSIM3v32Lmax; + return(OK); + case BSIM3v32_MOD_WINT: + value->rValue = model->BSIM3v32Wint; + return(OK); + case BSIM3v32_MOD_WL: + value->rValue = model->BSIM3v32Wl; + return(OK); + case BSIM3v32_MOD_WLC: + value->rValue = model->BSIM3v32Wlc; + return(OK); + case BSIM3v32_MOD_WLN: + value->rValue = model->BSIM3v32Wln; + return(OK); + case BSIM3v32_MOD_WW: + value->rValue = model->BSIM3v32Ww; + return(OK); + case BSIM3v32_MOD_WWC: + value->rValue = model->BSIM3v32Wwc; + return(OK); + case BSIM3v32_MOD_WWN: + value->rValue = model->BSIM3v32Wwn; + return(OK); + case BSIM3v32_MOD_WWL: + value->rValue = model->BSIM3v32Wwl; + return(OK); + case BSIM3v32_MOD_WWLC: + value->rValue = model->BSIM3v32Wwlc; + return(OK); + case BSIM3v32_MOD_WMIN: + value->rValue = model->BSIM3v32Wmin; + return(OK); + case BSIM3v32_MOD_WMAX: + value->rValue = model->BSIM3v32Wmax; + return(OK); + + case BSIM3v32_MOD_XL: + value->rValue = model->BSIM3v32xl; + return(OK); + case BSIM3v32_MOD_XW: + value->rValue = model->BSIM3v32xw; + return(OK); + + case BSIM3v32_MOD_NOIA: + value->rValue = model->BSIM3v32oxideTrapDensityA; + return(OK); + case BSIM3v32_MOD_NOIB: + value->rValue = model->BSIM3v32oxideTrapDensityB; + return(OK); + case BSIM3v32_MOD_NOIC: + value->rValue = model->BSIM3v32oxideTrapDensityC; + return(OK); + case BSIM3v32_MOD_EM: + value->rValue = model->BSIM3v32em; + return(OK); + case BSIM3v32_MOD_EF: + value->rValue = model->BSIM3v32ef; + return(OK); + case BSIM3v32_MOD_AF: + value->rValue = model->BSIM3v32af; + return(OK); + case BSIM3v32_MOD_KF: + value->rValue = model->BSIM3v32kf; + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} diff --git a/src/spicelib/devices/bsim3v32/b3v32mdel.c b/src/spicelib/devices/bsim3v32/b3v32mdel.c new file mode 100644 index 000000000..546afe16b --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32mdel.c @@ -0,0 +1,47 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3mdel.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 + **********/ + +#include "ngspice.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v32mDelete (GENmodel **inModel, IFuid modname, GENmodel *kill) +{ +BSIM3v32model **model = (BSIM3v32model**)inModel; +BSIM3v32model *modfast = (BSIM3v32model*)kill; +BSIM3v32instance *here; +BSIM3v32instance *prev = NULL; +BSIM3v32model **oldmod; + + oldmod = model; + for (; *model ; model = &((*model)->BSIM3v32nextModel)) + { if ((*model)->BSIM3v32modName == modname || + (modfast && *model == modfast)) + goto delgot; + oldmod = model; + } + return(E_NOMOD); + +delgot: + *oldmod = (*model)->BSIM3v32nextModel; /* cut deleted device out of list */ + for (here = (*model)->BSIM3v32instances; here; here = here->BSIM3v32nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + FREE(*model); + return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v32/b3v32mpar.c b/src/spicelib/devices/bsim3v32/b3v32mpar.c new file mode 100644 index 000000000..473221d47 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32mpar.c @@ -0,0 +1,1718 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3mpar.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "bsim3v32def.h" +#include "ifsim.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) +{ + BSIM3v32model *mod = (BSIM3v32model*)inMod; + switch(param) + { case BSIM3v32_MOD_MOBMOD : + mod->BSIM3v32mobMod = value->iValue; + mod->BSIM3v32mobModGiven = TRUE; + break; + case BSIM3v32_MOD_BINUNIT : + mod->BSIM3v32binUnit = value->iValue; + mod->BSIM3v32binUnitGiven = TRUE; + break; + case BSIM3v32_MOD_PARAMCHK : + mod->BSIM3v32paramChk = value->iValue; + mod->BSIM3v32paramChkGiven = TRUE; + break; + case BSIM3v32_MOD_CAPMOD : + mod->BSIM3v32capMod = value->iValue; + mod->BSIM3v32capModGiven = TRUE; + break; + case BSIM3v32_MOD_ACMMOD: + mod->BSIM3v32acmMod = value->iValue; + mod->BSIM3v32acmModGiven = TRUE; + break; + case BSIM3v32_MOD_NOIMOD : + mod->BSIM3v32noiMod = value->iValue; + mod->BSIM3v32noiModGiven = TRUE; + break; + case BSIM3v32_MOD_VERSION : + mod->BSIM3v32version = value->sValue; + mod->BSIM3v32versionGiven = TRUE; + break; + case BSIM3v32_MOD_TOX : + mod->BSIM3v32tox = value->rValue; + mod->BSIM3v32toxGiven = TRUE; + break; + case BSIM3v32_MOD_TOXM : + mod->BSIM3v32toxm = value->rValue; + mod->BSIM3v32toxmGiven = TRUE; + break; + + case BSIM3v32_MOD_CDSC : + mod->BSIM3v32cdsc = value->rValue; + mod->BSIM3v32cdscGiven = TRUE; + break; + case BSIM3v32_MOD_CDSCB : + mod->BSIM3v32cdscb = value->rValue; + mod->BSIM3v32cdscbGiven = TRUE; + break; + + case BSIM3v32_MOD_CDSCD : + mod->BSIM3v32cdscd = value->rValue; + mod->BSIM3v32cdscdGiven = TRUE; + break; + + case BSIM3v32_MOD_CIT : + mod->BSIM3v32cit = value->rValue; + mod->BSIM3v32citGiven = TRUE; + break; + case BSIM3v32_MOD_NFACTOR : + mod->BSIM3v32nfactor = value->rValue; + mod->BSIM3v32nfactorGiven = TRUE; + break; + case BSIM3v32_MOD_XJ: + mod->BSIM3v32xj = value->rValue; + mod->BSIM3v32xjGiven = TRUE; + break; + case BSIM3v32_MOD_VSAT: + mod->BSIM3v32vsat = value->rValue; + mod->BSIM3v32vsatGiven = TRUE; + break; + case BSIM3v32_MOD_A0: + mod->BSIM3v32a0 = value->rValue; + mod->BSIM3v32a0Given = TRUE; + break; + + case BSIM3v32_MOD_AGS: + mod->BSIM3v32ags= value->rValue; + mod->BSIM3v32agsGiven = TRUE; + break; + + case BSIM3v32_MOD_A1: + mod->BSIM3v32a1 = value->rValue; + mod->BSIM3v32a1Given = TRUE; + break; + case BSIM3v32_MOD_A2: + mod->BSIM3v32a2 = value->rValue; + mod->BSIM3v32a2Given = TRUE; + break; + case BSIM3v32_MOD_AT: + mod->BSIM3v32at = value->rValue; + mod->BSIM3v32atGiven = TRUE; + break; + case BSIM3v32_MOD_KETA: + mod->BSIM3v32keta = value->rValue; + mod->BSIM3v32ketaGiven = TRUE; + break; + case BSIM3v32_MOD_NSUB: + mod->BSIM3v32nsub = value->rValue; + mod->BSIM3v32nsubGiven = TRUE; + break; + case BSIM3v32_MOD_NPEAK: + mod->BSIM3v32npeak = value->rValue; + mod->BSIM3v32npeakGiven = TRUE; + if (mod->BSIM3v32npeak > 1.0e20) + mod->BSIM3v32npeak *= 1.0e-6; + break; + case BSIM3v32_MOD_NGATE: + mod->BSIM3v32ngate = value->rValue; + mod->BSIM3v32ngateGiven = TRUE; + if (mod->BSIM3v32ngate > 1.0e23) + mod->BSIM3v32ngate *= 1.0e-6; + break; + case BSIM3v32_MOD_GAMMA1: + mod->BSIM3v32gamma1 = value->rValue; + mod->BSIM3v32gamma1Given = TRUE; + break; + case BSIM3v32_MOD_GAMMA2: + mod->BSIM3v32gamma2 = value->rValue; + mod->BSIM3v32gamma2Given = TRUE; + break; + case BSIM3v32_MOD_VBX: + mod->BSIM3v32vbx = value->rValue; + mod->BSIM3v32vbxGiven = TRUE; + break; + case BSIM3v32_MOD_VBM: + mod->BSIM3v32vbm = value->rValue; + mod->BSIM3v32vbmGiven = TRUE; + break; + case BSIM3v32_MOD_XT: + mod->BSIM3v32xt = value->rValue; + mod->BSIM3v32xtGiven = TRUE; + break; + case BSIM3v32_MOD_K1: + mod->BSIM3v32k1 = value->rValue; + mod->BSIM3v32k1Given = TRUE; + break; + case BSIM3v32_MOD_KT1: + mod->BSIM3v32kt1 = value->rValue; + mod->BSIM3v32kt1Given = TRUE; + break; + case BSIM3v32_MOD_KT1L: + mod->BSIM3v32kt1l = value->rValue; + mod->BSIM3v32kt1lGiven = TRUE; + break; + case BSIM3v32_MOD_KT2: + mod->BSIM3v32kt2 = value->rValue; + mod->BSIM3v32kt2Given = TRUE; + break; + case BSIM3v32_MOD_K2: + mod->BSIM3v32k2 = value->rValue; + mod->BSIM3v32k2Given = TRUE; + break; + case BSIM3v32_MOD_K3: + mod->BSIM3v32k3 = value->rValue; + mod->BSIM3v32k3Given = TRUE; + break; + case BSIM3v32_MOD_K3B: + mod->BSIM3v32k3b = value->rValue; + mod->BSIM3v32k3bGiven = TRUE; + break; + case BSIM3v32_MOD_NLX: + mod->BSIM3v32nlx = value->rValue; + mod->BSIM3v32nlxGiven = TRUE; + break; + case BSIM3v32_MOD_W0: + mod->BSIM3v32w0 = value->rValue; + mod->BSIM3v32w0Given = TRUE; + break; + case BSIM3v32_MOD_DVT0: + mod->BSIM3v32dvt0 = value->rValue; + mod->BSIM3v32dvt0Given = TRUE; + break; + case BSIM3v32_MOD_DVT1: + mod->BSIM3v32dvt1 = value->rValue; + mod->BSIM3v32dvt1Given = TRUE; + break; + case BSIM3v32_MOD_DVT2: + mod->BSIM3v32dvt2 = value->rValue; + mod->BSIM3v32dvt2Given = TRUE; + break; + case BSIM3v32_MOD_DVT0W: + mod->BSIM3v32dvt0w = value->rValue; + mod->BSIM3v32dvt0wGiven = TRUE; + break; + case BSIM3v32_MOD_DVT1W: + mod->BSIM3v32dvt1w = value->rValue; + mod->BSIM3v32dvt1wGiven = TRUE; + break; + case BSIM3v32_MOD_DVT2W: + mod->BSIM3v32dvt2w = value->rValue; + mod->BSIM3v32dvt2wGiven = TRUE; + break; + case BSIM3v32_MOD_DROUT: + mod->BSIM3v32drout = value->rValue; + mod->BSIM3v32droutGiven = TRUE; + break; + case BSIM3v32_MOD_DSUB: + mod->BSIM3v32dsub = value->rValue; + mod->BSIM3v32dsubGiven = TRUE; + break; + case BSIM3v32_MOD_VTH0: + mod->BSIM3v32vth0 = value->rValue; + mod->BSIM3v32vth0Given = TRUE; + break; + case BSIM3v32_MOD_UA: + mod->BSIM3v32ua = value->rValue; + mod->BSIM3v32uaGiven = TRUE; + break; + case BSIM3v32_MOD_UA1: + mod->BSIM3v32ua1 = value->rValue; + mod->BSIM3v32ua1Given = TRUE; + break; + case BSIM3v32_MOD_UB: + mod->BSIM3v32ub = value->rValue; + mod->BSIM3v32ubGiven = TRUE; + break; + case BSIM3v32_MOD_UB1: + mod->BSIM3v32ub1 = value->rValue; + mod->BSIM3v32ub1Given = TRUE; + break; + case BSIM3v32_MOD_UC: + mod->BSIM3v32uc = value->rValue; + mod->BSIM3v32ucGiven = TRUE; + break; + case BSIM3v32_MOD_UC1: + mod->BSIM3v32uc1 = value->rValue; + mod->BSIM3v32uc1Given = TRUE; + break; + case BSIM3v32_MOD_U0 : + mod->BSIM3v32u0 = value->rValue; + mod->BSIM3v32u0Given = TRUE; + break; + case BSIM3v32_MOD_UTE : + mod->BSIM3v32ute = value->rValue; + mod->BSIM3v32uteGiven = TRUE; + break; + case BSIM3v32_MOD_VOFF: + mod->BSIM3v32voff = value->rValue; + mod->BSIM3v32voffGiven = TRUE; + break; + case BSIM3v32_MOD_DELTA : + mod->BSIM3v32delta = value->rValue; + mod->BSIM3v32deltaGiven = TRUE; + break; + case BSIM3v32_MOD_RDSW: + mod->BSIM3v32rdsw = value->rValue; + mod->BSIM3v32rdswGiven = TRUE; + break; + case BSIM3v32_MOD_PRWG: + mod->BSIM3v32prwg = value->rValue; + mod->BSIM3v32prwgGiven = TRUE; + break; + case BSIM3v32_MOD_PRWB: + mod->BSIM3v32prwb = value->rValue; + mod->BSIM3v32prwbGiven = TRUE; + break; + case BSIM3v32_MOD_PRT: + mod->BSIM3v32prt = value->rValue; + mod->BSIM3v32prtGiven = TRUE; + break; + case BSIM3v32_MOD_ETA0: + mod->BSIM3v32eta0 = value->rValue; + mod->BSIM3v32eta0Given = TRUE; + break; + case BSIM3v32_MOD_ETAB: + mod->BSIM3v32etab = value->rValue; + mod->BSIM3v32etabGiven = TRUE; + break; + case BSIM3v32_MOD_PCLM: + mod->BSIM3v32pclm = value->rValue; + mod->BSIM3v32pclmGiven = TRUE; + break; + case BSIM3v32_MOD_PDIBL1: + mod->BSIM3v32pdibl1 = value->rValue; + mod->BSIM3v32pdibl1Given = TRUE; + break; + case BSIM3v32_MOD_PDIBL2: + mod->BSIM3v32pdibl2 = value->rValue; + mod->BSIM3v32pdibl2Given = TRUE; + break; + case BSIM3v32_MOD_PDIBLB: + mod->BSIM3v32pdiblb = value->rValue; + mod->BSIM3v32pdiblbGiven = TRUE; + break; + case BSIM3v32_MOD_PSCBE1: + mod->BSIM3v32pscbe1 = value->rValue; + mod->BSIM3v32pscbe1Given = TRUE; + break; + case BSIM3v32_MOD_PSCBE2: + mod->BSIM3v32pscbe2 = value->rValue; + mod->BSIM3v32pscbe2Given = TRUE; + break; + case BSIM3v32_MOD_PVAG: + mod->BSIM3v32pvag = value->rValue; + mod->BSIM3v32pvagGiven = TRUE; + break; + case BSIM3v32_MOD_WR : + mod->BSIM3v32wr = value->rValue; + mod->BSIM3v32wrGiven = TRUE; + break; + case BSIM3v32_MOD_DWG : + mod->BSIM3v32dwg = value->rValue; + mod->BSIM3v32dwgGiven = TRUE; + break; + case BSIM3v32_MOD_DWB : + mod->BSIM3v32dwb = value->rValue; + mod->BSIM3v32dwbGiven = TRUE; + break; + case BSIM3v32_MOD_B0 : + mod->BSIM3v32b0 = value->rValue; + mod->BSIM3v32b0Given = TRUE; + break; + case BSIM3v32_MOD_B1 : + mod->BSIM3v32b1 = value->rValue; + mod->BSIM3v32b1Given = TRUE; + break; + case BSIM3v32_MOD_ALPHA0 : + mod->BSIM3v32alpha0 = value->rValue; + mod->BSIM3v32alpha0Given = TRUE; + break; + case BSIM3v32_MOD_ALPHA1 : + mod->BSIM3v32alpha1 = value->rValue; + mod->BSIM3v32alpha1Given = TRUE; + break; + case BSIM3v32_MOD_BETA0 : + mod->BSIM3v32beta0 = value->rValue; + mod->BSIM3v32beta0Given = TRUE; + break; + case BSIM3v32_MOD_IJTH : + mod->BSIM3v32ijth = value->rValue; + mod->BSIM3v32ijthGiven = TRUE; + break; + case BSIM3v32_MOD_VFB : + mod->BSIM3v32vfb = value->rValue; + mod->BSIM3v32vfbGiven = TRUE; + break; + + case BSIM3v32_MOD_ELM : + mod->BSIM3v32elm = value->rValue; + mod->BSIM3v32elmGiven = TRUE; + break; + case BSIM3v32_MOD_CGSL : + mod->BSIM3v32cgsl = value->rValue; + mod->BSIM3v32cgslGiven = TRUE; + break; + case BSIM3v32_MOD_CGDL : + mod->BSIM3v32cgdl = value->rValue; + mod->BSIM3v32cgdlGiven = TRUE; + break; + case BSIM3v32_MOD_CKAPPA : + mod->BSIM3v32ckappa = value->rValue; + mod->BSIM3v32ckappaGiven = TRUE; + break; + case BSIM3v32_MOD_CF : + mod->BSIM3v32cf = value->rValue; + mod->BSIM3v32cfGiven = TRUE; + break; + case BSIM3v32_MOD_CLC : + mod->BSIM3v32clc = value->rValue; + mod->BSIM3v32clcGiven = TRUE; + break; + case BSIM3v32_MOD_CLE : + mod->BSIM3v32cle = value->rValue; + mod->BSIM3v32cleGiven = TRUE; + break; + case BSIM3v32_MOD_DWC : + mod->BSIM3v32dwc = value->rValue; + mod->BSIM3v32dwcGiven = TRUE; + break; + case BSIM3v32_MOD_DLC : + mod->BSIM3v32dlc = value->rValue; + mod->BSIM3v32dlcGiven = TRUE; + break; + case BSIM3v32_MOD_VFBCV : + mod->BSIM3v32vfbcv = value->rValue; + mod->BSIM3v32vfbcvGiven = TRUE; + break; + case BSIM3v32_MOD_ACDE : + mod->BSIM3v32acde = value->rValue; + mod->BSIM3v32acdeGiven = TRUE; + break; + case BSIM3v32_MOD_MOIN : + mod->BSIM3v32moin = value->rValue; + mod->BSIM3v32moinGiven = TRUE; + break; + case BSIM3v32_MOD_NOFF : + mod->BSIM3v32noff = value->rValue; + mod->BSIM3v32noffGiven = TRUE; + break; + case BSIM3v32_MOD_VOFFCV : + mod->BSIM3v32voffcv = value->rValue; + mod->BSIM3v32voffcvGiven = TRUE; + break; + case BSIM3v32_MOD_TCJ : + mod->BSIM3v32tcj = value->rValue; + mod->BSIM3v32tcjGiven = TRUE; + break; + case BSIM3v32_MOD_TPB : + mod->BSIM3v32tpb = value->rValue; + mod->BSIM3v32tpbGiven = TRUE; + break; + case BSIM3v32_MOD_TCJSW : + mod->BSIM3v32tcjsw = value->rValue; + mod->BSIM3v32tcjswGiven = TRUE; + break; + case BSIM3v32_MOD_TPBSW : + mod->BSIM3v32tpbsw = value->rValue; + mod->BSIM3v32tpbswGiven = TRUE; + break; + case BSIM3v32_MOD_TCJSWG : + mod->BSIM3v32tcjswg = value->rValue; + mod->BSIM3v32tcjswgGiven = TRUE; + break; + case BSIM3v32_MOD_TPBSWG : + mod->BSIM3v32tpbswg = value->rValue; + mod->BSIM3v32tpbswgGiven = TRUE; + break; + + /* acm model */ + case BSIM3v32_MOD_HDIF: + mod->BSIM3v32hdif = value->rValue; + mod->BSIM3v32hdifGiven = TRUE; + break; + case BSIM3v32_MOD_LDIF: + mod->BSIM3v32ldif = value->rValue; + mod->BSIM3v32ldifGiven = TRUE; + break; + case BSIM3v32_MOD_LD: + mod->BSIM3v32ld = value->rValue; + mod->BSIM3v32ldGiven = TRUE; + break; + case BSIM3v32_MOD_RD: + mod->BSIM3v32rd = value->rValue; + mod->BSIM3v32rdGiven = TRUE; + break; + case BSIM3v32_MOD_RS: + mod->BSIM3v32rs = value->rValue; + mod->BSIM3v32rsGiven = TRUE; + break; + case BSIM3v32_MOD_RDC: + mod->BSIM3v32rdc = value->rValue; + mod->BSIM3v32rdcGiven = TRUE; + break; + case BSIM3v32_MOD_RSC: + mod->BSIM3v32rsc = value->rValue; + mod->BSIM3v32rscGiven = TRUE; + break; + + /* Length dependence */ + case BSIM3v32_MOD_LCDSC : + mod->BSIM3v32lcdsc = value->rValue; + mod->BSIM3v32lcdscGiven = TRUE; + break; + + + case BSIM3v32_MOD_LCDSCB : + mod->BSIM3v32lcdscb = value->rValue; + mod->BSIM3v32lcdscbGiven = TRUE; + break; + case BSIM3v32_MOD_LCDSCD : + mod->BSIM3v32lcdscd = value->rValue; + mod->BSIM3v32lcdscdGiven = TRUE; + break; + case BSIM3v32_MOD_LCIT : + mod->BSIM3v32lcit = value->rValue; + mod->BSIM3v32lcitGiven = TRUE; + break; + case BSIM3v32_MOD_LNFACTOR : + mod->BSIM3v32lnfactor = value->rValue; + mod->BSIM3v32lnfactorGiven = TRUE; + break; + case BSIM3v32_MOD_LXJ: + mod->BSIM3v32lxj = value->rValue; + mod->BSIM3v32lxjGiven = TRUE; + break; + case BSIM3v32_MOD_LVSAT: + mod->BSIM3v32lvsat = value->rValue; + mod->BSIM3v32lvsatGiven = TRUE; + break; + + + case BSIM3v32_MOD_LA0: + mod->BSIM3v32la0 = value->rValue; + mod->BSIM3v32la0Given = TRUE; + break; + case BSIM3v32_MOD_LAGS: + mod->BSIM3v32lags = value->rValue; + mod->BSIM3v32lagsGiven = TRUE; + break; + case BSIM3v32_MOD_LA1: + mod->BSIM3v32la1 = value->rValue; + mod->BSIM3v32la1Given = TRUE; + break; + case BSIM3v32_MOD_LA2: + mod->BSIM3v32la2 = value->rValue; + mod->BSIM3v32la2Given = TRUE; + break; + case BSIM3v32_MOD_LAT: + mod->BSIM3v32lat = value->rValue; + mod->BSIM3v32latGiven = TRUE; + break; + case BSIM3v32_MOD_LKETA: + mod->BSIM3v32lketa = value->rValue; + mod->BSIM3v32lketaGiven = TRUE; + break; + case BSIM3v32_MOD_LNSUB: + mod->BSIM3v32lnsub = value->rValue; + mod->BSIM3v32lnsubGiven = TRUE; + break; + case BSIM3v32_MOD_LNPEAK: + mod->BSIM3v32lnpeak = value->rValue; + mod->BSIM3v32lnpeakGiven = TRUE; + if (mod->BSIM3v32lnpeak > 1.0e20) + mod->BSIM3v32lnpeak *= 1.0e-6; + break; + case BSIM3v32_MOD_LNGATE: + mod->BSIM3v32lngate = value->rValue; + mod->BSIM3v32lngateGiven = TRUE; + if (mod->BSIM3v32lngate > 1.0e23) + mod->BSIM3v32lngate *= 1.0e-6; + break; + case BSIM3v32_MOD_LGAMMA1: + mod->BSIM3v32lgamma1 = value->rValue; + mod->BSIM3v32lgamma1Given = TRUE; + break; + case BSIM3v32_MOD_LGAMMA2: + mod->BSIM3v32lgamma2 = value->rValue; + mod->BSIM3v32lgamma2Given = TRUE; + break; + case BSIM3v32_MOD_LVBX: + mod->BSIM3v32lvbx = value->rValue; + mod->BSIM3v32lvbxGiven = TRUE; + break; + case BSIM3v32_MOD_LVBM: + mod->BSIM3v32lvbm = value->rValue; + mod->BSIM3v32lvbmGiven = TRUE; + break; + case BSIM3v32_MOD_LXT: + mod->BSIM3v32lxt = value->rValue; + mod->BSIM3v32lxtGiven = TRUE; + break; + case BSIM3v32_MOD_LK1: + mod->BSIM3v32lk1 = value->rValue; + mod->BSIM3v32lk1Given = TRUE; + break; + case BSIM3v32_MOD_LKT1: + mod->BSIM3v32lkt1 = value->rValue; + mod->BSIM3v32lkt1Given = TRUE; + break; + case BSIM3v32_MOD_LKT1L: + mod->BSIM3v32lkt1l = value->rValue; + mod->BSIM3v32lkt1lGiven = TRUE; + break; + case BSIM3v32_MOD_LKT2: + mod->BSIM3v32lkt2 = value->rValue; + mod->BSIM3v32lkt2Given = TRUE; + break; + case BSIM3v32_MOD_LK2: + mod->BSIM3v32lk2 = value->rValue; + mod->BSIM3v32lk2Given = TRUE; + break; + case BSIM3v32_MOD_LK3: + mod->BSIM3v32lk3 = value->rValue; + mod->BSIM3v32lk3Given = TRUE; + break; + case BSIM3v32_MOD_LK3B: + mod->BSIM3v32lk3b = value->rValue; + mod->BSIM3v32lk3bGiven = TRUE; + break; + case BSIM3v32_MOD_LNLX: + mod->BSIM3v32lnlx = value->rValue; + mod->BSIM3v32lnlxGiven = TRUE; + break; + case BSIM3v32_MOD_LW0: + mod->BSIM3v32lw0 = value->rValue; + mod->BSIM3v32lw0Given = TRUE; + break; + case BSIM3v32_MOD_LDVT0: + mod->BSIM3v32ldvt0 = value->rValue; + mod->BSIM3v32ldvt0Given = TRUE; + break; + case BSIM3v32_MOD_LDVT1: + mod->BSIM3v32ldvt1 = value->rValue; + mod->BSIM3v32ldvt1Given = TRUE; + break; + case BSIM3v32_MOD_LDVT2: + mod->BSIM3v32ldvt2 = value->rValue; + mod->BSIM3v32ldvt2Given = TRUE; + break; + case BSIM3v32_MOD_LDVT0W: + mod->BSIM3v32ldvt0w = value->rValue; + mod->BSIM3v32ldvt0wGiven = TRUE; + break; + case BSIM3v32_MOD_LDVT1W: + mod->BSIM3v32ldvt1w = value->rValue; + mod->BSIM3v32ldvt1wGiven = TRUE; + break; + case BSIM3v32_MOD_LDVT2W: + mod->BSIM3v32ldvt2w = value->rValue; + mod->BSIM3v32ldvt2wGiven = TRUE; + break; + case BSIM3v32_MOD_LDROUT: + mod->BSIM3v32ldrout = value->rValue; + mod->BSIM3v32ldroutGiven = TRUE; + break; + case BSIM3v32_MOD_LDSUB: + mod->BSIM3v32ldsub = value->rValue; + mod->BSIM3v32ldsubGiven = TRUE; + break; + case BSIM3v32_MOD_LVTH0: + mod->BSIM3v32lvth0 = value->rValue; + mod->BSIM3v32lvth0Given = TRUE; + break; + case BSIM3v32_MOD_LUA: + mod->BSIM3v32lua = value->rValue; + mod->BSIM3v32luaGiven = TRUE; + break; + case BSIM3v32_MOD_LUA1: + mod->BSIM3v32lua1 = value->rValue; + mod->BSIM3v32lua1Given = TRUE; + break; + case BSIM3v32_MOD_LUB: + mod->BSIM3v32lub = value->rValue; + mod->BSIM3v32lubGiven = TRUE; + break; + case BSIM3v32_MOD_LUB1: + mod->BSIM3v32lub1 = value->rValue; + mod->BSIM3v32lub1Given = TRUE; + break; + case BSIM3v32_MOD_LUC: + mod->BSIM3v32luc = value->rValue; + mod->BSIM3v32lucGiven = TRUE; + break; + case BSIM3v32_MOD_LUC1: + mod->BSIM3v32luc1 = value->rValue; + mod->BSIM3v32luc1Given = TRUE; + break; + case BSIM3v32_MOD_LU0 : + mod->BSIM3v32lu0 = value->rValue; + mod->BSIM3v32lu0Given = TRUE; + break; + case BSIM3v32_MOD_LUTE : + mod->BSIM3v32lute = value->rValue; + mod->BSIM3v32luteGiven = TRUE; + break; + case BSIM3v32_MOD_LVOFF: + mod->BSIM3v32lvoff = value->rValue; + mod->BSIM3v32lvoffGiven = TRUE; + break; + case BSIM3v32_MOD_LDELTA : + mod->BSIM3v32ldelta = value->rValue; + mod->BSIM3v32ldeltaGiven = TRUE; + break; + case BSIM3v32_MOD_LRDSW: + mod->BSIM3v32lrdsw = value->rValue; + mod->BSIM3v32lrdswGiven = TRUE; + break; + case BSIM3v32_MOD_LPRWB: + mod->BSIM3v32lprwb = value->rValue; + mod->BSIM3v32lprwbGiven = TRUE; + break; + case BSIM3v32_MOD_LPRWG: + mod->BSIM3v32lprwg = value->rValue; + mod->BSIM3v32lprwgGiven = TRUE; + break; + case BSIM3v32_MOD_LPRT: + mod->BSIM3v32lprt = value->rValue; + mod->BSIM3v32lprtGiven = TRUE; + break; + case BSIM3v32_MOD_LETA0: + mod->BSIM3v32leta0 = value->rValue; + mod->BSIM3v32leta0Given = TRUE; + break; + case BSIM3v32_MOD_LETAB: + mod->BSIM3v32letab = value->rValue; + mod->BSIM3v32letabGiven = TRUE; + break; + case BSIM3v32_MOD_LPCLM: + mod->BSIM3v32lpclm = value->rValue; + mod->BSIM3v32lpclmGiven = TRUE; + break; + case BSIM3v32_MOD_LPDIBL1: + mod->BSIM3v32lpdibl1 = value->rValue; + mod->BSIM3v32lpdibl1Given = TRUE; + break; + case BSIM3v32_MOD_LPDIBL2: + mod->BSIM3v32lpdibl2 = value->rValue; + mod->BSIM3v32lpdibl2Given = TRUE; + break; + case BSIM3v32_MOD_LPDIBLB: + mod->BSIM3v32lpdiblb = value->rValue; + mod->BSIM3v32lpdiblbGiven = TRUE; + break; + case BSIM3v32_MOD_LPSCBE1: + mod->BSIM3v32lpscbe1 = value->rValue; + mod->BSIM3v32lpscbe1Given = TRUE; + break; + case BSIM3v32_MOD_LPSCBE2: + mod->BSIM3v32lpscbe2 = value->rValue; + mod->BSIM3v32lpscbe2Given = TRUE; + break; + case BSIM3v32_MOD_LPVAG: + mod->BSIM3v32lpvag = value->rValue; + mod->BSIM3v32lpvagGiven = TRUE; + break; + case BSIM3v32_MOD_LWR : + mod->BSIM3v32lwr = value->rValue; + mod->BSIM3v32lwrGiven = TRUE; + break; + case BSIM3v32_MOD_LDWG : + mod->BSIM3v32ldwg = value->rValue; + mod->BSIM3v32ldwgGiven = TRUE; + break; + case BSIM3v32_MOD_LDWB : + mod->BSIM3v32ldwb = value->rValue; + mod->BSIM3v32ldwbGiven = TRUE; + break; + case BSIM3v32_MOD_LB0 : + mod->BSIM3v32lb0 = value->rValue; + mod->BSIM3v32lb0Given = TRUE; + break; + case BSIM3v32_MOD_LB1 : + mod->BSIM3v32lb1 = value->rValue; + mod->BSIM3v32lb1Given = TRUE; + break; + case BSIM3v32_MOD_LALPHA0 : + mod->BSIM3v32lalpha0 = value->rValue; + mod->BSIM3v32lalpha0Given = TRUE; + break; + case BSIM3v32_MOD_LALPHA1 : + mod->BSIM3v32lalpha1 = value->rValue; + mod->BSIM3v32lalpha1Given = TRUE; + break; + case BSIM3v32_MOD_LBETA0 : + mod->BSIM3v32lbeta0 = value->rValue; + mod->BSIM3v32lbeta0Given = TRUE; + break; + case BSIM3v32_MOD_LVFB : + mod->BSIM3v32lvfb = value->rValue; + mod->BSIM3v32lvfbGiven = TRUE; + break; + + case BSIM3v32_MOD_LELM : + mod->BSIM3v32lelm = value->rValue; + mod->BSIM3v32lelmGiven = TRUE; + break; + case BSIM3v32_MOD_LCGSL : + mod->BSIM3v32lcgsl = value->rValue; + mod->BSIM3v32lcgslGiven = TRUE; + break; + case BSIM3v32_MOD_LCGDL : + mod->BSIM3v32lcgdl = value->rValue; + mod->BSIM3v32lcgdlGiven = TRUE; + break; + case BSIM3v32_MOD_LCKAPPA : + mod->BSIM3v32lckappa = value->rValue; + mod->BSIM3v32lckappaGiven = TRUE; + break; + case BSIM3v32_MOD_LCF : + mod->BSIM3v32lcf = value->rValue; + mod->BSIM3v32lcfGiven = TRUE; + break; + case BSIM3v32_MOD_LCLC : + mod->BSIM3v32lclc = value->rValue; + mod->BSIM3v32lclcGiven = TRUE; + break; + case BSIM3v32_MOD_LCLE : + mod->BSIM3v32lcle = value->rValue; + mod->BSIM3v32lcleGiven = TRUE; + break; + case BSIM3v32_MOD_LVFBCV : + mod->BSIM3v32lvfbcv = value->rValue; + mod->BSIM3v32lvfbcvGiven = TRUE; + break; + case BSIM3v32_MOD_LACDE : + mod->BSIM3v32lacde = value->rValue; + mod->BSIM3v32lacdeGiven = TRUE; + break; + case BSIM3v32_MOD_LMOIN : + mod->BSIM3v32lmoin = value->rValue; + mod->BSIM3v32lmoinGiven = TRUE; + break; + case BSIM3v32_MOD_LNOFF : + mod->BSIM3v32lnoff = value->rValue; + mod->BSIM3v32lnoffGiven = TRUE; + break; + case BSIM3v32_MOD_LVOFFCV : + mod->BSIM3v32lvoffcv = value->rValue; + mod->BSIM3v32lvoffcvGiven = TRUE; + break; + + /* Width dependence */ + case BSIM3v32_MOD_WCDSC : + mod->BSIM3v32wcdsc = value->rValue; + mod->BSIM3v32wcdscGiven = TRUE; + break; + + + case BSIM3v32_MOD_WCDSCB : + mod->BSIM3v32wcdscb = value->rValue; + mod->BSIM3v32wcdscbGiven = TRUE; + break; + case BSIM3v32_MOD_WCDSCD : + mod->BSIM3v32wcdscd = value->rValue; + mod->BSIM3v32wcdscdGiven = TRUE; + break; + case BSIM3v32_MOD_WCIT : + mod->BSIM3v32wcit = value->rValue; + mod->BSIM3v32wcitGiven = TRUE; + break; + case BSIM3v32_MOD_WNFACTOR : + mod->BSIM3v32wnfactor = value->rValue; + mod->BSIM3v32wnfactorGiven = TRUE; + break; + case BSIM3v32_MOD_WXJ: + mod->BSIM3v32wxj = value->rValue; + mod->BSIM3v32wxjGiven = TRUE; + break; + case BSIM3v32_MOD_WVSAT: + mod->BSIM3v32wvsat = value->rValue; + mod->BSIM3v32wvsatGiven = TRUE; + break; + + + case BSIM3v32_MOD_WA0: + mod->BSIM3v32wa0 = value->rValue; + mod->BSIM3v32wa0Given = TRUE; + break; + case BSIM3v32_MOD_WAGS: + mod->BSIM3v32wags = value->rValue; + mod->BSIM3v32wagsGiven = TRUE; + break; + case BSIM3v32_MOD_WA1: + mod->BSIM3v32wa1 = value->rValue; + mod->BSIM3v32wa1Given = TRUE; + break; + case BSIM3v32_MOD_WA2: + mod->BSIM3v32wa2 = value->rValue; + mod->BSIM3v32wa2Given = TRUE; + break; + case BSIM3v32_MOD_WAT: + mod->BSIM3v32wat = value->rValue; + mod->BSIM3v32watGiven = TRUE; + break; + case BSIM3v32_MOD_WKETA: + mod->BSIM3v32wketa = value->rValue; + mod->BSIM3v32wketaGiven = TRUE; + break; + case BSIM3v32_MOD_WNSUB: + mod->BSIM3v32wnsub = value->rValue; + mod->BSIM3v32wnsubGiven = TRUE; + break; + case BSIM3v32_MOD_WNPEAK: + mod->BSIM3v32wnpeak = value->rValue; + mod->BSIM3v32wnpeakGiven = TRUE; + if (mod->BSIM3v32wnpeak > 1.0e20) + mod->BSIM3v32wnpeak *= 1.0e-6; + break; + case BSIM3v32_MOD_WNGATE: + mod->BSIM3v32wngate = value->rValue; + mod->BSIM3v32wngateGiven = TRUE; + if (mod->BSIM3v32wngate > 1.0e23) + mod->BSIM3v32wngate *= 1.0e-6; + break; + case BSIM3v32_MOD_WGAMMA1: + mod->BSIM3v32wgamma1 = value->rValue; + mod->BSIM3v32wgamma1Given = TRUE; + break; + case BSIM3v32_MOD_WGAMMA2: + mod->BSIM3v32wgamma2 = value->rValue; + mod->BSIM3v32wgamma2Given = TRUE; + break; + case BSIM3v32_MOD_WVBX: + mod->BSIM3v32wvbx = value->rValue; + mod->BSIM3v32wvbxGiven = TRUE; + break; + case BSIM3v32_MOD_WVBM: + mod->BSIM3v32wvbm = value->rValue; + mod->BSIM3v32wvbmGiven = TRUE; + break; + case BSIM3v32_MOD_WXT: + mod->BSIM3v32wxt = value->rValue; + mod->BSIM3v32wxtGiven = TRUE; + break; + case BSIM3v32_MOD_WK1: + mod->BSIM3v32wk1 = value->rValue; + mod->BSIM3v32wk1Given = TRUE; + break; + case BSIM3v32_MOD_WKT1: + mod->BSIM3v32wkt1 = value->rValue; + mod->BSIM3v32wkt1Given = TRUE; + break; + case BSIM3v32_MOD_WKT1L: + mod->BSIM3v32wkt1l = value->rValue; + mod->BSIM3v32wkt1lGiven = TRUE; + break; + case BSIM3v32_MOD_WKT2: + mod->BSIM3v32wkt2 = value->rValue; + mod->BSIM3v32wkt2Given = TRUE; + break; + case BSIM3v32_MOD_WK2: + mod->BSIM3v32wk2 = value->rValue; + mod->BSIM3v32wk2Given = TRUE; + break; + case BSIM3v32_MOD_WK3: + mod->BSIM3v32wk3 = value->rValue; + mod->BSIM3v32wk3Given = TRUE; + break; + case BSIM3v32_MOD_WK3B: + mod->BSIM3v32wk3b = value->rValue; + mod->BSIM3v32wk3bGiven = TRUE; + break; + case BSIM3v32_MOD_WNLX: + mod->BSIM3v32wnlx = value->rValue; + mod->BSIM3v32wnlxGiven = TRUE; + break; + case BSIM3v32_MOD_WW0: + mod->BSIM3v32ww0 = value->rValue; + mod->BSIM3v32ww0Given = TRUE; + break; + case BSIM3v32_MOD_WDVT0: + mod->BSIM3v32wdvt0 = value->rValue; + mod->BSIM3v32wdvt0Given = TRUE; + break; + case BSIM3v32_MOD_WDVT1: + mod->BSIM3v32wdvt1 = value->rValue; + mod->BSIM3v32wdvt1Given = TRUE; + break; + case BSIM3v32_MOD_WDVT2: + mod->BSIM3v32wdvt2 = value->rValue; + mod->BSIM3v32wdvt2Given = TRUE; + break; + case BSIM3v32_MOD_WDVT0W: + mod->BSIM3v32wdvt0w = value->rValue; + mod->BSIM3v32wdvt0wGiven = TRUE; + break; + case BSIM3v32_MOD_WDVT1W: + mod->BSIM3v32wdvt1w = value->rValue; + mod->BSIM3v32wdvt1wGiven = TRUE; + break; + case BSIM3v32_MOD_WDVT2W: + mod->BSIM3v32wdvt2w = value->rValue; + mod->BSIM3v32wdvt2wGiven = TRUE; + break; + case BSIM3v32_MOD_WDROUT: + mod->BSIM3v32wdrout = value->rValue; + mod->BSIM3v32wdroutGiven = TRUE; + break; + case BSIM3v32_MOD_WDSUB: + mod->BSIM3v32wdsub = value->rValue; + mod->BSIM3v32wdsubGiven = TRUE; + break; + case BSIM3v32_MOD_WVTH0: + mod->BSIM3v32wvth0 = value->rValue; + mod->BSIM3v32wvth0Given = TRUE; + break; + case BSIM3v32_MOD_WUA: + mod->BSIM3v32wua = value->rValue; + mod->BSIM3v32wuaGiven = TRUE; + break; + case BSIM3v32_MOD_WUA1: + mod->BSIM3v32wua1 = value->rValue; + mod->BSIM3v32wua1Given = TRUE; + break; + case BSIM3v32_MOD_WUB: + mod->BSIM3v32wub = value->rValue; + mod->BSIM3v32wubGiven = TRUE; + break; + case BSIM3v32_MOD_WUB1: + mod->BSIM3v32wub1 = value->rValue; + mod->BSIM3v32wub1Given = TRUE; + break; + case BSIM3v32_MOD_WUC: + mod->BSIM3v32wuc = value->rValue; + mod->BSIM3v32wucGiven = TRUE; + break; + case BSIM3v32_MOD_WUC1: + mod->BSIM3v32wuc1 = value->rValue; + mod->BSIM3v32wuc1Given = TRUE; + break; + case BSIM3v32_MOD_WU0 : + mod->BSIM3v32wu0 = value->rValue; + mod->BSIM3v32wu0Given = TRUE; + break; + case BSIM3v32_MOD_WUTE : + mod->BSIM3v32wute = value->rValue; + mod->BSIM3v32wuteGiven = TRUE; + break; + case BSIM3v32_MOD_WVOFF: + mod->BSIM3v32wvoff = value->rValue; + mod->BSIM3v32wvoffGiven = TRUE; + break; + case BSIM3v32_MOD_WDELTA : + mod->BSIM3v32wdelta = value->rValue; + mod->BSIM3v32wdeltaGiven = TRUE; + break; + case BSIM3v32_MOD_WRDSW: + mod->BSIM3v32wrdsw = value->rValue; + mod->BSIM3v32wrdswGiven = TRUE; + break; + case BSIM3v32_MOD_WPRWB: + mod->BSIM3v32wprwb = value->rValue; + mod->BSIM3v32wprwbGiven = TRUE; + break; + case BSIM3v32_MOD_WPRWG: + mod->BSIM3v32wprwg = value->rValue; + mod->BSIM3v32wprwgGiven = TRUE; + break; + case BSIM3v32_MOD_WPRT: + mod->BSIM3v32wprt = value->rValue; + mod->BSIM3v32wprtGiven = TRUE; + break; + case BSIM3v32_MOD_WETA0: + mod->BSIM3v32weta0 = value->rValue; + mod->BSIM3v32weta0Given = TRUE; + break; + case BSIM3v32_MOD_WETAB: + mod->BSIM3v32wetab = value->rValue; + mod->BSIM3v32wetabGiven = TRUE; + break; + case BSIM3v32_MOD_WPCLM: + mod->BSIM3v32wpclm = value->rValue; + mod->BSIM3v32wpclmGiven = TRUE; + break; + case BSIM3v32_MOD_WPDIBL1: + mod->BSIM3v32wpdibl1 = value->rValue; + mod->BSIM3v32wpdibl1Given = TRUE; + break; + case BSIM3v32_MOD_WPDIBL2: + mod->BSIM3v32wpdibl2 = value->rValue; + mod->BSIM3v32wpdibl2Given = TRUE; + break; + case BSIM3v32_MOD_WPDIBLB: + mod->BSIM3v32wpdiblb = value->rValue; + mod->BSIM3v32wpdiblbGiven = TRUE; + break; + case BSIM3v32_MOD_WPSCBE1: + mod->BSIM3v32wpscbe1 = value->rValue; + mod->BSIM3v32wpscbe1Given = TRUE; + break; + case BSIM3v32_MOD_WPSCBE2: + mod->BSIM3v32wpscbe2 = value->rValue; + mod->BSIM3v32wpscbe2Given = TRUE; + break; + case BSIM3v32_MOD_WPVAG: + mod->BSIM3v32wpvag = value->rValue; + mod->BSIM3v32wpvagGiven = TRUE; + break; + case BSIM3v32_MOD_WWR : + mod->BSIM3v32wwr = value->rValue; + mod->BSIM3v32wwrGiven = TRUE; + break; + case BSIM3v32_MOD_WDWG : + mod->BSIM3v32wdwg = value->rValue; + mod->BSIM3v32wdwgGiven = TRUE; + break; + case BSIM3v32_MOD_WDWB : + mod->BSIM3v32wdwb = value->rValue; + mod->BSIM3v32wdwbGiven = TRUE; + break; + case BSIM3v32_MOD_WB0 : + mod->BSIM3v32wb0 = value->rValue; + mod->BSIM3v32wb0Given = TRUE; + break; + case BSIM3v32_MOD_WB1 : + mod->BSIM3v32wb1 = value->rValue; + mod->BSIM3v32wb1Given = TRUE; + break; + case BSIM3v32_MOD_WALPHA0 : + mod->BSIM3v32walpha0 = value->rValue; + mod->BSIM3v32walpha0Given = TRUE; + break; + case BSIM3v32_MOD_WALPHA1 : + mod->BSIM3v32walpha1 = value->rValue; + mod->BSIM3v32walpha1Given = TRUE; + break; + case BSIM3v32_MOD_WBETA0 : + mod->BSIM3v32wbeta0 = value->rValue; + mod->BSIM3v32wbeta0Given = TRUE; + break; + case BSIM3v32_MOD_WVFB : + mod->BSIM3v32wvfb = value->rValue; + mod->BSIM3v32wvfbGiven = TRUE; + break; + + case BSIM3v32_MOD_WELM : + mod->BSIM3v32welm = value->rValue; + mod->BSIM3v32welmGiven = TRUE; + break; + case BSIM3v32_MOD_WCGSL : + mod->BSIM3v32wcgsl = value->rValue; + mod->BSIM3v32wcgslGiven = TRUE; + break; + case BSIM3v32_MOD_WCGDL : + mod->BSIM3v32wcgdl = value->rValue; + mod->BSIM3v32wcgdlGiven = TRUE; + break; + case BSIM3v32_MOD_WCKAPPA : + mod->BSIM3v32wckappa = value->rValue; + mod->BSIM3v32wckappaGiven = TRUE; + break; + case BSIM3v32_MOD_WCF : + mod->BSIM3v32wcf = value->rValue; + mod->BSIM3v32wcfGiven = TRUE; + break; + case BSIM3v32_MOD_WCLC : + mod->BSIM3v32wclc = value->rValue; + mod->BSIM3v32wclcGiven = TRUE; + break; + case BSIM3v32_MOD_WCLE : + mod->BSIM3v32wcle = value->rValue; + mod->BSIM3v32wcleGiven = TRUE; + break; + case BSIM3v32_MOD_WVFBCV : + mod->BSIM3v32wvfbcv = value->rValue; + mod->BSIM3v32wvfbcvGiven = TRUE; + break; + case BSIM3v32_MOD_WACDE : + mod->BSIM3v32wacde = value->rValue; + mod->BSIM3v32wacdeGiven = TRUE; + break; + case BSIM3v32_MOD_WMOIN : + mod->BSIM3v32wmoin = value->rValue; + mod->BSIM3v32wmoinGiven = TRUE; + break; + case BSIM3v32_MOD_WNOFF : + mod->BSIM3v32wnoff = value->rValue; + mod->BSIM3v32wnoffGiven = TRUE; + break; + case BSIM3v32_MOD_WVOFFCV : + mod->BSIM3v32wvoffcv = value->rValue; + mod->BSIM3v32wvoffcvGiven = TRUE; + break; + + /* Cross-term dependence */ + case BSIM3v32_MOD_PCDSC : + mod->BSIM3v32pcdsc = value->rValue; + mod->BSIM3v32pcdscGiven = TRUE; + break; + + + case BSIM3v32_MOD_PCDSCB : + mod->BSIM3v32pcdscb = value->rValue; + mod->BSIM3v32pcdscbGiven = TRUE; + break; + case BSIM3v32_MOD_PCDSCD : + mod->BSIM3v32pcdscd = value->rValue; + mod->BSIM3v32pcdscdGiven = TRUE; + break; + case BSIM3v32_MOD_PCIT : + mod->BSIM3v32pcit = value->rValue; + mod->BSIM3v32pcitGiven = TRUE; + break; + case BSIM3v32_MOD_PNFACTOR : + mod->BSIM3v32pnfactor = value->rValue; + mod->BSIM3v32pnfactorGiven = TRUE; + break; + case BSIM3v32_MOD_PXJ: + mod->BSIM3v32pxj = value->rValue; + mod->BSIM3v32pxjGiven = TRUE; + break; + case BSIM3v32_MOD_PVSAT: + mod->BSIM3v32pvsat = value->rValue; + mod->BSIM3v32pvsatGiven = TRUE; + break; + + + case BSIM3v32_MOD_PA0: + mod->BSIM3v32pa0 = value->rValue; + mod->BSIM3v32pa0Given = TRUE; + break; + case BSIM3v32_MOD_PAGS: + mod->BSIM3v32pags = value->rValue; + mod->BSIM3v32pagsGiven = TRUE; + break; + case BSIM3v32_MOD_PA1: + mod->BSIM3v32pa1 = value->rValue; + mod->BSIM3v32pa1Given = TRUE; + break; + case BSIM3v32_MOD_PA2: + mod->BSIM3v32pa2 = value->rValue; + mod->BSIM3v32pa2Given = TRUE; + break; + case BSIM3v32_MOD_PAT: + mod->BSIM3v32pat = value->rValue; + mod->BSIM3v32patGiven = TRUE; + break; + case BSIM3v32_MOD_PKETA: + mod->BSIM3v32pketa = value->rValue; + mod->BSIM3v32pketaGiven = TRUE; + break; + case BSIM3v32_MOD_PNSUB: + mod->BSIM3v32pnsub = value->rValue; + mod->BSIM3v32pnsubGiven = TRUE; + break; + case BSIM3v32_MOD_PNPEAK: + mod->BSIM3v32pnpeak = value->rValue; + mod->BSIM3v32pnpeakGiven = TRUE; + if (mod->BSIM3v32pnpeak > 1.0e20) + mod->BSIM3v32pnpeak *= 1.0e-6; + break; + case BSIM3v32_MOD_PNGATE: + mod->BSIM3v32pngate = value->rValue; + mod->BSIM3v32pngateGiven = TRUE; + if (mod->BSIM3v32pngate > 1.0e23) + mod->BSIM3v32pngate *= 1.0e-6; + break; + case BSIM3v32_MOD_PGAMMA1: + mod->BSIM3v32pgamma1 = value->rValue; + mod->BSIM3v32pgamma1Given = TRUE; + break; + case BSIM3v32_MOD_PGAMMA2: + mod->BSIM3v32pgamma2 = value->rValue; + mod->BSIM3v32pgamma2Given = TRUE; + break; + case BSIM3v32_MOD_PVBX: + mod->BSIM3v32pvbx = value->rValue; + mod->BSIM3v32pvbxGiven = TRUE; + break; + case BSIM3v32_MOD_PVBM: + mod->BSIM3v32pvbm = value->rValue; + mod->BSIM3v32pvbmGiven = TRUE; + break; + case BSIM3v32_MOD_PXT: + mod->BSIM3v32pxt = value->rValue; + mod->BSIM3v32pxtGiven = TRUE; + break; + case BSIM3v32_MOD_PK1: + mod->BSIM3v32pk1 = value->rValue; + mod->BSIM3v32pk1Given = TRUE; + break; + case BSIM3v32_MOD_PKT1: + mod->BSIM3v32pkt1 = value->rValue; + mod->BSIM3v32pkt1Given = TRUE; + break; + case BSIM3v32_MOD_PKT1L: + mod->BSIM3v32pkt1l = value->rValue; + mod->BSIM3v32pkt1lGiven = TRUE; + break; + case BSIM3v32_MOD_PKT2: + mod->BSIM3v32pkt2 = value->rValue; + mod->BSIM3v32pkt2Given = TRUE; + break; + case BSIM3v32_MOD_PK2: + mod->BSIM3v32pk2 = value->rValue; + mod->BSIM3v32pk2Given = TRUE; + break; + case BSIM3v32_MOD_PK3: + mod->BSIM3v32pk3 = value->rValue; + mod->BSIM3v32pk3Given = TRUE; + break; + case BSIM3v32_MOD_PK3B: + mod->BSIM3v32pk3b = value->rValue; + mod->BSIM3v32pk3bGiven = TRUE; + break; + case BSIM3v32_MOD_PNLX: + mod->BSIM3v32pnlx = value->rValue; + mod->BSIM3v32pnlxGiven = TRUE; + break; + case BSIM3v32_MOD_PW0: + mod->BSIM3v32pw0 = value->rValue; + mod->BSIM3v32pw0Given = TRUE; + break; + case BSIM3v32_MOD_PDVT0: + mod->BSIM3v32pdvt0 = value->rValue; + mod->BSIM3v32pdvt0Given = TRUE; + break; + case BSIM3v32_MOD_PDVT1: + mod->BSIM3v32pdvt1 = value->rValue; + mod->BSIM3v32pdvt1Given = TRUE; + break; + case BSIM3v32_MOD_PDVT2: + mod->BSIM3v32pdvt2 = value->rValue; + mod->BSIM3v32pdvt2Given = TRUE; + break; + case BSIM3v32_MOD_PDVT0W: + mod->BSIM3v32pdvt0w = value->rValue; + mod->BSIM3v32pdvt0wGiven = TRUE; + break; + case BSIM3v32_MOD_PDVT1W: + mod->BSIM3v32pdvt1w = value->rValue; + mod->BSIM3v32pdvt1wGiven = TRUE; + break; + case BSIM3v32_MOD_PDVT2W: + mod->BSIM3v32pdvt2w = value->rValue; + mod->BSIM3v32pdvt2wGiven = TRUE; + break; + case BSIM3v32_MOD_PDROUT: + mod->BSIM3v32pdrout = value->rValue; + mod->BSIM3v32pdroutGiven = TRUE; + break; + case BSIM3v32_MOD_PDSUB: + mod->BSIM3v32pdsub = value->rValue; + mod->BSIM3v32pdsubGiven = TRUE; + break; + case BSIM3v32_MOD_PVTH0: + mod->BSIM3v32pvth0 = value->rValue; + mod->BSIM3v32pvth0Given = TRUE; + break; + case BSIM3v32_MOD_PUA: + mod->BSIM3v32pua = value->rValue; + mod->BSIM3v32puaGiven = TRUE; + break; + case BSIM3v32_MOD_PUA1: + mod->BSIM3v32pua1 = value->rValue; + mod->BSIM3v32pua1Given = TRUE; + break; + case BSIM3v32_MOD_PUB: + mod->BSIM3v32pub = value->rValue; + mod->BSIM3v32pubGiven = TRUE; + break; + case BSIM3v32_MOD_PUB1: + mod->BSIM3v32pub1 = value->rValue; + mod->BSIM3v32pub1Given = TRUE; + break; + case BSIM3v32_MOD_PUC: + mod->BSIM3v32puc = value->rValue; + mod->BSIM3v32pucGiven = TRUE; + break; + case BSIM3v32_MOD_PUC1: + mod->BSIM3v32puc1 = value->rValue; + mod->BSIM3v32puc1Given = TRUE; + break; + case BSIM3v32_MOD_PU0 : + mod->BSIM3v32pu0 = value->rValue; + mod->BSIM3v32pu0Given = TRUE; + break; + case BSIM3v32_MOD_PUTE : + mod->BSIM3v32pute = value->rValue; + mod->BSIM3v32puteGiven = TRUE; + break; + case BSIM3v32_MOD_PVOFF: + mod->BSIM3v32pvoff = value->rValue; + mod->BSIM3v32pvoffGiven = TRUE; + break; + case BSIM3v32_MOD_PDELTA : + mod->BSIM3v32pdelta = value->rValue; + mod->BSIM3v32pdeltaGiven = TRUE; + break; + case BSIM3v32_MOD_PRDSW: + mod->BSIM3v32prdsw = value->rValue; + mod->BSIM3v32prdswGiven = TRUE; + break; + case BSIM3v32_MOD_PPRWB: + mod->BSIM3v32pprwb = value->rValue; + mod->BSIM3v32pprwbGiven = TRUE; + break; + case BSIM3v32_MOD_PPRWG: + mod->BSIM3v32pprwg = value->rValue; + mod->BSIM3v32pprwgGiven = TRUE; + break; + case BSIM3v32_MOD_PPRT: + mod->BSIM3v32pprt = value->rValue; + mod->BSIM3v32pprtGiven = TRUE; + break; + case BSIM3v32_MOD_PETA0: + mod->BSIM3v32peta0 = value->rValue; + mod->BSIM3v32peta0Given = TRUE; + break; + case BSIM3v32_MOD_PETAB: + mod->BSIM3v32petab = value->rValue; + mod->BSIM3v32petabGiven = TRUE; + break; + case BSIM3v32_MOD_PPCLM: + mod->BSIM3v32ppclm = value->rValue; + mod->BSIM3v32ppclmGiven = TRUE; + break; + case BSIM3v32_MOD_PPDIBL1: + mod->BSIM3v32ppdibl1 = value->rValue; + mod->BSIM3v32ppdibl1Given = TRUE; + break; + case BSIM3v32_MOD_PPDIBL2: + mod->BSIM3v32ppdibl2 = value->rValue; + mod->BSIM3v32ppdibl2Given = TRUE; + break; + case BSIM3v32_MOD_PPDIBLB: + mod->BSIM3v32ppdiblb = value->rValue; + mod->BSIM3v32ppdiblbGiven = TRUE; + break; + case BSIM3v32_MOD_PPSCBE1: + mod->BSIM3v32ppscbe1 = value->rValue; + mod->BSIM3v32ppscbe1Given = TRUE; + break; + case BSIM3v32_MOD_PPSCBE2: + mod->BSIM3v32ppscbe2 = value->rValue; + mod->BSIM3v32ppscbe2Given = TRUE; + break; + case BSIM3v32_MOD_PPVAG: + mod->BSIM3v32ppvag = value->rValue; + mod->BSIM3v32ppvagGiven = TRUE; + break; + case BSIM3v32_MOD_PWR : + mod->BSIM3v32pwr = value->rValue; + mod->BSIM3v32pwrGiven = TRUE; + break; + case BSIM3v32_MOD_PDWG : + mod->BSIM3v32pdwg = value->rValue; + mod->BSIM3v32pdwgGiven = TRUE; + break; + case BSIM3v32_MOD_PDWB : + mod->BSIM3v32pdwb = value->rValue; + mod->BSIM3v32pdwbGiven = TRUE; + break; + case BSIM3v32_MOD_PB0 : + mod->BSIM3v32pb0 = value->rValue; + mod->BSIM3v32pb0Given = TRUE; + break; + case BSIM3v32_MOD_PB1 : + mod->BSIM3v32pb1 = value->rValue; + mod->BSIM3v32pb1Given = TRUE; + break; + case BSIM3v32_MOD_PALPHA0 : + mod->BSIM3v32palpha0 = value->rValue; + mod->BSIM3v32palpha0Given = TRUE; + break; + case BSIM3v32_MOD_PALPHA1 : + mod->BSIM3v32palpha1 = value->rValue; + mod->BSIM3v32palpha1Given = TRUE; + break; + case BSIM3v32_MOD_PBETA0 : + mod->BSIM3v32pbeta0 = value->rValue; + mod->BSIM3v32pbeta0Given = TRUE; + break; + case BSIM3v32_MOD_PVFB : + mod->BSIM3v32pvfb = value->rValue; + mod->BSIM3v32pvfbGiven = TRUE; + break; + + case BSIM3v32_MOD_PELM : + mod->BSIM3v32pelm = value->rValue; + mod->BSIM3v32pelmGiven = TRUE; + break; + case BSIM3v32_MOD_PCGSL : + mod->BSIM3v32pcgsl = value->rValue; + mod->BSIM3v32pcgslGiven = TRUE; + break; + case BSIM3v32_MOD_PCGDL : + mod->BSIM3v32pcgdl = value->rValue; + mod->BSIM3v32pcgdlGiven = TRUE; + break; + case BSIM3v32_MOD_PCKAPPA : + mod->BSIM3v32pckappa = value->rValue; + mod->BSIM3v32pckappaGiven = TRUE; + break; + case BSIM3v32_MOD_PCF : + mod->BSIM3v32pcf = value->rValue; + mod->BSIM3v32pcfGiven = TRUE; + break; + case BSIM3v32_MOD_PCLC : + mod->BSIM3v32pclc = value->rValue; + mod->BSIM3v32pclcGiven = TRUE; + break; + case BSIM3v32_MOD_PCLE : + mod->BSIM3v32pcle = value->rValue; + mod->BSIM3v32pcleGiven = TRUE; + break; + case BSIM3v32_MOD_PVFBCV : + mod->BSIM3v32pvfbcv = value->rValue; + mod->BSIM3v32pvfbcvGiven = TRUE; + break; + case BSIM3v32_MOD_PACDE : + mod->BSIM3v32pacde = value->rValue; + mod->BSIM3v32pacdeGiven = TRUE; + break; + case BSIM3v32_MOD_PMOIN : + mod->BSIM3v32pmoin = value->rValue; + mod->BSIM3v32pmoinGiven = TRUE; + break; + case BSIM3v32_MOD_PNOFF : + mod->BSIM3v32pnoff = value->rValue; + mod->BSIM3v32pnoffGiven = TRUE; + break; + case BSIM3v32_MOD_PVOFFCV : + mod->BSIM3v32pvoffcv = value->rValue; + mod->BSIM3v32pvoffcvGiven = TRUE; + break; + + case BSIM3v32_MOD_TNOM : + mod->BSIM3v32tnom = value->rValue + CONSTCtoK; + mod->BSIM3v32tnomGiven = TRUE; + break; + case BSIM3v32_MOD_CGSO : + mod->BSIM3v32cgso = value->rValue; + mod->BSIM3v32cgsoGiven = TRUE; + break; + case BSIM3v32_MOD_CGDO : + mod->BSIM3v32cgdo = value->rValue; + mod->BSIM3v32cgdoGiven = TRUE; + break; + case BSIM3v32_MOD_CGBO : + mod->BSIM3v32cgbo = value->rValue; + mod->BSIM3v32cgboGiven = TRUE; + break; + case BSIM3v32_MOD_XPART : + mod->BSIM3v32xpart = value->rValue; + mod->BSIM3v32xpartGiven = TRUE; + break; + case BSIM3v32_MOD_RSH : + mod->BSIM3v32sheetResistance = value->rValue; + mod->BSIM3v32sheetResistanceGiven = TRUE; + break; + case BSIM3v32_MOD_JS : + mod->BSIM3v32jctSatCurDensity = value->rValue; + mod->BSIM3v32jctSatCurDensityGiven = TRUE; + break; + case BSIM3v32_MOD_JSW : + mod->BSIM3v32jctSidewallSatCurDensity = value->rValue; + mod->BSIM3v32jctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM3v32_MOD_PB : + mod->BSIM3v32bulkJctPotential = value->rValue; + mod->BSIM3v32bulkJctPotentialGiven = TRUE; + break; + case BSIM3v32_MOD_MJ : + mod->BSIM3v32bulkJctBotGradingCoeff = value->rValue; + mod->BSIM3v32bulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM3v32_MOD_PBSW : + mod->BSIM3v32sidewallJctPotential = value->rValue; + mod->BSIM3v32sidewallJctPotentialGiven = TRUE; + break; + case BSIM3v32_MOD_MJSW : + mod->BSIM3v32bulkJctSideGradingCoeff = value->rValue; + mod->BSIM3v32bulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM3v32_MOD_CJ : + mod->BSIM3v32unitAreaJctCap = value->rValue; + mod->BSIM3v32unitAreaJctCapGiven = TRUE; + break; + case BSIM3v32_MOD_CJSW : + mod->BSIM3v32unitLengthSidewallJctCap = value->rValue; + mod->BSIM3v32unitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM3v32_MOD_NJ : + mod->BSIM3v32jctEmissionCoeff = value->rValue; + mod->BSIM3v32jctEmissionCoeffGiven = TRUE; + break; + case BSIM3v32_MOD_PBSWG : + mod->BSIM3v32GatesidewallJctPotential = value->rValue; + mod->BSIM3v32GatesidewallJctPotentialGiven = TRUE; + break; + case BSIM3v32_MOD_MJSWG : + mod->BSIM3v32bulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM3v32bulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM3v32_MOD_CJSWG : + mod->BSIM3v32unitLengthGateSidewallJctCap = value->rValue; + mod->BSIM3v32unitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM3v32_MOD_XTI : + mod->BSIM3v32jctTempExponent = value->rValue; + mod->BSIM3v32jctTempExponentGiven = TRUE; + break; + case BSIM3v32_MOD_LINT : + mod->BSIM3v32Lint = value->rValue; + mod->BSIM3v32LintGiven = TRUE; + break; + case BSIM3v32_MOD_LL : + mod->BSIM3v32Ll = value->rValue; + mod->BSIM3v32LlGiven = TRUE; + break; + case BSIM3v32_MOD_LLC : + mod->BSIM3v32Llc = value->rValue; + mod->BSIM3v32LlcGiven = TRUE; + break; + case BSIM3v32_MOD_LLN : + mod->BSIM3v32Lln = value->rValue; + mod->BSIM3v32LlnGiven = TRUE; + break; + case BSIM3v32_MOD_LW : + mod->BSIM3v32Lw = value->rValue; + mod->BSIM3v32LwGiven = TRUE; + break; + case BSIM3v32_MOD_LWC : + mod->BSIM3v32Lwc = value->rValue; + mod->BSIM3v32LwcGiven = TRUE; + break; + case BSIM3v32_MOD_LWN : + mod->BSIM3v32Lwn = value->rValue; + mod->BSIM3v32LwnGiven = TRUE; + break; + case BSIM3v32_MOD_LWL : + mod->BSIM3v32Lwl = value->rValue; + mod->BSIM3v32LwlGiven = TRUE; + break; + case BSIM3v32_MOD_LWLC : + mod->BSIM3v32Lwlc = value->rValue; + mod->BSIM3v32LwlcGiven = TRUE; + break; + case BSIM3v32_MOD_LMIN : + mod->BSIM3v32Lmin = value->rValue; + mod->BSIM3v32LminGiven = TRUE; + break; + case BSIM3v32_MOD_LMAX : + mod->BSIM3v32Lmax = value->rValue; + mod->BSIM3v32LmaxGiven = TRUE; + break; + case BSIM3v32_MOD_WINT : + mod->BSIM3v32Wint = value->rValue; + mod->BSIM3v32WintGiven = TRUE; + break; + case BSIM3v32_MOD_WL : + mod->BSIM3v32Wl = value->rValue; + mod->BSIM3v32WlGiven = TRUE; + break; + case BSIM3v32_MOD_WLC : + mod->BSIM3v32Wlc = value->rValue; + mod->BSIM3v32WlcGiven = TRUE; + break; + case BSIM3v32_MOD_WLN : + mod->BSIM3v32Wln = value->rValue; + mod->BSIM3v32WlnGiven = TRUE; + break; + case BSIM3v32_MOD_WW : + mod->BSIM3v32Ww = value->rValue; + mod->BSIM3v32WwGiven = TRUE; + break; + case BSIM3v32_MOD_WWC : + mod->BSIM3v32Wwc = value->rValue; + mod->BSIM3v32WwcGiven = TRUE; + break; + case BSIM3v32_MOD_WWN : + mod->BSIM3v32Wwn = value->rValue; + mod->BSIM3v32WwnGiven = TRUE; + break; + case BSIM3v32_MOD_WWL : + mod->BSIM3v32Wwl = value->rValue; + mod->BSIM3v32WwlGiven = TRUE; + break; + case BSIM3v32_MOD_WWLC : + mod->BSIM3v32Wwlc = value->rValue; + mod->BSIM3v32WwlcGiven = TRUE; + break; + case BSIM3v32_MOD_WMIN : + mod->BSIM3v32Wmin = value->rValue; + mod->BSIM3v32WminGiven = TRUE; + break; + case BSIM3v32_MOD_WMAX : + mod->BSIM3v32Wmax = value->rValue; + mod->BSIM3v32WmaxGiven = TRUE; + break; + + case BSIM3v32_MOD_XL: + mod->BSIM3v32xl = value->rValue; + mod->BSIM3v32xlGiven = TRUE; + break; + case BSIM3v32_MOD_XW: + mod->BSIM3v32xw = value->rValue; + mod->BSIM3v32xwGiven = TRUE; + break; + + case BSIM3v32_MOD_NOIA : + mod->BSIM3v32oxideTrapDensityA = value->rValue; + mod->BSIM3v32oxideTrapDensityAGiven = TRUE; + break; + case BSIM3v32_MOD_NOIB : + mod->BSIM3v32oxideTrapDensityB = value->rValue; + mod->BSIM3v32oxideTrapDensityBGiven = TRUE; + break; + case BSIM3v32_MOD_NOIC : + mod->BSIM3v32oxideTrapDensityC = value->rValue; + mod->BSIM3v32oxideTrapDensityCGiven = TRUE; + break; + case BSIM3v32_MOD_EM : + mod->BSIM3v32em = value->rValue; + mod->BSIM3v32emGiven = TRUE; + break; + case BSIM3v32_MOD_EF : + mod->BSIM3v32ef = value->rValue; + mod->BSIM3v32efGiven = TRUE; + break; + case BSIM3v32_MOD_AF : + mod->BSIM3v32af = value->rValue; + mod->BSIM3v32afGiven = TRUE; + break; + case BSIM3v32_MOD_KF : + mod->BSIM3v32kf = value->rValue; + mod->BSIM3v32kfGiven = TRUE; + break; + case BSIM3v32_MOD_NMOS : + if(value->iValue) { + mod->BSIM3v32type = 1; + mod->BSIM3v32typeGiven = TRUE; + } + break; + case BSIM3v32_MOD_PMOS : + if(value->iValue) { + mod->BSIM3v32type = - 1; + mod->BSIM3v32typeGiven = TRUE; + } + break; + default: + return(E_BADPARM); + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim3v32/b3v32noi.c b/src/spicelib/devices/bsim3v32/b3v32noi.c new file mode 100644 index 000000000..a2020a7aa --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32noi.c @@ -0,0 +1,505 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3noi.c of BSIM3v3.2.4 + * Author: 1995 Gary W. Ng and Min-Chie Jeng. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Xuemei Xi, 10/05, 12/21, 2001. + * Modified bt Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "bsim3v32def.h" +#include "cktdefs.h" +#include "iferrmsg.h" +#include "noisedef.h" +#include "suffix.h" +#include "const.h" /* jwan */ + +/* + * BSIM3v32noise (mode, operation, firstModel, ckt, data, OnDens) + * This routine names and evaluates all of the noise sources + * associated with MOSFET's. It starts with the model *firstModel and + * traverses all of its insts. It then proceeds to any other models + * on the linked list. The total output noise density generated by + * all of the MOSFET's is summed with the variable "OnDens". + */ + +/* + Channel thermal and flicker noises are calculated based on the value + of model->BSIM3v32noiMod. + If model->BSIM3v32noiMod = 1, + Channel thermal noise = SPICE2 model + Flicker noise = SPICE2 model + If model->BSIM3v32noiMod = 2, + Channel thermal noise = BSIM3v32 model + Flicker noise = BSIM3v32 model + If model->BSIM3v32noiMod = 3, + Channel thermal noise = SPICE2 model + Flicker noise = BSIM3v32 model + If model->BSIM3v32noiMod = 4, + Channel thermal noise = BSIM3v32 model + Flicker noise = SPICE2 model + */ + +extern void NevalSrc(); +extern double Nintegrate(); + +/* + * The StrongInversionNoiseEval function has been modified in + * the release 3.2.4 of BSIM3v32 model. To accomodate both the old + * and the new code, I have renamed according to the following: + * + * + * BSIM3v3.2.4 -> StrongInversionNoiseEvalNew + * Previous -> StrongInversionNoiseEvalOld + * + * 2002 Paolo Nenzi + */ + +/* + * JX: 1/f noise model is smoothed out 12/18/01. + */ + +double +StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model, + BSIM3v32instance *here, double freq, double temp) +{ +struct bsim3SizeDependParam *pParam; +double cd, esat, DelClm, EffFreq, N0, Nl; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi; + + pParam = here->pParam; + cd = fabs(here->BSIM3v32cd); + esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; + if(model->BSIM3v32em<=0.0) DelClm = 0.0; + else { + T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl) + + model->BSIM3v32em) / esat); + DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG)); + } + EffFreq = pow(freq, model->BSIM3v32ef); + T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v32ueff; + T2 = 1.0e8 * EffFreq * here->BSIM3v32Abulk * model->BSIM3v32cox + * pParam->BSIM3v32leff * pParam->BSIM3v32leff; + N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE; + Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff + * (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE; + + T3 = model->BSIM3v32oxideTrapDensityA + * log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG)); + T4 = model->BSIM3v32oxideTrapDensityB * (N0 - Nl); + T5 = model->BSIM3v32oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); + + T6 = 8.62e-5 * temp * cd * cd; + T7 = 1.0e8 * EffFreq * pParam->BSIM3v32leff + * pParam->BSIM3v32leff * pParam->BSIM3v32weff; + T8 = model->BSIM3v32oxideTrapDensityA + model->BSIM3v32oxideTrapDensityB * Nl + + model->BSIM3v32oxideTrapDensityC * Nl * Nl; + T9 = (Nl + 2.0e14) * (Nl + 2.0e14); + + Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; + return Ssi; +} + +/* + * The code for releases: BSIM3V32, BSIM3V322, BSIM3V323 + * follows + */ + +double +StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model, + BSIM3v32instance *here, double freq, double temp) +{ + struct bsim3SizeDependParam *pParam; + double cd, esat, DelClm, EffFreq, N0, Nl, Vgst; + double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi; + + pParam = here->pParam; + cd = fabs (here->BSIM3v32cd); + /* Added revision dependent code */ + if (model->BSIM3v32intVersion < BSIM3v32V323) + { + if (vds > here->BSIM3v32vdsat) + { + esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; + T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) + + model->BSIM3v32em) / esat); + DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG)); + } + else + DelClm = 0.0; + } + else + { + if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */ + DelClm = 0.0; + else if (vds > here->BSIM3v32vdsat) + { + esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; + T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) + + model->BSIM3v32em) / esat); + DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG)); + } + else + DelClm = 0.0; + } + EffFreq = pow (freq, model->BSIM3v32ef); + T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v32ueff; + T2 = 1.0e8 * EffFreq * model->BSIM3v32cox + * pParam->BSIM3v32leff * pParam->BSIM3v32leff; + Vgst = vgs - here->BSIM3v32von; + N0 = model->BSIM3v32cox * Vgst / CHARGE; + if (N0 < 0.0) + N0 = 0.0; + Nl = model->BSIM3v32cox * (Vgst - MIN (vds, here->BSIM3v32vdsat)) / CHARGE; + if (Nl < 0.0) + Nl = 0.0; + + T3 = model->BSIM3v32oxideTrapDensityA + * log (MAX (((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG)); + T4 = model->BSIM3v32oxideTrapDensityB * (N0 - Nl); + T5 = model->BSIM3v32oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); + + T6 = 8.62e-5 * temp * cd * cd; + T7 = 1.0e8 * EffFreq * pParam->BSIM3v32leff + * pParam->BSIM3v32leff * pParam->BSIM3v32weff; + T8 = model->BSIM3v32oxideTrapDensityA + model->BSIM3v32oxideTrapDensityB * Nl + + model->BSIM3v32oxideTrapDensityC * Nl * Nl; + T9 = (Nl + 2.0e14) * (Nl + 2.0e14); + + Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; + return Ssi; +} + + + +int +BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt, + Ndata *data, double *OnDens) +{ +BSIM3v32model *model = (BSIM3v32model *)inModel; +BSIM3v32instance *here; +struct bsim3SizeDependParam *pParam; +char name[N_MXVLNTH]; +double tempOnoise; +double tempInoise; +double noizDens[BSIM3v32NSRCS]; +double lnNdens[BSIM3v32NSRCS]; + +double vgs, vds, Slimit; +double T1, T10, T11; +double Ssi, Swi; + +double m; + +int i; + + /* define the names of the noise sources */ + static char *BSIM3v32nNames[BSIM3v32NSRCS] = + { /* Note that we have to keep the order */ + ".rd", /* noise due to rd */ + /* consistent with the index definitions */ + ".rs", /* noise due to rs */ + /* in BSIM3v32defs.h */ + ".id", /* noise due to id */ + ".1overf", /* flicker (1/f) noise */ + "" /* total transistor noise */ + }; + + for (; model != NULL; model = model->BSIM3v32nextModel) + { for (here = model->BSIM3v32instances; here != NULL; + here = here->BSIM3v32nextInstance) + { pParam = here->pParam; + switch (operation) + { case N_OPEN: + /* see if we have to to produce a summary report */ + /* if so, name all the noise generators */ + + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { switch (mode) + { case N_DENS: + for (i = 0; i < BSIM3v32NSRCS; i++) + { (void) sprintf(name, "onoise.%s%s", + here->BSIM3v32name, + BSIM3v32nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + } + break; + case INT_NOIZ: + for (i = 0; i < BSIM3v32NSRCS; i++) + { (void) sprintf(name, "onoise_total.%s%s", + here->BSIM3v32name, + BSIM3v32nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + + (void) sprintf(name, "inoise_total.%s%s", + here->BSIM3v32name, + BSIM3v32nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **)NULL); + /* we've added one more plot */ + } + break; + } + } + break; + case N_CALC: + m = here->BSIM3v32m; + switch (mode) + { case N_DENS: + NevalSrc(&noizDens[BSIM3v32RDNOIZ], + &lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE, + here->BSIM3v32dNodePrime, here->BSIM3v32dNode, + here->BSIM3v32drainConductance * m); + + NevalSrc(&noizDens[BSIM3v32RSNOIZ], + &lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE, + here->BSIM3v32sNodePrime, here->BSIM3v32sNode, + here->BSIM3v32sourceConductance * m); + + switch( model->BSIM3v32noiMod ) + { case 1: + case 3: + NevalSrc(&noizDens[BSIM3v32IDNOIZ], + &lnNdens[BSIM3v32IDNOIZ], ckt, + THERMNOISE, here->BSIM3v32dNodePrime, + here->BSIM3v32sNodePrime, + (2.0 / 3.0 * fabs(here->BSIM3v32gm + + here->BSIM3v32gds + + here->BSIM3v32gmbs)) * m); + break; + case 2: + case 4: + /* Added revision dependent code */ + if (model->BSIM3v32intVersion == BSIM3v32V324) + { + NevalSrc(&noizDens[BSIM3v32IDNOIZ], + &lnNdens[BSIM3v32IDNOIZ], ckt, + THERMNOISE, here->BSIM3v32dNodePrime, + here->BSIM3v32sNodePrime, + (m * here->BSIM3v32ueff + * fabs(here->BSIM3v32qinv) + / (pParam->BSIM3v32leff * pParam->BSIM3v32leff + + here->BSIM3v32ueff * fabs(here->BSIM3v32qinv) + * here->BSIM3v32rds))); /* bugfix */ + } + else + { /* for all versions lower then 3.2.4 */ + NevalSrc(&noizDens[BSIM3v32IDNOIZ], + &lnNdens[BSIM3v32IDNOIZ], ckt, + THERMNOISE, here->BSIM3v32dNodePrime, + here->BSIM3v32sNodePrime, + (m * here->BSIM3v32ueff + * fabs(here->BSIM3v32qinv + / (pParam->BSIM3v32leff + * pParam->BSIM3v32leff)))); + } + break; + } + NevalSrc(&noizDens[BSIM3v32FLNOIZ], (double*) NULL, + ckt, N_GAIN, here->BSIM3v32dNodePrime, + here->BSIM3v32sNodePrime, (double) 0.0); + + switch( model->BSIM3v32noiMod ) + { case 1: + case 4: + noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf + * exp(model->BSIM3v32af + * log(MAX(fabs(here->BSIM3v32cd), + N_MINLOG))) + / (pow(data->freq, model->BSIM3v32ef) + * pParam->BSIM3v32leff + * pParam->BSIM3v32leff + * model->BSIM3v32cox); + break; + case 2: + case 3: + vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs); + vds = *(ckt->CKTstates[0] + here->BSIM3v32vds); + if (vds < 0.0) + { vds = -vds; + vgs = vgs + vds; + } + /* Added revision dependent code */ + if (model->BSIM3v32intVersion == BSIM3v32V324) + { + Ssi = StrongInversionNoiseEvalNew(vds, model, + here, data->freq, ckt->CKTtemp); + T10 = model->BSIM3v32oxideTrapDensityA + * 8.62e-5 * ckt->CKTtemp; + T11 = pParam->BSIM3v32weff + * pParam->BSIM3v32leff + * pow(data->freq, model->BSIM3v32ef) + * 4.0e36; + Swi = T10 / T11 * here->BSIM3v32cd + * here->BSIM3v32cd; + T1 = Swi + Ssi; + if (T1 > 0.0) + noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1; + else + noizDens[BSIM3v32FLNOIZ] *= 0.0; + } + else + { /* for all versions lower then 3.2.4 */ + if (vgs >= here->BSIM3v32von + 0.1) + { + Ssi = StrongInversionNoiseEvalOld(vgs, vds, model, + here, data->freq, ckt->CKTtemp); + noizDens[BSIM3v32FLNOIZ] *= m * Ssi; + } + else + { + pParam = here->pParam; + T10 = model->BSIM3v32oxideTrapDensityA + * 8.62e-5 * ckt->CKTtemp; + T11 = pParam->BSIM3v32weff + * pParam-> BSIM3v32leff + * pow (data->freq, model->BSIM3v32ef) + * 4.0e36; + Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd; + + Slimit = StrongInversionNoiseEvalOld( + here->BSIM3v32von + 0.1, vds, model, + here, data->freq, ckt->CKTtemp); + T1 = Swi + Slimit; + if (T1 > 0.0) + noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1; + else + noizDens[BSIM3v32FLNOIZ] *= 0.0; + } + } + break; + } + + lnNdens[BSIM3v32FLNOIZ] = + log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG)); + + noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ] + + noizDens[BSIM3v32RSNOIZ] + + noizDens[BSIM3v32IDNOIZ] + + noizDens[BSIM3v32FLNOIZ]; + lnNdens[BSIM3v32TOTNOIZ] = + log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG)); + + *OnDens += noizDens[BSIM3v32TOTNOIZ]; + + if (data->delFreq == 0.0) + { /* if we haven't done any previous + integration, we need to initialize our + "history" variables. + */ + + for (i = 0; i < BSIM3v32NSRCS; i++) + { here->BSIM3v32nVar[LNLSTDENS][i] = + lnNdens[i]; + } + + /* clear out our integration variables + if it's the first pass + */ + if (data->freq == + ((NOISEAN*) ckt->CKTcurJob)->NstartFreq) + { for (i = 0; i < BSIM3v32NSRCS; i++) + { here->BSIM3v32nVar[OUTNOIZ][i] = 0.0; + here->BSIM3v32nVar[INNOIZ][i] = 0.0; + } + } + } + else + { /* data->delFreq != 0.0, + we have to integrate. + */ + for (i = 0; i < BSIM3v32NSRCS; i++) + { if (i != BSIM3v32TOTNOIZ) + { tempOnoise = Nintegrate(noizDens[i], + lnNdens[i], + here->BSIM3v32nVar[LNLSTDENS][i], + data); + tempInoise = Nintegrate(noizDens[i] + * data->GainSqInv, lnNdens[i] + + data->lnGainInv, + here->BSIM3v32nVar[LNLSTDENS][i] + + data->lnGainInv, data); + here->BSIM3v32nVar[LNLSTDENS][i] = + lnNdens[i]; + data->outNoiz += tempOnoise; + data->inNoise += tempInoise; + if (((NOISEAN*) + ckt->CKTcurJob)->NStpsSm != 0) + { here->BSIM3v32nVar[OUTNOIZ][i] + += tempOnoise; + here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ] + += tempOnoise; + here->BSIM3v32nVar[INNOIZ][i] + += tempInoise; + here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ] + += tempInoise; + } + } + } + } + if (data->prtSummary) + { for (i = 0; i < BSIM3v32NSRCS; i++) + { /* print a summary report */ + data->outpVector[data->outNumber++] + = noizDens[i]; + } + } + break; + case INT_NOIZ: + /* already calculated, just output */ + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { for (i = 0; i < BSIM3v32NSRCS; i++) + { data->outpVector[data->outNumber++] + = here->BSIM3v32nVar[OUTNOIZ][i]; + data->outpVector[data->outNumber++] + = here->BSIM3v32nVar[INNOIZ][i]; + } + } + break; + } + break; + case N_CLOSE: + /* do nothing, the main calling routine will close */ + return (OK); + break; /* the plots */ + } /* switch (operation) */ + } /* for here */ + } /* for model */ + + return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v32/b3v32par.c b/src/spicelib/devices/bsim3v32/b3v32par.c new file mode 100644 index 000000000..dad48b501 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32par.c @@ -0,0 +1,106 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3par.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" +#include "fteext.h" + +int +BSIM3v32param (int param, IFvalue *value, GENinstance *inst, IFvalue *select) +{ + double scale; + + if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1; + + BSIM3v32instance *here = (BSIM3v32instance*)inst; + switch(param) + { case BSIM3v32_W: + here->BSIM3v32w = value->rValue*scale; + here->BSIM3v32wGiven = TRUE; + break; + case BSIM3v32_L: + here->BSIM3v32l = value->rValue*scale; + here->BSIM3v32lGiven = TRUE; + break; + case BSIM3v32_M: + here->BSIM3v32m = value->rValue; + here->BSIM3v32mGiven = TRUE; + break; + case BSIM3v32_AS: + here->BSIM3v32sourceArea = value->rValue*scale*scale; + here->BSIM3v32sourceAreaGiven = TRUE; + break; + case BSIM3v32_AD: + here->BSIM3v32drainArea = value->rValue*scale*scale; + here->BSIM3v32drainAreaGiven = TRUE; + break; + case BSIM3v32_PS: + here->BSIM3v32sourcePerimeter = value->rValue*scale; + here->BSIM3v32sourcePerimeterGiven = TRUE; + break; + case BSIM3v32_PD: + here->BSIM3v32drainPerimeter = value->rValue*scale; + here->BSIM3v32drainPerimeterGiven = TRUE; + break; + case BSIM3v32_NRS: + here->BSIM3v32sourceSquares = value->rValue; + here->BSIM3v32sourceSquaresGiven = TRUE; + break; + case BSIM3v32_NRD: + here->BSIM3v32drainSquares = value->rValue; + here->BSIM3v32drainSquaresGiven = TRUE; + break; + case BSIM3v32_OFF: + here->BSIM3v32off = value->iValue; + break; + case BSIM3v32_IC_VBS: + here->BSIM3v32icVBS = value->rValue; + here->BSIM3v32icVBSGiven = TRUE; + break; + case BSIM3v32_IC_VDS: + here->BSIM3v32icVDS = value->rValue; + here->BSIM3v32icVDSGiven = TRUE; + break; + case BSIM3v32_IC_VGS: + here->BSIM3v32icVGS = value->rValue; + here->BSIM3v32icVGSGiven = TRUE; + break; + case BSIM3v32_NQSMOD: + here->BSIM3v32nqsMod = value->iValue; + here->BSIM3v32nqsModGiven = TRUE; + break; + case BSIM3v32_IC: + switch(value->v.numValue){ + case 3: + here->BSIM3v32icVBS = *(value->v.vec.rVec+2); + here->BSIM3v32icVBSGiven = TRUE; + case 2: + here->BSIM3v32icVGS = *(value->v.vec.rVec+1); + here->BSIM3v32icVGSGiven = TRUE; + case 1: + here->BSIM3v32icVDS = *(value->v.vec.rVec); + here->BSIM3v32icVDSGiven = TRUE; + break; + default: + return(E_BADPARM); + } + break; + default: + return(E_BADPARM); + } + return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v32/b3v32pzld.c b/src/spicelib/devices/bsim3v32/b3v32pzld.c new file mode 100644 index 000000000..f5b7e4274 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32pzld.c @@ -0,0 +1,372 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3pzld.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "complex.h" +#include "sperror.h" +#include "bsim3v32def.h" +#include "suffix.h" + +int +BSIM3v32pzLoad (GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; +double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb; +double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb; +double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs; +double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb; +double GSoverlapCap, GDoverlapCap, GBoverlapCap; +double dxpart, sxpart, xgtg, xgtd, xgts, xgtb; +double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css; +double ScalingFactor = 1.0e-9; +double m; + + for (; model != NULL; model = model->BSIM3v32nextModel) + { for (here = model->BSIM3v32instances; here!= NULL; + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner != ARCHme) + continue; + if (here->BSIM3v32mode >= 0) + { Gm = here->BSIM3v32gm; + Gmbs = here->BSIM3v32gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + gbbdp = -here->BSIM3v32gbds; + gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs; + + gbdpg = here->BSIM3v32gbgs; + gbdpdp = here->BSIM3v32gbds; + gbdpb = here->BSIM3v32gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspg = 0.0; + gbspdp = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (here->BSIM3v32nqsMod == 0) + { cggb = here->BSIM3v32cggb; + cgsb = here->BSIM3v32cgsb; + cgdb = here->BSIM3v32cgdb; + + cbgb = here->BSIM3v32cbgb; + cbsb = here->BSIM3v32cbsb; + cbdb = here->BSIM3v32cbdb; + + cdgb = here->BSIM3v32cdgb; + cdsb = here->BSIM3v32cdsb; + cddb = here->BSIM3v32cddb; + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { cggb = cgdb = cgsb = 0.0; + cbgb = cbdb = cbsb = 0.0; + cdgb = cddb = cdsb = 0.0; + + xgtg = here->BSIM3v32gtg; + xgtd = here->BSIM3v32gtd; + xgts = here->BSIM3v32gts; + xgtb = here->BSIM3v32gtb; + + xcqgb = here->BSIM3v32cqgb; + xcqdb = here->BSIM3v32cqdb; + xcqsb = here->BSIM3v32cqsb; + xcqbb = here->BSIM3v32cqbb; + + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + * here->pParam->BSIM3v32leffCV; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM3v32qdrn / qcheq; + Cdd = here->BSIM3v32cddb; + Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM3v32cdgb; + Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM3v32cdsb; + Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + } + else + { Gm = -here->BSIM3v32gm; + Gmbs = -here->BSIM3v32gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + gbbsp = -here->BSIM3v32gbds; + gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM3v32gbgs; + gbspsp = here->BSIM3v32gbds; + gbspb = here->BSIM3v32gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (here->BSIM3v32nqsMod == 0) + { cggb = here->BSIM3v32cggb; + cgsb = here->BSIM3v32cgdb; + cgdb = here->BSIM3v32cgsb; + + cbgb = here->BSIM3v32cbgb; + cbsb = here->BSIM3v32cbdb; + cbdb = here->BSIM3v32cbsb; + + cdgb = -(here->BSIM3v32cdgb + cggb + cbgb); + cdsb = -(here->BSIM3v32cddb + cgsb + cbsb); + cddb = -(here->BSIM3v32cdsb + cgdb + cbdb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { cggb = cgdb = cgsb = 0.0; + cbgb = cbdb = cbsb = 0.0; + cdgb = cddb = cdsb = 0.0; + + xgtg = here->BSIM3v32gtg; + xgtd = here->BSIM3v32gts; + xgts = here->BSIM3v32gtd; + xgtb = here->BSIM3v32gtb; + + xcqgb = here->BSIM3v32cqgb; + xcqdb = here->BSIM3v32cqsb; + xcqsb = here->BSIM3v32cqdb; + xcqbb = here->BSIM3v32cqbb; + + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + * here->pParam->BSIM3v32leffCV; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM3v32qdrn / qcheq; + Css = here->BSIM3v32cddb; + Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM3v32cdgb; + Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM3v32cdsb; + Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + } + + + T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; + gdpr = here->BSIM3v32drainConductance; + gspr = here->BSIM3v32sourceConductance; + gds = here->BSIM3v32gds; + gbd = here->BSIM3v32gbd; + gbs = here->BSIM3v32gbs; + capbd = here->BSIM3v32capbd; + capbs = here->BSIM3v32capbs; + + GSoverlapCap = here->BSIM3v32cgso; + GDoverlapCap = here->BSIM3v32cgdo; + GBoverlapCap = here->pParam->BSIM3v32cgbo; + + xcdgb = (cdgb - GDoverlapCap); + xcddb = (cddb + capbd + GDoverlapCap); + xcdsb = cdsb; + xcdbb = -(xcdgb + xcddb + xcdsb); + xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap); + xcsdb = -(cgdb + cbdb + cddb); + xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)); + xcsbb = -(xcsgb + xcsdb + xcssb); + xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap); + xcgdb = (cgdb - GDoverlapCap); + xcgsb = (cgsb - GSoverlapCap); + xcgbb = -(xcggb + xcgdb + xcgsb); + xcbgb = (cbgb - GBoverlapCap); + xcbdb = (cbdb - capbd); + xcbsb = (cbsb - capbs); + xcbbb = -(xcbgb + xcbdb + xcbsb); + + m = here->BSIM3v32m; + + *(here->BSIM3v32GgPtr ) += m * (xcggb * s->real); + *(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag); + *(here->BSIM3v32BbPtr ) += m * (xcbbb * s->real); + *(here->BSIM3v32BbPtr +1) += m * (xcbbb * s->imag); + *(here->BSIM3v32DPdpPtr ) += m * (xcddb * s->real); + *(here->BSIM3v32DPdpPtr +1) += m * (xcddb * s->imag); + *(here->BSIM3v32SPspPtr ) += m * (xcssb * s->real); + *(here->BSIM3v32SPspPtr +1) += m * (xcssb * s->imag); + + *(here->BSIM3v32GbPtr ) += m * (xcgbb * s->real); + *(here->BSIM3v32GbPtr +1) += m * (xcgbb * s->imag); + *(here->BSIM3v32GdpPtr ) += m * (xcgdb * s->real); + *(here->BSIM3v32GdpPtr +1) += m * (xcgdb * s->imag); + *(here->BSIM3v32GspPtr ) += m * (xcgsb * s->real); + *(here->BSIM3v32GspPtr +1) += m * (xcgsb * s->imag); + + *(here->BSIM3v32BgPtr ) += m * (xcbgb * s->real); + *(here->BSIM3v32BgPtr +1) += m * (xcbgb * s->imag); + *(here->BSIM3v32BdpPtr ) += m * (xcbdb * s->real); + *(here->BSIM3v32BdpPtr +1) += m * (xcbdb * s->imag); + *(here->BSIM3v32BspPtr ) += m * (xcbsb * s->real); + *(here->BSIM3v32BspPtr +1) += m * (xcbsb * s->imag); + + *(here->BSIM3v32DPgPtr ) += m * (xcdgb * s->real); + *(here->BSIM3v32DPgPtr +1) += m * (xcdgb * s->imag); + *(here->BSIM3v32DPbPtr ) += m * (xcdbb * s->real); + *(here->BSIM3v32DPbPtr +1) += m * (xcdbb * s->imag); + *(here->BSIM3v32DPspPtr ) += m * (xcdsb * s->real); + *(here->BSIM3v32DPspPtr +1) += m * (xcdsb * s->imag); + + *(here->BSIM3v32SPgPtr ) += m * (xcsgb * s->real); + *(here->BSIM3v32SPgPtr +1) += m * (xcsgb * s->imag); + *(here->BSIM3v32SPbPtr ) += m * (xcsbb * s->real); + *(here->BSIM3v32SPbPtr +1) += m * (xcsbb * s->imag); + *(here->BSIM3v32SPdpPtr ) += m * (xcsdb * s->real); + *(here->BSIM3v32SPdpPtr +1) += m * (xcsdb * s->imag); + + *(here->BSIM3v32DdPtr) += m * gdpr; + *(here->BSIM3v32DdpPtr) -= m * gdpr; + *(here->BSIM3v32DPdPtr) -= m * gdpr; + + *(here->BSIM3v32SsPtr) += m * gspr; + *(here->BSIM3v32SspPtr) -= m * gspr; + *(here->BSIM3v32SPsPtr) -= m * gspr; + + *(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs; + *(here->BSIM3v32BbPtr) += m * (gbd + gbs - here->BSIM3v32gbbs); + *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); + *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); + + *(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg + + T1 * ddxpart_dVg + gbdpg; + *(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum + + dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp; + *(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts + - T1 * ddxpart_dVs - gbdpsp; + *(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb + - T1 * ddxpart_dVb - gbdpb; + + *(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg + - T1 * dsxpart_dVg - gbspg; + *(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum + + sxpart * xgts + T1 * dsxpart_dVs + gbspsp; + *(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb + - T1 * dsxpart_dVb - gbspb; + *(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd + - T1 * dsxpart_dVd - gbspdp; + + *(here->BSIM3v32GgPtr) -= xgtg; + *(here->BSIM3v32GbPtr) -= xgtb; + *(here->BSIM3v32GdpPtr) -= xgtd; + *(here->BSIM3v32GspPtr) -= xgts; + + if (here->BSIM3v32nqsMod) + { *(here->BSIM3v32QqPtr ) += m * (s->real * ScalingFactor); + *(here->BSIM3v32QqPtr +1) += m * (s->imag * ScalingFactor); + *(here->BSIM3v32QgPtr ) -= m * (xcqgb * s->real); + *(here->BSIM3v32QgPtr +1) -= m * (xcqgb * s->imag); + *(here->BSIM3v32QdpPtr ) -= m * (xcqdb * s->real); + *(here->BSIM3v32QdpPtr +1) -= m * (xcqdb * s->imag); + *(here->BSIM3v32QbPtr ) -= m * (xcqbb * s->real); + *(here->BSIM3v32QbPtr +1) -= m * (xcqbb * s->imag); + *(here->BSIM3v32QspPtr ) -= m * (xcqsb * s->real); + *(here->BSIM3v32QspPtr +1) -= m * (xcqsb * s->imag); + + *(here->BSIM3v32GqPtr) -= m * (here->BSIM3v32gtau); + *(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau); + *(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau); + + *(here->BSIM3v32QqPtr) += m * (here->BSIM3v32gtau); + *(here->BSIM3v32QgPtr) += m * xgtg; + *(here->BSIM3v32QdpPtr) += m * xgtd; + *(here->BSIM3v32QbPtr) += m * xgtb; + *(here->BSIM3v32QspPtr) += m * xgts; + } + } + } + return(OK); +} + diff --git a/src/spicelib/devices/bsim3v32/b3v32set.c b/src/spicelib/devices/bsim3v32/b3v32set.c new file mode 100644 index 000000000..9bb015bff --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32set.c @@ -0,0 +1,1096 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3set.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + **********/ + +#include "ngspice.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "const.h" +#include "sperror.h" +#include "suffix.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define SMOOTHFACTOR 0.1 +#define EPSOX 3.453133e-11 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define Charge_q 1.60219e-19 +#define Meter2Micron 1.0e6 + +int +BSIM3v32setup (SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, + int *states) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; +int error; +CKTnode *tmp; + +CKTnode *tmpNode; +IFuid tmpName; + + /* loop through all the BSIM3v32 device models */ + for( ; model != NULL; model = model->BSIM3v32nextModel ) + { +/* Default value Processing for BSIM3v32 MOSFET Models */ + if (!model->BSIM3v32typeGiven) + model->BSIM3v32type = NMOS; + if (!model->BSIM3v32mobModGiven) + model->BSIM3v32mobMod = 1; + if (!model->BSIM3v32binUnitGiven) + model->BSIM3v32binUnit = 1; + if (!model->BSIM3v32paramChkGiven) + model->BSIM3v32paramChk = 0; + if (!model->BSIM3v32capModGiven) + model->BSIM3v32capMod = 3; + if (!model->BSIM3v32acmModGiven) + model->BSIM3v32acmMod = 0; + if (!model->BSIM3v32noiModGiven) + model->BSIM3v32noiMod = 1; + + /* If the user does not provide the model revision, + * we always choose the most recent. + */ + if (!model->BSIM3v32versionGiven) + model->BSIM3v32version = "3.2.4"; + + /* I have added below the code that translate model string + * into an integer. This trick is meant to speed up the + * revision testing instruction, since comparing integer + * is faster than comparing strings. + * Paolo Nenzi 2002 + */ + if ((!strcmp(model->BSIM3v32version, "3.2.4"))||(!strcmp(model->BSIM3v32version, "3.24"))) + model->BSIM3v32intVersion = BSIM3v32V324; + else if ((!strcmp(model->BSIM3v32version, "3.2.3"))||(!strcmp(model->BSIM3v32version, "3.23"))) + model->BSIM3v32intVersion = BSIM3v32V323; + else if ((!strcmp(model->BSIM3v32version, "3.2.2"))||(!strcmp(model->BSIM3v32version, "3.22"))) + model->BSIM3v32intVersion = BSIM3v32V322; + else if ((!strcmp(model->BSIM3v32version, "3.2"))||(!strcmp(model->BSIM3v32version, "3.20"))) + model->BSIM3v32intVersion = BSIM3v32V32; + else + model->BSIM3v32intVersion = BSIM3v32V3OLD; + /* BSIM3v32V3OLD is a placeholder for pre 3.2 revision + * This model should not be used for pre 3.2 models. + */ + + if (!model->BSIM3v32toxGiven) + model->BSIM3v32tox = 150.0e-10; + model->BSIM3v32cox = 3.453133e-11 / model->BSIM3v32tox; + if (!model->BSIM3v32toxmGiven) + model->BSIM3v32toxm = model->BSIM3v32tox; + + if (!model->BSIM3v32cdscGiven) + model->BSIM3v32cdsc = 2.4e-4; /* unit Q/V/m^2 */ + if (!model->BSIM3v32cdscbGiven) + model->BSIM3v32cdscb = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM3v32cdscdGiven) + model->BSIM3v32cdscd = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM3v32citGiven) + model->BSIM3v32cit = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM3v32nfactorGiven) + model->BSIM3v32nfactor = 1; + if (!model->BSIM3v32xjGiven) + model->BSIM3v32xj = .15e-6; + if (!model->BSIM3v32vsatGiven) + model->BSIM3v32vsat = 8.0e4; /* unit m/s */ + if (!model->BSIM3v32atGiven) + model->BSIM3v32at = 3.3e4; /* unit m/s */ + if (!model->BSIM3v32a0Given) + model->BSIM3v32a0 = 1.0; + if (!model->BSIM3v32agsGiven) + model->BSIM3v32ags = 0.0; + if (!model->BSIM3v32a1Given) + model->BSIM3v32a1 = 0.0; + if (!model->BSIM3v32a2Given) + model->BSIM3v32a2 = 1.0; + if (!model->BSIM3v32ketaGiven) + model->BSIM3v32keta = -0.047; /* unit / V */ + if (!model->BSIM3v32nsubGiven) + model->BSIM3v32nsub = 6.0e16; /* unit 1/cm3 */ + if (!model->BSIM3v32npeakGiven) + model->BSIM3v32npeak = 1.7e17; /* unit 1/cm3 */ + if (!model->BSIM3v32ngateGiven) + model->BSIM3v32ngate = 0; /* unit 1/cm3 */ + if (!model->BSIM3v32vbmGiven) + model->BSIM3v32vbm = -3.0; + if (!model->BSIM3v32xtGiven) + model->BSIM3v32xt = 1.55e-7; + if (!model->BSIM3v32kt1Given) + model->BSIM3v32kt1 = -0.11; /* unit V */ + if (!model->BSIM3v32kt1lGiven) + model->BSIM3v32kt1l = 0.0; /* unit V*m */ + if (!model->BSIM3v32kt2Given) + model->BSIM3v32kt2 = 0.022; /* No unit */ + if (!model->BSIM3v32k3Given) + model->BSIM3v32k3 = 80.0; + if (!model->BSIM3v32k3bGiven) + model->BSIM3v32k3b = 0.0; + if (!model->BSIM3v32w0Given) + model->BSIM3v32w0 = 2.5e-6; + if (!model->BSIM3v32nlxGiven) + model->BSIM3v32nlx = 1.74e-7; + if (!model->BSIM3v32dvt0Given) + model->BSIM3v32dvt0 = 2.2; + if (!model->BSIM3v32dvt1Given) + model->BSIM3v32dvt1 = 0.53; + if (!model->BSIM3v32dvt2Given) + model->BSIM3v32dvt2 = -0.032; /* unit 1 / V */ + + if (!model->BSIM3v32dvt0wGiven) + model->BSIM3v32dvt0w = 0.0; + if (!model->BSIM3v32dvt1wGiven) + model->BSIM3v32dvt1w = 5.3e6; + if (!model->BSIM3v32dvt2wGiven) + model->BSIM3v32dvt2w = -0.032; + + if (!model->BSIM3v32droutGiven) + model->BSIM3v32drout = 0.56; + if (!model->BSIM3v32dsubGiven) + model->BSIM3v32dsub = model->BSIM3v32drout; + if (!model->BSIM3v32vth0Given) + model->BSIM3v32vth0 = (model->BSIM3v32type == NMOS) ? 0.7 : -0.7; + if (!model->BSIM3v32uaGiven) + model->BSIM3v32ua = 2.25e-9; /* unit m/V */ + if (!model->BSIM3v32ua1Given) + model->BSIM3v32ua1 = 4.31e-9; /* unit m/V */ + if (!model->BSIM3v32ubGiven) + model->BSIM3v32ub = 5.87e-19; /* unit (m/V)**2 */ + if (!model->BSIM3v32ub1Given) + model->BSIM3v32ub1 = -7.61e-18; /* unit (m/V)**2 */ + if (!model->BSIM3v32ucGiven) + model->BSIM3v32uc = (model->BSIM3v32mobMod == 3) ? -0.0465 : -0.0465e-9; + if (!model->BSIM3v32uc1Given) + model->BSIM3v32uc1 = (model->BSIM3v32mobMod == 3) ? -0.056 : -0.056e-9; + if (!model->BSIM3v32u0Given) + model->BSIM3v32u0 = (model->BSIM3v32type == NMOS) ? 0.067 : 0.025; + if (!model->BSIM3v32uteGiven) + model->BSIM3v32ute = -1.5; + if (!model->BSIM3v32voffGiven) + model->BSIM3v32voff = -0.08; + if (!model->BSIM3v32deltaGiven) + model->BSIM3v32delta = 0.01; + if (!model->BSIM3v32rdswGiven) + model->BSIM3v32rdsw = 0; + if (!model->BSIM3v32prwgGiven) + model->BSIM3v32prwg = 0.0; /* unit 1/V */ + if (!model->BSIM3v32prwbGiven) + model->BSIM3v32prwb = 0.0; + if (!model->BSIM3v32prtGiven) + if (!model->BSIM3v32prtGiven) + model->BSIM3v32prt = 0.0; + if (!model->BSIM3v32eta0Given) + model->BSIM3v32eta0 = 0.08; /* no unit */ + if (!model->BSIM3v32etabGiven) + model->BSIM3v32etab = -0.07; /* unit 1/V */ + if (!model->BSIM3v32pclmGiven) + model->BSIM3v32pclm = 1.3; /* no unit */ + if (!model->BSIM3v32pdibl1Given) + model->BSIM3v32pdibl1 = .39; /* no unit */ + if (!model->BSIM3v32pdibl2Given) + model->BSIM3v32pdibl2 = 0.0086; /* no unit */ + if (!model->BSIM3v32pdiblbGiven) + model->BSIM3v32pdiblb = 0.0; /* 1/V */ + if (!model->BSIM3v32pscbe1Given) + model->BSIM3v32pscbe1 = 4.24e8; + if (!model->BSIM3v32pscbe2Given) + model->BSIM3v32pscbe2 = 1.0e-5; + if (!model->BSIM3v32pvagGiven) + model->BSIM3v32pvag = 0.0; + if (!model->BSIM3v32wrGiven) + model->BSIM3v32wr = 1.0; + if (!model->BSIM3v32dwgGiven) + model->BSIM3v32dwg = 0.0; + if (!model->BSIM3v32dwbGiven) + model->BSIM3v32dwb = 0.0; + if (!model->BSIM3v32b0Given) + model->BSIM3v32b0 = 0.0; + if (!model->BSIM3v32b1Given) + model->BSIM3v32b1 = 0.0; + if (!model->BSIM3v32alpha0Given) + model->BSIM3v32alpha0 = 0.0; + if (!model->BSIM3v32alpha1Given) + model->BSIM3v32alpha1 = 0.0; + if (!model->BSIM3v32beta0Given) + model->BSIM3v32beta0 = 30.0; + if (!model->BSIM3v32ijthGiven) + model->BSIM3v32ijth = 0.1; /* unit A */ + + if (!model->BSIM3v32elmGiven) + model->BSIM3v32elm = 5.0; + if (!model->BSIM3v32cgslGiven) + model->BSIM3v32cgsl = 0.0; + if (!model->BSIM3v32cgdlGiven) + model->BSIM3v32cgdl = 0.0; + if (!model->BSIM3v32ckappaGiven) + model->BSIM3v32ckappa = 0.6; + if (!model->BSIM3v32clcGiven) + model->BSIM3v32clc = 0.1e-6; + if (!model->BSIM3v32cleGiven) + model->BSIM3v32cle = 0.6; + if (!model->BSIM3v32vfbcvGiven) + model->BSIM3v32vfbcv = -1.0; + if (!model->BSIM3v32acdeGiven) + model->BSIM3v32acde = 1.0; + if (!model->BSIM3v32moinGiven) + model->BSIM3v32moin = 15.0; + if (!model->BSIM3v32noffGiven) + model->BSIM3v32noff = 1.0; + if (!model->BSIM3v32voffcvGiven) + model->BSIM3v32voffcv = 0.0; + if (!model->BSIM3v32tcjGiven) + model->BSIM3v32tcj = 0.0; + if (!model->BSIM3v32tpbGiven) + model->BSIM3v32tpb = 0.0; + if (!model->BSIM3v32tcjswGiven) + model->BSIM3v32tcjsw = 0.0; + if (!model->BSIM3v32tpbswGiven) + model->BSIM3v32tpbsw = 0.0; + if (!model->BSIM3v32tcjswgGiven) + model->BSIM3v32tcjswg = 0.0; + if (!model->BSIM3v32tpbswgGiven) + model->BSIM3v32tpbswg = 0.0; + + /* acm model */ + if (!model->BSIM3v32hdifGiven) + model->BSIM3v32hdif = 0.0; + if (!model->BSIM3v32ldifGiven) + model->BSIM3v32ldif = 0.0; + if (!model->BSIM3v32ldGiven) + model->BSIM3v32ld = 0.0; + if (!model->BSIM3v32rdGiven) + model->BSIM3v32rd = 0.0; + if (!model->BSIM3v32rsGiven) + model->BSIM3v32rs = 0.0; + if (!model->BSIM3v32rdcGiven) + model->BSIM3v32rdc = 0.0; + if (!model->BSIM3v32rscGiven) + model->BSIM3v32rsc = 0.0; + + /* Length dependence */ + if (!model->BSIM3v32lcdscGiven) + model->BSIM3v32lcdsc = 0.0; + if (!model->BSIM3v32lcdscbGiven) + model->BSIM3v32lcdscb = 0.0; + if (!model->BSIM3v32lcdscdGiven) + model->BSIM3v32lcdscd = 0.0; + if (!model->BSIM3v32lcitGiven) + model->BSIM3v32lcit = 0.0; + if (!model->BSIM3v32lnfactorGiven) + model->BSIM3v32lnfactor = 0.0; + if (!model->BSIM3v32lxjGiven) + model->BSIM3v32lxj = 0.0; + if (!model->BSIM3v32lvsatGiven) + model->BSIM3v32lvsat = 0.0; + if (!model->BSIM3v32latGiven) + model->BSIM3v32lat = 0.0; + if (!model->BSIM3v32la0Given) + model->BSIM3v32la0 = 0.0; + if (!model->BSIM3v32lagsGiven) + model->BSIM3v32lags = 0.0; + if (!model->BSIM3v32la1Given) + model->BSIM3v32la1 = 0.0; + if (!model->BSIM3v32la2Given) + model->BSIM3v32la2 = 0.0; + if (!model->BSIM3v32lketaGiven) + model->BSIM3v32lketa = 0.0; + if (!model->BSIM3v32lnsubGiven) + model->BSIM3v32lnsub = 0.0; + if (!model->BSIM3v32lnpeakGiven) + model->BSIM3v32lnpeak = 0.0; + if (!model->BSIM3v32lngateGiven) + model->BSIM3v32lngate = 0.0; + if (!model->BSIM3v32lvbmGiven) + model->BSIM3v32lvbm = 0.0; + if (!model->BSIM3v32lxtGiven) + model->BSIM3v32lxt = 0.0; + if (!model->BSIM3v32lkt1Given) + model->BSIM3v32lkt1 = 0.0; + if (!model->BSIM3v32lkt1lGiven) + model->BSIM3v32lkt1l = 0.0; + if (!model->BSIM3v32lkt2Given) + model->BSIM3v32lkt2 = 0.0; + if (!model->BSIM3v32lk3Given) + model->BSIM3v32lk3 = 0.0; + if (!model->BSIM3v32lk3bGiven) + model->BSIM3v32lk3b = 0.0; + if (!model->BSIM3v32lw0Given) + model->BSIM3v32lw0 = 0.0; + if (!model->BSIM3v32lnlxGiven) + model->BSIM3v32lnlx = 0.0; + if (!model->BSIM3v32ldvt0Given) + model->BSIM3v32ldvt0 = 0.0; + if (!model->BSIM3v32ldvt1Given) + model->BSIM3v32ldvt1 = 0.0; + if (!model->BSIM3v32ldvt2Given) + model->BSIM3v32ldvt2 = 0.0; + if (!model->BSIM3v32ldvt0wGiven) + model->BSIM3v32ldvt0w = 0.0; + if (!model->BSIM3v32ldvt1wGiven) + model->BSIM3v32ldvt1w = 0.0; + if (!model->BSIM3v32ldvt2wGiven) + model->BSIM3v32ldvt2w = 0.0; + if (!model->BSIM3v32ldroutGiven) + model->BSIM3v32ldrout = 0.0; + if (!model->BSIM3v32ldsubGiven) + model->BSIM3v32ldsub = 0.0; + if (!model->BSIM3v32lvth0Given) + model->BSIM3v32lvth0 = 0.0; + if (!model->BSIM3v32luaGiven) + model->BSIM3v32lua = 0.0; + if (!model->BSIM3v32lua1Given) + model->BSIM3v32lua1 = 0.0; + if (!model->BSIM3v32lubGiven) + model->BSIM3v32lub = 0.0; + if (!model->BSIM3v32lub1Given) + model->BSIM3v32lub1 = 0.0; + if (!model->BSIM3v32lucGiven) + model->BSIM3v32luc = 0.0; + if (!model->BSIM3v32luc1Given) + model->BSIM3v32luc1 = 0.0; + if (!model->BSIM3v32lu0Given) + model->BSIM3v32lu0 = 0.0; + if (!model->BSIM3v32luteGiven) + model->BSIM3v32lute = 0.0; + if (!model->BSIM3v32lvoffGiven) + model->BSIM3v32lvoff = 0.0; + if (!model->BSIM3v32ldeltaGiven) + model->BSIM3v32ldelta = 0.0; + if (!model->BSIM3v32lrdswGiven) + model->BSIM3v32lrdsw = 0.0; + if (!model->BSIM3v32lprwbGiven) + model->BSIM3v32lprwb = 0.0; + if (!model->BSIM3v32lprwgGiven) + model->BSIM3v32lprwg = 0.0; + if (!model->BSIM3v32lprtGiven) + model->BSIM3v32lprt = 0.0; + if (!model->BSIM3v32leta0Given) + model->BSIM3v32leta0 = 0.0; + if (!model->BSIM3v32letabGiven) + model->BSIM3v32letab = -0.0; + if (!model->BSIM3v32lpclmGiven) + model->BSIM3v32lpclm = 0.0; + if (!model->BSIM3v32lpdibl1Given) + model->BSIM3v32lpdibl1 = 0.0; + if (!model->BSIM3v32lpdibl2Given) + model->BSIM3v32lpdibl2 = 0.0; + if (!model->BSIM3v32lpdiblbGiven) + model->BSIM3v32lpdiblb = 0.0; + if (!model->BSIM3v32lpscbe1Given) + model->BSIM3v32lpscbe1 = 0.0; + if (!model->BSIM3v32lpscbe2Given) + model->BSIM3v32lpscbe2 = 0.0; + if (!model->BSIM3v32lpvagGiven) + model->BSIM3v32lpvag = 0.0; + if (!model->BSIM3v32lwrGiven) + model->BSIM3v32lwr = 0.0; + if (!model->BSIM3v32ldwgGiven) + model->BSIM3v32ldwg = 0.0; + if (!model->BSIM3v32ldwbGiven) + model->BSIM3v32ldwb = 0.0; + if (!model->BSIM3v32lb0Given) + model->BSIM3v32lb0 = 0.0; + if (!model->BSIM3v32lb1Given) + model->BSIM3v32lb1 = 0.0; + if (!model->BSIM3v32lalpha0Given) + model->BSIM3v32lalpha0 = 0.0; + if (!model->BSIM3v32lalpha1Given) + model->BSIM3v32lalpha1 = 0.0; + if (!model->BSIM3v32lbeta0Given) + model->BSIM3v32lbeta0 = 0.0; + if (!model->BSIM3v32lvfbGiven) + model->BSIM3v32lvfb = 0.0; + + if (!model->BSIM3v32lelmGiven) + model->BSIM3v32lelm = 0.0; + if (!model->BSIM3v32lcgslGiven) + model->BSIM3v32lcgsl = 0.0; + if (!model->BSIM3v32lcgdlGiven) + model->BSIM3v32lcgdl = 0.0; + if (!model->BSIM3v32lckappaGiven) + model->BSIM3v32lckappa = 0.0; + if (!model->BSIM3v32lclcGiven) + model->BSIM3v32lclc = 0.0; + if (!model->BSIM3v32lcleGiven) + model->BSIM3v32lcle = 0.0; + if (!model->BSIM3v32lcfGiven) + model->BSIM3v32lcf = 0.0; + if (!model->BSIM3v32lvfbcvGiven) + model->BSIM3v32lvfbcv = 0.0; + if (!model->BSIM3v32lacdeGiven) + model->BSIM3v32lacde = 0.0; + if (!model->BSIM3v32lmoinGiven) + model->BSIM3v32lmoin = 0.0; + if (!model->BSIM3v32lnoffGiven) + model->BSIM3v32lnoff = 0.0; + if (!model->BSIM3v32lvoffcvGiven) + model->BSIM3v32lvoffcv = 0.0; + + /* Width dependence */ + if (!model->BSIM3v32wcdscGiven) + model->BSIM3v32wcdsc = 0.0; + if (!model->BSIM3v32wcdscbGiven) + model->BSIM3v32wcdscb = 0.0; + if (!model->BSIM3v32wcdscdGiven) + model->BSIM3v32wcdscd = 0.0; + if (!model->BSIM3v32wcitGiven) + model->BSIM3v32wcit = 0.0; + if (!model->BSIM3v32wnfactorGiven) + model->BSIM3v32wnfactor = 0.0; + if (!model->BSIM3v32wxjGiven) + model->BSIM3v32wxj = 0.0; + if (!model->BSIM3v32wvsatGiven) + model->BSIM3v32wvsat = 0.0; + if (!model->BSIM3v32watGiven) + model->BSIM3v32wat = 0.0; + if (!model->BSIM3v32wa0Given) + model->BSIM3v32wa0 = 0.0; + if (!model->BSIM3v32wagsGiven) + model->BSIM3v32wags = 0.0; + if (!model->BSIM3v32wa1Given) + model->BSIM3v32wa1 = 0.0; + if (!model->BSIM3v32wa2Given) + model->BSIM3v32wa2 = 0.0; + if (!model->BSIM3v32wketaGiven) + model->BSIM3v32wketa = 0.0; + if (!model->BSIM3v32wnsubGiven) + model->BSIM3v32wnsub = 0.0; + if (!model->BSIM3v32wnpeakGiven) + model->BSIM3v32wnpeak = 0.0; + if (!model->BSIM3v32wngateGiven) + model->BSIM3v32wngate = 0.0; + if (!model->BSIM3v32wvbmGiven) + model->BSIM3v32wvbm = 0.0; + if (!model->BSIM3v32wxtGiven) + model->BSIM3v32wxt = 0.0; + if (!model->BSIM3v32wkt1Given) + model->BSIM3v32wkt1 = 0.0; + if (!model->BSIM3v32wkt1lGiven) + model->BSIM3v32wkt1l = 0.0; + if (!model->BSIM3v32wkt2Given) + model->BSIM3v32wkt2 = 0.0; + if (!model->BSIM3v32wk3Given) + model->BSIM3v32wk3 = 0.0; + if (!model->BSIM3v32wk3bGiven) + model->BSIM3v32wk3b = 0.0; + if (!model->BSIM3v32ww0Given) + model->BSIM3v32ww0 = 0.0; + if (!model->BSIM3v32wnlxGiven) + model->BSIM3v32wnlx = 0.0; + if (!model->BSIM3v32wdvt0Given) + model->BSIM3v32wdvt0 = 0.0; + if (!model->BSIM3v32wdvt1Given) + model->BSIM3v32wdvt1 = 0.0; + if (!model->BSIM3v32wdvt2Given) + model->BSIM3v32wdvt2 = 0.0; + if (!model->BSIM3v32wdvt0wGiven) + model->BSIM3v32wdvt0w = 0.0; + if (!model->BSIM3v32wdvt1wGiven) + model->BSIM3v32wdvt1w = 0.0; + if (!model->BSIM3v32wdvt2wGiven) + model->BSIM3v32wdvt2w = 0.0; + if (!model->BSIM3v32wdroutGiven) + model->BSIM3v32wdrout = 0.0; + if (!model->BSIM3v32wdsubGiven) + model->BSIM3v32wdsub = 0.0; + if (!model->BSIM3v32wvth0Given) + model->BSIM3v32wvth0 = 0.0; + if (!model->BSIM3v32wuaGiven) + model->BSIM3v32wua = 0.0; + if (!model->BSIM3v32wua1Given) + model->BSIM3v32wua1 = 0.0; + if (!model->BSIM3v32wubGiven) + model->BSIM3v32wub = 0.0; + if (!model->BSIM3v32wub1Given) + model->BSIM3v32wub1 = 0.0; + if (!model->BSIM3v32wucGiven) + model->BSIM3v32wuc = 0.0; + if (!model->BSIM3v32wuc1Given) + model->BSIM3v32wuc1 = 0.0; + if (!model->BSIM3v32wu0Given) + model->BSIM3v32wu0 = 0.0; + if (!model->BSIM3v32wuteGiven) + model->BSIM3v32wute = 0.0; + if (!model->BSIM3v32wvoffGiven) + model->BSIM3v32wvoff = 0.0; + if (!model->BSIM3v32wdeltaGiven) + model->BSIM3v32wdelta = 0.0; + if (!model->BSIM3v32wrdswGiven) + model->BSIM3v32wrdsw = 0.0; + if (!model->BSIM3v32wprwbGiven) + model->BSIM3v32wprwb = 0.0; + if (!model->BSIM3v32wprwgGiven) + model->BSIM3v32wprwg = 0.0; + if (!model->BSIM3v32wprtGiven) + model->BSIM3v32wprt = 0.0; + if (!model->BSIM3v32weta0Given) + model->BSIM3v32weta0 = 0.0; + if (!model->BSIM3v32wetabGiven) + model->BSIM3v32wetab = 0.0; + if (!model->BSIM3v32wpclmGiven) + model->BSIM3v32wpclm = 0.0; + if (!model->BSIM3v32wpdibl1Given) + model->BSIM3v32wpdibl1 = 0.0; + if (!model->BSIM3v32wpdibl2Given) + model->BSIM3v32wpdibl2 = 0.0; + if (!model->BSIM3v32wpdiblbGiven) + model->BSIM3v32wpdiblb = 0.0; + if (!model->BSIM3v32wpscbe1Given) + model->BSIM3v32wpscbe1 = 0.0; + if (!model->BSIM3v32wpscbe2Given) + model->BSIM3v32wpscbe2 = 0.0; + if (!model->BSIM3v32wpvagGiven) + model->BSIM3v32wpvag = 0.0; + if (!model->BSIM3v32wwrGiven) + model->BSIM3v32wwr = 0.0; + if (!model->BSIM3v32wdwgGiven) + model->BSIM3v32wdwg = 0.0; + if (!model->BSIM3v32wdwbGiven) + model->BSIM3v32wdwb = 0.0; + if (!model->BSIM3v32wb0Given) + model->BSIM3v32wb0 = 0.0; + if (!model->BSIM3v32wb1Given) + model->BSIM3v32wb1 = 0.0; + if (!model->BSIM3v32walpha0Given) + model->BSIM3v32walpha0 = 0.0; + if (!model->BSIM3v32walpha1Given) + model->BSIM3v32walpha1 = 0.0; + if (!model->BSIM3v32wbeta0Given) + model->BSIM3v32wbeta0 = 0.0; + if (!model->BSIM3v32wvfbGiven) + model->BSIM3v32wvfb = 0.0; + + if (!model->BSIM3v32welmGiven) + model->BSIM3v32welm = 0.0; + if (!model->BSIM3v32wcgslGiven) + model->BSIM3v32wcgsl = 0.0; + if (!model->BSIM3v32wcgdlGiven) + model->BSIM3v32wcgdl = 0.0; + if (!model->BSIM3v32wckappaGiven) + model->BSIM3v32wckappa = 0.0; + if (!model->BSIM3v32wcfGiven) + model->BSIM3v32wcf = 0.0; + if (!model->BSIM3v32wclcGiven) + model->BSIM3v32wclc = 0.0; + if (!model->BSIM3v32wcleGiven) + model->BSIM3v32wcle = 0.0; + if (!model->BSIM3v32wvfbcvGiven) + model->BSIM3v32wvfbcv = 0.0; + if (!model->BSIM3v32wacdeGiven) + model->BSIM3v32wacde = 0.0; + if (!model->BSIM3v32wmoinGiven) + model->BSIM3v32wmoin = 0.0; + if (!model->BSIM3v32wnoffGiven) + model->BSIM3v32wnoff = 0.0; + if (!model->BSIM3v32wvoffcvGiven) + model->BSIM3v32wvoffcv = 0.0; + + /* Cross-term dependence */ + if (!model->BSIM3v32pcdscGiven) + model->BSIM3v32pcdsc = 0.0; + if (!model->BSIM3v32pcdscbGiven) + model->BSIM3v32pcdscb = 0.0; + if (!model->BSIM3v32pcdscdGiven) + model->BSIM3v32pcdscd = 0.0; + if (!model->BSIM3v32pcitGiven) + model->BSIM3v32pcit = 0.0; + if (!model->BSIM3v32pnfactorGiven) + model->BSIM3v32pnfactor = 0.0; + if (!model->BSIM3v32pxjGiven) + model->BSIM3v32pxj = 0.0; + if (!model->BSIM3v32pvsatGiven) + model->BSIM3v32pvsat = 0.0; + if (!model->BSIM3v32patGiven) + model->BSIM3v32pat = 0.0; + if (!model->BSIM3v32pa0Given) + model->BSIM3v32pa0 = 0.0; + + if (!model->BSIM3v32pagsGiven) + model->BSIM3v32pags = 0.0; + if (!model->BSIM3v32pa1Given) + model->BSIM3v32pa1 = 0.0; + if (!model->BSIM3v32pa2Given) + model->BSIM3v32pa2 = 0.0; + if (!model->BSIM3v32pketaGiven) + model->BSIM3v32pketa = 0.0; + if (!model->BSIM3v32pnsubGiven) + model->BSIM3v32pnsub = 0.0; + if (!model->BSIM3v32pnpeakGiven) + model->BSIM3v32pnpeak = 0.0; + if (!model->BSIM3v32pngateGiven) + model->BSIM3v32pngate = 0.0; + if (!model->BSIM3v32pvbmGiven) + model->BSIM3v32pvbm = 0.0; + if (!model->BSIM3v32pxtGiven) + model->BSIM3v32pxt = 0.0; + if (!model->BSIM3v32pkt1Given) + model->BSIM3v32pkt1 = 0.0; + if (!model->BSIM3v32pkt1lGiven) + model->BSIM3v32pkt1l = 0.0; + if (!model->BSIM3v32pkt2Given) + model->BSIM3v32pkt2 = 0.0; + if (!model->BSIM3v32pk3Given) + model->BSIM3v32pk3 = 0.0; + if (!model->BSIM3v32pk3bGiven) + model->BSIM3v32pk3b = 0.0; + if (!model->BSIM3v32pw0Given) + model->BSIM3v32pw0 = 0.0; + if (!model->BSIM3v32pnlxGiven) + model->BSIM3v32pnlx = 0.0; + if (!model->BSIM3v32pdvt0Given) + model->BSIM3v32pdvt0 = 0.0; + if (!model->BSIM3v32pdvt1Given) + model->BSIM3v32pdvt1 = 0.0; + if (!model->BSIM3v32pdvt2Given) + model->BSIM3v32pdvt2 = 0.0; + if (!model->BSIM3v32pdvt0wGiven) + model->BSIM3v32pdvt0w = 0.0; + if (!model->BSIM3v32pdvt1wGiven) + model->BSIM3v32pdvt1w = 0.0; + if (!model->BSIM3v32pdvt2wGiven) + model->BSIM3v32pdvt2w = 0.0; + if (!model->BSIM3v32pdroutGiven) + model->BSIM3v32pdrout = 0.0; + if (!model->BSIM3v32pdsubGiven) + model->BSIM3v32pdsub = 0.0; + if (!model->BSIM3v32pvth0Given) + model->BSIM3v32pvth0 = 0.0; + if (!model->BSIM3v32puaGiven) + model->BSIM3v32pua = 0.0; + if (!model->BSIM3v32pua1Given) + model->BSIM3v32pua1 = 0.0; + if (!model->BSIM3v32pubGiven) + model->BSIM3v32pub = 0.0; + if (!model->BSIM3v32pub1Given) + model->BSIM3v32pub1 = 0.0; + if (!model->BSIM3v32pucGiven) + model->BSIM3v32puc = 0.0; + if (!model->BSIM3v32puc1Given) + model->BSIM3v32puc1 = 0.0; + if (!model->BSIM3v32pu0Given) + model->BSIM3v32pu0 = 0.0; + if (!model->BSIM3v32puteGiven) + model->BSIM3v32pute = 0.0; + if (!model->BSIM3v32pvoffGiven) + model->BSIM3v32pvoff = 0.0; + if (!model->BSIM3v32pdeltaGiven) + model->BSIM3v32pdelta = 0.0; + if (!model->BSIM3v32prdswGiven) + model->BSIM3v32prdsw = 0.0; + if (!model->BSIM3v32pprwbGiven) + model->BSIM3v32pprwb = 0.0; + if (!model->BSIM3v32pprwgGiven) + model->BSIM3v32pprwg = 0.0; + if (!model->BSIM3v32pprtGiven) + model->BSIM3v32pprt = 0.0; + if (!model->BSIM3v32peta0Given) + model->BSIM3v32peta0 = 0.0; + if (!model->BSIM3v32petabGiven) + model->BSIM3v32petab = 0.0; + if (!model->BSIM3v32ppclmGiven) + model->BSIM3v32ppclm = 0.0; + if (!model->BSIM3v32ppdibl1Given) + model->BSIM3v32ppdibl1 = 0.0; + if (!model->BSIM3v32ppdibl2Given) + model->BSIM3v32ppdibl2 = 0.0; + if (!model->BSIM3v32ppdiblbGiven) + model->BSIM3v32ppdiblb = 0.0; + if (!model->BSIM3v32ppscbe1Given) + model->BSIM3v32ppscbe1 = 0.0; + if (!model->BSIM3v32ppscbe2Given) + model->BSIM3v32ppscbe2 = 0.0; + if (!model->BSIM3v32ppvagGiven) + model->BSIM3v32ppvag = 0.0; + if (!model->BSIM3v32pwrGiven) + model->BSIM3v32pwr = 0.0; + if (!model->BSIM3v32pdwgGiven) + model->BSIM3v32pdwg = 0.0; + if (!model->BSIM3v32pdwbGiven) + model->BSIM3v32pdwb = 0.0; + if (!model->BSIM3v32pb0Given) + model->BSIM3v32pb0 = 0.0; + if (!model->BSIM3v32pb1Given) + model->BSIM3v32pb1 = 0.0; + if (!model->BSIM3v32palpha0Given) + model->BSIM3v32palpha0 = 0.0; + if (!model->BSIM3v32palpha1Given) + model->BSIM3v32palpha1 = 0.0; + if (!model->BSIM3v32pbeta0Given) + model->BSIM3v32pbeta0 = 0.0; + if (!model->BSIM3v32pvfbGiven) + model->BSIM3v32pvfb = 0.0; + + if (!model->BSIM3v32pelmGiven) + model->BSIM3v32pelm = 0.0; + if (!model->BSIM3v32pcgslGiven) + model->BSIM3v32pcgsl = 0.0; + if (!model->BSIM3v32pcgdlGiven) + model->BSIM3v32pcgdl = 0.0; + if (!model->BSIM3v32pckappaGiven) + model->BSIM3v32pckappa = 0.0; + if (!model->BSIM3v32pcfGiven) + model->BSIM3v32pcf = 0.0; + if (!model->BSIM3v32pclcGiven) + model->BSIM3v32pclc = 0.0; + if (!model->BSIM3v32pcleGiven) + model->BSIM3v32pcle = 0.0; + if (!model->BSIM3v32pvfbcvGiven) + model->BSIM3v32pvfbcv = 0.0; + if (!model->BSIM3v32pacdeGiven) + model->BSIM3v32pacde = 0.0; + if (!model->BSIM3v32pmoinGiven) + model->BSIM3v32pmoin = 0.0; + if (!model->BSIM3v32pnoffGiven) + model->BSIM3v32pnoff = 0.0; + if (!model->BSIM3v32pvoffcvGiven) + model->BSIM3v32pvoffcv = 0.0; + + /* unit degree celcius */ + if (!model->BSIM3v32tnomGiven) + model->BSIM3v32tnom = ckt->CKTnomTemp; +/* else + model->BSIM3v32tnom = model->BSIM3v32tnom + 273.15; */ + if (!model->BSIM3v32LintGiven) + model->BSIM3v32Lint = 0.0; + if (!model->BSIM3v32LlGiven) + model->BSIM3v32Ll = 0.0; + if (!model->BSIM3v32LlcGiven) + model->BSIM3v32Llc = model->BSIM3v32Ll; + if (!model->BSIM3v32LlnGiven) + model->BSIM3v32Lln = 1.0; + if (!model->BSIM3v32LwGiven) + model->BSIM3v32Lw = 0.0; + if (!model->BSIM3v32LwcGiven) + model->BSIM3v32Lwc = model->BSIM3v32Lw; + if (!model->BSIM3v32LwnGiven) + model->BSIM3v32Lwn = 1.0; + if (!model->BSIM3v32LwlGiven) + model->BSIM3v32Lwl = 0.0; + if (!model->BSIM3v32LwlcGiven) + model->BSIM3v32Lwlc = model->BSIM3v32Lwl; + if (!model->BSIM3v32LminGiven) + model->BSIM3v32Lmin = 0.0; + if (!model->BSIM3v32LmaxGiven) + model->BSIM3v32Lmax = 1.0; + if (!model->BSIM3v32WintGiven) + model->BSIM3v32Wint = 0.0; + if (!model->BSIM3v32WlGiven) + model->BSIM3v32Wl = 0.0; + if (!model->BSIM3v32WlcGiven) + model->BSIM3v32Wlc = model->BSIM3v32Wl; + if (!model->BSIM3v32WlnGiven) + model->BSIM3v32Wln = 1.0; + if (!model->BSIM3v32WwGiven) + model->BSIM3v32Ww = 0.0; + if (!model->BSIM3v32WwcGiven) + model->BSIM3v32Wwc = model->BSIM3v32Ww; + if (!model->BSIM3v32WwnGiven) + model->BSIM3v32Wwn = 1.0; + if (!model->BSIM3v32WwlGiven) + model->BSIM3v32Wwl = 0.0; + if (!model->BSIM3v32WwlcGiven) + model->BSIM3v32Wwlc = model->BSIM3v32Wwl; + if (!model->BSIM3v32WminGiven) + model->BSIM3v32Wmin = 0.0; + if (!model->BSIM3v32WmaxGiven) + model->BSIM3v32Wmax = 1.0; + if (!model->BSIM3v32dwcGiven) + model->BSIM3v32dwc = model->BSIM3v32Wint; + if (!model->BSIM3v32dlcGiven) + model->BSIM3v32dlc = model->BSIM3v32Lint; + + if (!model->BSIM3v32xlGiven) + model->BSIM3v32xl = 0.0; + if (!model->BSIM3v32xwGiven) + model->BSIM3v32xw = 0.0; + + if (!model->BSIM3v32cfGiven) + model->BSIM3v32cf = 2.0 * EPSOX / PI + * log(1.0 + 0.4e-6 / model->BSIM3v32tox); + if (!model->BSIM3v32cgdoGiven) + { if (model->BSIM3v32dlcGiven && (model->BSIM3v32dlc > 0.0)) + { model->BSIM3v32cgdo = model->BSIM3v32dlc * model->BSIM3v32cox + - model->BSIM3v32cgdl ; + } + else + model->BSIM3v32cgdo = 0.6 * model->BSIM3v32xj * model->BSIM3v32cox; + } + if (!model->BSIM3v32cgsoGiven) + { if (model->BSIM3v32dlcGiven && (model->BSIM3v32dlc > 0.0)) + { model->BSIM3v32cgso = model->BSIM3v32dlc * model->BSIM3v32cox + - model->BSIM3v32cgsl ; + } + else + model->BSIM3v32cgso = 0.6 * model->BSIM3v32xj * model->BSIM3v32cox; + } + + if (!model->BSIM3v32cgboGiven) + { model->BSIM3v32cgbo = 2.0 * model->BSIM3v32dwc * model->BSIM3v32cox; + } + if (!model->BSIM3v32xpartGiven) + model->BSIM3v32xpart = 0.0; + if (!model->BSIM3v32sheetResistanceGiven) + model->BSIM3v32sheetResistance = 0.0; + if (!model->BSIM3v32unitAreaJctCapGiven) + model->BSIM3v32unitAreaJctCap = 5.0E-4; + if (!model->BSIM3v32unitLengthSidewallJctCapGiven) + model->BSIM3v32unitLengthSidewallJctCap = 5.0E-10; + if (!model->BSIM3v32unitLengthGateSidewallJctCapGiven) + model->BSIM3v32unitLengthGateSidewallJctCap = model->BSIM3v32unitLengthSidewallJctCap ; + if (!model->BSIM3v32jctSatCurDensityGiven) + model->BSIM3v32jctSatCurDensity = 1.0E-4; + if (!model->BSIM3v32jctSidewallSatCurDensityGiven) + model->BSIM3v32jctSidewallSatCurDensity = 0.0; + if (!model->BSIM3v32bulkJctPotentialGiven) + model->BSIM3v32bulkJctPotential = 1.0; + if (!model->BSIM3v32sidewallJctPotentialGiven) + model->BSIM3v32sidewallJctPotential = 1.0; + if (!model->BSIM3v32GatesidewallJctPotentialGiven) + model->BSIM3v32GatesidewallJctPotential = model->BSIM3v32sidewallJctPotential; + if (!model->BSIM3v32bulkJctBotGradingCoeffGiven) + model->BSIM3v32bulkJctBotGradingCoeff = 0.5; + if (!model->BSIM3v32bulkJctSideGradingCoeffGiven) + model->BSIM3v32bulkJctSideGradingCoeff = 0.33; + if (!model->BSIM3v32bulkJctGateSideGradingCoeffGiven) + model->BSIM3v32bulkJctGateSideGradingCoeff = model->BSIM3v32bulkJctSideGradingCoeff; + if (!model->BSIM3v32jctEmissionCoeffGiven) + model->BSIM3v32jctEmissionCoeff = 1.0; + if (!model->BSIM3v32jctTempExponentGiven) + model->BSIM3v32jctTempExponent = 3.0; + if (!model->BSIM3v32oxideTrapDensityAGiven) + { if (model->BSIM3v32type == NMOS) + model->BSIM3v32oxideTrapDensityA = 1e20; + else + model->BSIM3v32oxideTrapDensityA=9.9e18; + } + if (!model->BSIM3v32oxideTrapDensityBGiven) + { if (model->BSIM3v32type == NMOS) + model->BSIM3v32oxideTrapDensityB = 5e4; + else + model->BSIM3v32oxideTrapDensityB = 2.4e3; + } + if (!model->BSIM3v32oxideTrapDensityCGiven) + { if (model->BSIM3v32type == NMOS) + model->BSIM3v32oxideTrapDensityC = -1.4e-12; + else + model->BSIM3v32oxideTrapDensityC = 1.4e-12; + + } + if (!model->BSIM3v32emGiven) + model->BSIM3v32em = 4.1e7; /* V/m */ + if (!model->BSIM3v32efGiven) + model->BSIM3v32ef = 1.0; + if (!model->BSIM3v32afGiven) + model->BSIM3v32af = 1.0; + if (!model->BSIM3v32kfGiven) + model->BSIM3v32kf = 0.0; + /* loop through all the instances of the model */ + for (here = model->BSIM3v32instances; here != NULL ; + here=here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner == ARCHme) + { + /* allocate a chunk of the state vector */ + here->BSIM3v32states = *states; + *states += BSIM3v32numStates; + } + + /* perform the parameter defaulting */ + if (!here->BSIM3v32drainAreaGiven) + here->BSIM3v32drainArea = 0.0; + if (!here->BSIM3v32drainPerimeterGiven) + here->BSIM3v32drainPerimeter = 0.0; + if (!here->BSIM3v32drainSquaresGiven) + { + if (model->BSIM3v32acmMod == 0) + here->BSIM3v32drainSquares = 1.0; + else + here->BSIM3v32drainSquares = 0.0; + } + if (!here->BSIM3v32icVBSGiven) + here->BSIM3v32icVBS = 0.0; + if (!here->BSIM3v32icVDSGiven) + here->BSIM3v32icVDS = 0.0; + if (!here->BSIM3v32icVGSGiven) + here->BSIM3v32icVGS = 0.0; + if (!here->BSIM3v32lGiven) + here->BSIM3v32l = 5.0e-6; + if (!here->BSIM3v32sourceAreaGiven) + here->BSIM3v32sourceArea = 0.0; + if (!here->BSIM3v32sourcePerimeterGiven) + here->BSIM3v32sourcePerimeter = 0.0; + if (!here->BSIM3v32sourceSquaresGiven) + { + if (model->BSIM3v32acmMod == 0) + here->BSIM3v32sourceSquares = 1.0; + else + here->BSIM3v32sourceSquares = 0.0; + } + if (!here->BSIM3v32wGiven) + here->BSIM3v32w = 5.0e-6; + if (!here->BSIM3v32nqsModGiven) + here->BSIM3v32nqsMod = 0; + + if (!here->BSIM3v32mGiven) + here->BSIM3v32m = 1; + + /* process drain series resistance */ + if ( ((model->BSIM3v32sheetResistance > 0.0) && + (here->BSIM3v32drainSquares > 0.0) && (here->BSIM3v32dNodePrime == 0)) + ||((model->BSIM3v32sheetResistance > 0.0) && + (model->BSIM3v32hdif > 0.0) && (here->BSIM3v32dNodePrime == 0)) + ||((model->BSIM3v32rd > 0.0) && + (model->BSIM3v32ldif > 0.0) && (here->BSIM3v32dNodePrime == 0)) + ||((model->BSIM3v32rd > 0.0) && + (model->BSIM3v32ld > 0.0) && (here->BSIM3v32dNodePrime == 0)) + ||((model->BSIM3v32rsc > 0.0) && (here->BSIM3v32dNodePrime == 0)) + ) + { error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"drain"); + if(error) return(error); + here->BSIM3v32dNodePrime = tmp->number; + if (ckt->CKTcopyNodesets) { + if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + + } + else + { here->BSIM3v32dNodePrime = here->BSIM3v32dNode; + } + + /* process source series resistance */ + if ( ((model->BSIM3v32sheetResistance > 0.0) && + (here->BSIM3v32sourceSquares > 0.0) && (here->BSIM3v32sNodePrime == 0)) + ||((model->BSIM3v32sheetResistance > 0.0) && + (model->BSIM3v32hdif > 0.0) && (here->BSIM3v32sNodePrime == 0)) + ||((model->BSIM3v32rs > 0.0) && + (model->BSIM3v32ldif > 0.0) && (here->BSIM3v32sNodePrime == 0)) + ||((model->BSIM3v32rs > 0.0) && + (model->BSIM3v32ld > 0.0) && (here->BSIM3v32sNodePrime == 0)) + ||((model->BSIM3v32rsc > 0.0) && (here->BSIM3v32sNodePrime == 0)) + ) + { error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"source"); + if(error) return(error); + here->BSIM3v32sNodePrime = tmp->number; + + if (ckt->CKTcopyNodesets) { + if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + + } + else + { here->BSIM3v32sNodePrime = here->BSIM3v32sNode; + } + + /* internal charge node */ + + if ((here->BSIM3v32nqsMod) && (here->BSIM3v32qNode == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"charge"); + if(error) return(error); + here->BSIM3v32qNode = tmp->number; + } + else + { here->BSIM3v32qNode = 0; + } + + /* set Sparse Matrix Pointers */ + +/* macro to make elements with built in test for out of memory */ +#define TSTALLOC(ptr,first,second) \ +if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\ + return(E_NOMEM);\ +} + + TSTALLOC(BSIM3v32DdPtr, BSIM3v32dNode, BSIM3v32dNode) + TSTALLOC(BSIM3v32GgPtr, BSIM3v32gNode, BSIM3v32gNode) + TSTALLOC(BSIM3v32SsPtr, BSIM3v32sNode, BSIM3v32sNode) + TSTALLOC(BSIM3v32BbPtr, BSIM3v32bNode, BSIM3v32bNode) + TSTALLOC(BSIM3v32DPdpPtr, BSIM3v32dNodePrime, BSIM3v32dNodePrime) + TSTALLOC(BSIM3v32SPspPtr, BSIM3v32sNodePrime, BSIM3v32sNodePrime) + TSTALLOC(BSIM3v32DdpPtr, BSIM3v32dNode, BSIM3v32dNodePrime) + TSTALLOC(BSIM3v32GbPtr, BSIM3v32gNode, BSIM3v32bNode) + TSTALLOC(BSIM3v32GdpPtr, BSIM3v32gNode, BSIM3v32dNodePrime) + TSTALLOC(BSIM3v32GspPtr, BSIM3v32gNode, BSIM3v32sNodePrime) + TSTALLOC(BSIM3v32SspPtr, BSIM3v32sNode, BSIM3v32sNodePrime) + TSTALLOC(BSIM3v32BdpPtr, BSIM3v32bNode, BSIM3v32dNodePrime) + TSTALLOC(BSIM3v32BspPtr, BSIM3v32bNode, BSIM3v32sNodePrime) + TSTALLOC(BSIM3v32DPspPtr, BSIM3v32dNodePrime, BSIM3v32sNodePrime) + TSTALLOC(BSIM3v32DPdPtr, BSIM3v32dNodePrime, BSIM3v32dNode) + TSTALLOC(BSIM3v32BgPtr, BSIM3v32bNode, BSIM3v32gNode) + TSTALLOC(BSIM3v32DPgPtr, BSIM3v32dNodePrime, BSIM3v32gNode) + TSTALLOC(BSIM3v32SPgPtr, BSIM3v32sNodePrime, BSIM3v32gNode) + TSTALLOC(BSIM3v32SPsPtr, BSIM3v32sNodePrime, BSIM3v32sNode) + TSTALLOC(BSIM3v32DPbPtr, BSIM3v32dNodePrime, BSIM3v32bNode) + TSTALLOC(BSIM3v32SPbPtr, BSIM3v32sNodePrime, BSIM3v32bNode) + TSTALLOC(BSIM3v32SPdpPtr, BSIM3v32sNodePrime, BSIM3v32dNodePrime) + + TSTALLOC(BSIM3v32QqPtr, BSIM3v32qNode, BSIM3v32qNode) + + TSTALLOC(BSIM3v32QdpPtr, BSIM3v32qNode, BSIM3v32dNodePrime) + TSTALLOC(BSIM3v32QspPtr, BSIM3v32qNode, BSIM3v32sNodePrime) + TSTALLOC(BSIM3v32QgPtr, BSIM3v32qNode, BSIM3v32gNode) + TSTALLOC(BSIM3v32QbPtr, BSIM3v32qNode, BSIM3v32bNode) + TSTALLOC(BSIM3v32DPqPtr, BSIM3v32dNodePrime, BSIM3v32qNode) + TSTALLOC(BSIM3v32SPqPtr, BSIM3v32sNodePrime, BSIM3v32qNode) + TSTALLOC(BSIM3v32GqPtr, BSIM3v32gNode, BSIM3v32qNode) + TSTALLOC(BSIM3v32BqPtr, BSIM3v32bNode, BSIM3v32qNode) + + } + } + return(OK); +} + +int +BSIM3v32unsetup(inModel,ckt) + GENmodel *inModel; + CKTcircuit *ckt; +{ + BSIM3v32model *model; + BSIM3v32instance *here; + + for (model = (BSIM3v32model *)inModel; model != NULL; + model = model->BSIM3v32nextModel) + { + for (here = model->BSIM3v32instances; here != NULL; + here=here->BSIM3v32nextInstance) + { + if (here->BSIM3v32dNodePrime + && here->BSIM3v32dNodePrime != here->BSIM3v32dNode) + { + CKTdltNNum(ckt, here->BSIM3v32dNodePrime); + here->BSIM3v32dNodePrime = 0; + } + if (here->BSIM3v32sNodePrime + && here->BSIM3v32sNodePrime != here->BSIM3v32sNode) + { + CKTdltNNum(ckt, here->BSIM3v32sNodePrime); + here->BSIM3v32sNodePrime = 0; + } + } + } + return OK; +} + + + + + + diff --git a/src/spicelib/devices/bsim3v32/b3v32temp.c b/src/spicelib/devices/bsim3v32/b3v32temp.c new file mode 100644 index 000000000..afad41eea --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32temp.c @@ -0,0 +1,1043 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3temp.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 + **********/ + +#include "ngspice.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "const.h" +#include "sperror.h" +#include "suffix.h" + +#define Kb 1.3806226e-23 +#define KboQ 8.617087e-5 /* Kb / q where q = 1.60219e-19 */ +#define EPSOX 3.453133e-11 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define Charge_q 1.60219e-19 + + +/* ARGSUSED */ +int +BSIM3v32temp (GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v32model *model = (BSIM3v32model*) inModel; +BSIM3v32instance *here; +struct bsim3SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam; +double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn; +double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom; +double Nvtm, SourceSatCurrent, DrainSatCurrent; +int Size_Not_Found; + + /* loop through all the BSIM3v32 device models */ + for (; model != NULL; model = model->BSIM3v32nextModel) + { Temp = ckt->CKTtemp; + if (model->BSIM3v32bulkJctPotential < 0.1) + { model->BSIM3v32bulkJctPotential = 0.1; + fprintf(stderr, "Given pb is less than 0.1. Pb is set to 0.1.\n"); + } + if (model->BSIM3v32sidewallJctPotential < 0.1) + { model->BSIM3v32sidewallJctPotential = 0.1; + fprintf(stderr, "Given pbsw is less than 0.1. Pbsw is set to 0.1.\n"); + } + if (model->BSIM3v32GatesidewallJctPotential < 0.1) + { model->BSIM3v32GatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswg is less than 0.1. Pbswg is set to 0.1.\n"); + } + /* va: was memory leakage - free old node, (or better use again?) */ + FREE(model->pSizeDependParamKnot); + model->pSizeDependParamKnot = NULL; + pLastKnot = NULL; + + Tnom = model->BSIM3v32tnom; + TRatio = Temp / Tnom; + + model->BSIM3v32vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); + model->BSIM3v32factor1 = sqrt(EPSSI / EPSOX * model->BSIM3v32tox); + + Vtm0 = KboQ * Tnom; + Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0); + ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) + * exp(21.5565981 - Eg0 / (2.0 * Vtm0)); + + model->BSIM3v32vtm = KboQ * Temp; + Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); + if (Temp != Tnom) + { T0 = Eg0 / Vtm0 - Eg / model->BSIM3v32vtm + model->BSIM3v32jctTempExponent + * log(Temp / Tnom); + T1 = exp(T0 / model->BSIM3v32jctEmissionCoeff); + model->BSIM3v32jctTempSatCurDensity = model->BSIM3v32jctSatCurDensity + * T1; + model->BSIM3v32jctSidewallTempSatCurDensity + = model->BSIM3v32jctSidewallSatCurDensity * T1; + } + else + { model->BSIM3v32jctTempSatCurDensity = model->BSIM3v32jctSatCurDensity; + model->BSIM3v32jctSidewallTempSatCurDensity + = model->BSIM3v32jctSidewallSatCurDensity; + } + + if (model->BSIM3v32jctTempSatCurDensity < 0.0) + model->BSIM3v32jctTempSatCurDensity = 0.0; + if (model->BSIM3v32jctSidewallTempSatCurDensity < 0.0) + model->BSIM3v32jctSidewallTempSatCurDensity = 0.0; + + /* Temperature dependence of D/B and S/B diode capacitance begins */ + delTemp = ckt->CKTtemp - model->BSIM3v32tnom; + T0 = model->BSIM3v32tcj * delTemp; + if (T0 >= -1.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitAreaTempJctCap = + model->BSIM3v32unitAreaJctCap * (1.0 + T0); + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitAreaJctCap *= 1.0 + T0; + } + } + else if (model->BSIM3v32unitAreaJctCap > 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitAreaTempJctCap = 0.0; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitAreaJctCap = 0.0; + } + fprintf(stderr, "Temperature effect has caused cj to be negative. Cj is clamped to zero.\n"); + } + T0 = model->BSIM3v32tcjsw * delTemp; + if (T0 >= -1.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthSidewallTempJctCap = + model->BSIM3v32unitLengthSidewallJctCap * (1.0 + T0); + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthSidewallJctCap *= 1.0 + T0; + } + } + else if (model->BSIM3v32unitLengthSidewallJctCap > 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthSidewallTempJctCap = 0.0; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthSidewallJctCap = 0.0; + } + fprintf(stderr, "Temperature effect has caused cjsw to be negative. Cjsw is clamped to zero.\n"); + } + T0 = model->BSIM3v32tcjswg * delTemp; + if (T0 >= -1.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthGateSidewallTempJctCap = + model->BSIM3v32unitLengthGateSidewallJctCap * (1.0 + T0); + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthGateSidewallJctCap *= 1.0 + T0; + } + } + else if (model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthGateSidewallTempJctCap = 0.0; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthGateSidewallJctCap = 0.0; + } + fprintf(stderr, "Temperature effect has caused cjswg to be negative. Cjswg is clamped to zero.\n"); + } + + model->BSIM3v32PhiB = model->BSIM3v32bulkJctPotential + - model->BSIM3v32tpb * delTemp; + if (model->BSIM3v32PhiB < 0.01) + { model->BSIM3v32PhiB = 0.01; + fprintf(stderr, "Temperature effect has caused pb to be less than 0.01. Pb is clamped to 0.01.\n"); + } + model->BSIM3v32PhiBSW = model->BSIM3v32sidewallJctPotential + - model->BSIM3v32tpbsw * delTemp; + if (model->BSIM3v32PhiBSW <= 0.01) + { model->BSIM3v32PhiBSW = 0.01; + fprintf(stderr, "Temperature effect has caused pbsw to be less than 0.01. Pbsw is clamped to 0.01.\n"); + } + model->BSIM3v32PhiBSWG = model->BSIM3v32GatesidewallJctPotential + - model->BSIM3v32tpbswg * delTemp; + if (model->BSIM3v32PhiBSWG <= 0.01) + { model->BSIM3v32PhiBSWG = 0.01; + fprintf(stderr, "Temperature effect has caused pbswg to be less than 0.01. Pbswg is clamped to 0.01.\n"); + } + /* End of junction capacitance */ + + /* loop through all the instances of the model */ + /* MCJ: Length and Width not initialized */ + for (here = model->BSIM3v32instances; here != NULL; + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner != ARCHme) continue; + pSizeDependParamKnot = model->pSizeDependParamKnot; + Size_Not_Found = 1; + while ((pSizeDependParamKnot != NULL) && Size_Not_Found) + { if ((here->BSIM3v32l == pSizeDependParamKnot->Length) + && (here->BSIM3v32w == pSizeDependParamKnot->Width)) + { Size_Not_Found = 0; + here->pParam = pSizeDependParamKnot; + if (model->BSIM3v32intVersion > BSIM3v32V322) + { + pParam = here->pParam; /*bug-fix */ + } + } + else + { pLastKnot = pSizeDependParamKnot; + pSizeDependParamKnot = pSizeDependParamKnot->pNext; + } + } + + if (Size_Not_Found) + { pParam = (struct bsim3SizeDependParam *)malloc( + sizeof(struct bsim3SizeDependParam)); + if (pLastKnot == NULL) + model->pSizeDependParamKnot = pParam; + else + pLastKnot->pNext = pParam; + pParam->pNext = NULL; + here->pParam = pParam; + + Ldrn = here->BSIM3v32l; + Wdrn = here->BSIM3v32w; + pParam->Length = Ldrn; + pParam->Width = Wdrn; + + T0 = pow(Ldrn, model->BSIM3v32Lln); + T1 = pow(Wdrn, model->BSIM3v32Lwn); + tmp1 = model->BSIM3v32Ll / T0 + model->BSIM3v32Lw / T1 + + model->BSIM3v32Lwl / (T0 * T1); + pParam->BSIM3v32dl = model->BSIM3v32Lint + tmp1; + tmp2 = model->BSIM3v32Llc / T0 + model->BSIM3v32Lwc / T1 + + model->BSIM3v32Lwlc / (T0 * T1); + pParam->BSIM3v32dlc = model->BSIM3v32dlc + tmp2; + + T2 = pow(Ldrn, model->BSIM3v32Wln); + T3 = pow(Wdrn, model->BSIM3v32Wwn); + tmp1 = model->BSIM3v32Wl / T2 + model->BSIM3v32Ww / T3 + + model->BSIM3v32Wwl / (T2 * T3); + pParam->BSIM3v32dw = model->BSIM3v32Wint + tmp1; + tmp2 = model->BSIM3v32Wlc / T2 + model->BSIM3v32Wwc / T3 + + model->BSIM3v32Wwlc / (T2 * T3); + pParam->BSIM3v32dwc = model->BSIM3v32dwc + tmp2; + + pParam->BSIM3v32leff = here->BSIM3v32l + model->BSIM3v32xl - 2.0 * pParam->BSIM3v32dl; + if (pParam->BSIM3v32leff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v32modName; + namarray[1] = here->BSIM3v32name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v32: mosfet %s, model %s: Effective channel length <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM3v32weff = here->BSIM3v32w + model->BSIM3v32xw - 2.0 * pParam->BSIM3v32dw; + if (pParam->BSIM3v32weff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v32modName; + namarray[1] = here->BSIM3v32name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v32: mosfet %s, model %s: Effective channel width <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM3v32leffCV = here->BSIM3v32l + model->BSIM3v32xl - 2.0 * pParam->BSIM3v32dlc; + if (pParam->BSIM3v32leffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v32modName; + namarray[1] = here->BSIM3v32name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v32: mosfet %s, model %s: Effective channel length for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM3v32weffCV = here->BSIM3v32w + model->BSIM3v32xw - 2.0 * pParam->BSIM3v32dwc; + if (pParam->BSIM3v32weffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v32modName; + namarray[1] = here->BSIM3v32name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v32: mosfet %s, model %s: Effective channel width for C-V <= 0", + namarray); + return(E_BADPARM); + } + + + if (model->BSIM3v32binUnit == 1) + { Inv_L = 1.0e-6 / pParam->BSIM3v32leff; + Inv_W = 1.0e-6 / pParam->BSIM3v32weff; + Inv_LW = 1.0e-12 / (pParam->BSIM3v32leff + * pParam->BSIM3v32weff); + } + else + { Inv_L = 1.0 / pParam->BSIM3v32leff; + Inv_W = 1.0 / pParam->BSIM3v32weff; + Inv_LW = 1.0 / (pParam->BSIM3v32leff + * pParam->BSIM3v32weff); + } + pParam->BSIM3v32cdsc = model->BSIM3v32cdsc + + model->BSIM3v32lcdsc * Inv_L + + model->BSIM3v32wcdsc * Inv_W + + model->BSIM3v32pcdsc * Inv_LW; + pParam->BSIM3v32cdscb = model->BSIM3v32cdscb + + model->BSIM3v32lcdscb * Inv_L + + model->BSIM3v32wcdscb * Inv_W + + model->BSIM3v32pcdscb * Inv_LW; + + pParam->BSIM3v32cdscd = model->BSIM3v32cdscd + + model->BSIM3v32lcdscd * Inv_L + + model->BSIM3v32wcdscd * Inv_W + + model->BSIM3v32pcdscd * Inv_LW; + + pParam->BSIM3v32cit = model->BSIM3v32cit + + model->BSIM3v32lcit * Inv_L + + model->BSIM3v32wcit * Inv_W + + model->BSIM3v32pcit * Inv_LW; + pParam->BSIM3v32nfactor = model->BSIM3v32nfactor + + model->BSIM3v32lnfactor * Inv_L + + model->BSIM3v32wnfactor * Inv_W + + model->BSIM3v32pnfactor * Inv_LW; + pParam->BSIM3v32xj = model->BSIM3v32xj + + model->BSIM3v32lxj * Inv_L + + model->BSIM3v32wxj * Inv_W + + model->BSIM3v32pxj * Inv_LW; + pParam->BSIM3v32vsat = model->BSIM3v32vsat + + model->BSIM3v32lvsat * Inv_L + + model->BSIM3v32wvsat * Inv_W + + model->BSIM3v32pvsat * Inv_LW; + pParam->BSIM3v32at = model->BSIM3v32at + + model->BSIM3v32lat * Inv_L + + model->BSIM3v32wat * Inv_W + + model->BSIM3v32pat * Inv_LW; + pParam->BSIM3v32a0 = model->BSIM3v32a0 + + model->BSIM3v32la0 * Inv_L + + model->BSIM3v32wa0 * Inv_W + + model->BSIM3v32pa0 * Inv_LW; + + pParam->BSIM3v32ags = model->BSIM3v32ags + + model->BSIM3v32lags * Inv_L + + model->BSIM3v32wags * Inv_W + + model->BSIM3v32pags * Inv_LW; + + pParam->BSIM3v32a1 = model->BSIM3v32a1 + + model->BSIM3v32la1 * Inv_L + + model->BSIM3v32wa1 * Inv_W + + model->BSIM3v32pa1 * Inv_LW; + pParam->BSIM3v32a2 = model->BSIM3v32a2 + + model->BSIM3v32la2 * Inv_L + + model->BSIM3v32wa2 * Inv_W + + model->BSIM3v32pa2 * Inv_LW; + pParam->BSIM3v32keta = model->BSIM3v32keta + + model->BSIM3v32lketa * Inv_L + + model->BSIM3v32wketa * Inv_W + + model->BSIM3v32pketa * Inv_LW; + pParam->BSIM3v32nsub = model->BSIM3v32nsub + + model->BSIM3v32lnsub * Inv_L + + model->BSIM3v32wnsub * Inv_W + + model->BSIM3v32pnsub * Inv_LW; + pParam->BSIM3v32npeak = model->BSIM3v32npeak + + model->BSIM3v32lnpeak * Inv_L + + model->BSIM3v32wnpeak * Inv_W + + model->BSIM3v32pnpeak * Inv_LW; + pParam->BSIM3v32ngate = model->BSIM3v32ngate + + model->BSIM3v32lngate * Inv_L + + model->BSIM3v32wngate * Inv_W + + model->BSIM3v32pngate * Inv_LW; + pParam->BSIM3v32gamma1 = model->BSIM3v32gamma1 + + model->BSIM3v32lgamma1 * Inv_L + + model->BSIM3v32wgamma1 * Inv_W + + model->BSIM3v32pgamma1 * Inv_LW; + pParam->BSIM3v32gamma2 = model->BSIM3v32gamma2 + + model->BSIM3v32lgamma2 * Inv_L + + model->BSIM3v32wgamma2 * Inv_W + + model->BSIM3v32pgamma2 * Inv_LW; + pParam->BSIM3v32vbx = model->BSIM3v32vbx + + model->BSIM3v32lvbx * Inv_L + + model->BSIM3v32wvbx * Inv_W + + model->BSIM3v32pvbx * Inv_LW; + pParam->BSIM3v32vbm = model->BSIM3v32vbm + + model->BSIM3v32lvbm * Inv_L + + model->BSIM3v32wvbm * Inv_W + + model->BSIM3v32pvbm * Inv_LW; + pParam->BSIM3v32xt = model->BSIM3v32xt + + model->BSIM3v32lxt * Inv_L + + model->BSIM3v32wxt * Inv_W + + model->BSIM3v32pxt * Inv_LW; + pParam->BSIM3v32vfb = model->BSIM3v32vfb + + model->BSIM3v32lvfb * Inv_L + + model->BSIM3v32wvfb * Inv_W + + model->BSIM3v32pvfb * Inv_LW; + pParam->BSIM3v32k1 = model->BSIM3v32k1 + + model->BSIM3v32lk1 * Inv_L + + model->BSIM3v32wk1 * Inv_W + + model->BSIM3v32pk1 * Inv_LW; + pParam->BSIM3v32kt1 = model->BSIM3v32kt1 + + model->BSIM3v32lkt1 * Inv_L + + model->BSIM3v32wkt1 * Inv_W + + model->BSIM3v32pkt1 * Inv_LW; + pParam->BSIM3v32kt1l = model->BSIM3v32kt1l + + model->BSIM3v32lkt1l * Inv_L + + model->BSIM3v32wkt1l * Inv_W + + model->BSIM3v32pkt1l * Inv_LW; + pParam->BSIM3v32k2 = model->BSIM3v32k2 + + model->BSIM3v32lk2 * Inv_L + + model->BSIM3v32wk2 * Inv_W + + model->BSIM3v32pk2 * Inv_LW; + pParam->BSIM3v32kt2 = model->BSIM3v32kt2 + + model->BSIM3v32lkt2 * Inv_L + + model->BSIM3v32wkt2 * Inv_W + + model->BSIM3v32pkt2 * Inv_LW; + pParam->BSIM3v32k3 = model->BSIM3v32k3 + + model->BSIM3v32lk3 * Inv_L + + model->BSIM3v32wk3 * Inv_W + + model->BSIM3v32pk3 * Inv_LW; + pParam->BSIM3v32k3b = model->BSIM3v32k3b + + model->BSIM3v32lk3b * Inv_L + + model->BSIM3v32wk3b * Inv_W + + model->BSIM3v32pk3b * Inv_LW; + pParam->BSIM3v32w0 = model->BSIM3v32w0 + + model->BSIM3v32lw0 * Inv_L + + model->BSIM3v32ww0 * Inv_W + + model->BSIM3v32pw0 * Inv_LW; + pParam->BSIM3v32nlx = model->BSIM3v32nlx + + model->BSIM3v32lnlx * Inv_L + + model->BSIM3v32wnlx * Inv_W + + model->BSIM3v32pnlx * Inv_LW; + pParam->BSIM3v32dvt0 = model->BSIM3v32dvt0 + + model->BSIM3v32ldvt0 * Inv_L + + model->BSIM3v32wdvt0 * Inv_W + + model->BSIM3v32pdvt0 * Inv_LW; + pParam->BSIM3v32dvt1 = model->BSIM3v32dvt1 + + model->BSIM3v32ldvt1 * Inv_L + + model->BSIM3v32wdvt1 * Inv_W + + model->BSIM3v32pdvt1 * Inv_LW; + pParam->BSIM3v32dvt2 = model->BSIM3v32dvt2 + + model->BSIM3v32ldvt2 * Inv_L + + model->BSIM3v32wdvt2 * Inv_W + + model->BSIM3v32pdvt2 * Inv_LW; + pParam->BSIM3v32dvt0w = model->BSIM3v32dvt0w + + model->BSIM3v32ldvt0w * Inv_L + + model->BSIM3v32wdvt0w * Inv_W + + model->BSIM3v32pdvt0w * Inv_LW; + pParam->BSIM3v32dvt1w = model->BSIM3v32dvt1w + + model->BSIM3v32ldvt1w * Inv_L + + model->BSIM3v32wdvt1w * Inv_W + + model->BSIM3v32pdvt1w * Inv_LW; + pParam->BSIM3v32dvt2w = model->BSIM3v32dvt2w + + model->BSIM3v32ldvt2w * Inv_L + + model->BSIM3v32wdvt2w * Inv_W + + model->BSIM3v32pdvt2w * Inv_LW; + pParam->BSIM3v32drout = model->BSIM3v32drout + + model->BSIM3v32ldrout * Inv_L + + model->BSIM3v32wdrout * Inv_W + + model->BSIM3v32pdrout * Inv_LW; + pParam->BSIM3v32dsub = model->BSIM3v32dsub + + model->BSIM3v32ldsub * Inv_L + + model->BSIM3v32wdsub * Inv_W + + model->BSIM3v32pdsub * Inv_LW; + pParam->BSIM3v32vth0 = model->BSIM3v32vth0 + + model->BSIM3v32lvth0 * Inv_L + + model->BSIM3v32wvth0 * Inv_W + + model->BSIM3v32pvth0 * Inv_LW; + pParam->BSIM3v32ua = model->BSIM3v32ua + + model->BSIM3v32lua * Inv_L + + model->BSIM3v32wua * Inv_W + + model->BSIM3v32pua * Inv_LW; + pParam->BSIM3v32ua1 = model->BSIM3v32ua1 + + model->BSIM3v32lua1 * Inv_L + + model->BSIM3v32wua1 * Inv_W + + model->BSIM3v32pua1 * Inv_LW; + pParam->BSIM3v32ub = model->BSIM3v32ub + + model->BSIM3v32lub * Inv_L + + model->BSIM3v32wub * Inv_W + + model->BSIM3v32pub * Inv_LW; + pParam->BSIM3v32ub1 = model->BSIM3v32ub1 + + model->BSIM3v32lub1 * Inv_L + + model->BSIM3v32wub1 * Inv_W + + model->BSIM3v32pub1 * Inv_LW; + pParam->BSIM3v32uc = model->BSIM3v32uc + + model->BSIM3v32luc * Inv_L + + model->BSIM3v32wuc * Inv_W + + model->BSIM3v32puc * Inv_LW; + pParam->BSIM3v32uc1 = model->BSIM3v32uc1 + + model->BSIM3v32luc1 * Inv_L + + model->BSIM3v32wuc1 * Inv_W + + model->BSIM3v32puc1 * Inv_LW; + pParam->BSIM3v32u0 = model->BSIM3v32u0 + + model->BSIM3v32lu0 * Inv_L + + model->BSIM3v32wu0 * Inv_W + + model->BSIM3v32pu0 * Inv_LW; + pParam->BSIM3v32ute = model->BSIM3v32ute + + model->BSIM3v32lute * Inv_L + + model->BSIM3v32wute * Inv_W + + model->BSIM3v32pute * Inv_LW; + pParam->BSIM3v32voff = model->BSIM3v32voff + + model->BSIM3v32lvoff * Inv_L + + model->BSIM3v32wvoff * Inv_W + + model->BSIM3v32pvoff * Inv_LW; + pParam->BSIM3v32delta = model->BSIM3v32delta + + model->BSIM3v32ldelta * Inv_L + + model->BSIM3v32wdelta * Inv_W + + model->BSIM3v32pdelta * Inv_LW; + pParam->BSIM3v32rdsw = model->BSIM3v32rdsw + + model->BSIM3v32lrdsw * Inv_L + + model->BSIM3v32wrdsw * Inv_W + + model->BSIM3v32prdsw * Inv_LW; + pParam->BSIM3v32prwg = model->BSIM3v32prwg + + model->BSIM3v32lprwg * Inv_L + + model->BSIM3v32wprwg * Inv_W + + model->BSIM3v32pprwg * Inv_LW; + pParam->BSIM3v32prwb = model->BSIM3v32prwb + + model->BSIM3v32lprwb * Inv_L + + model->BSIM3v32wprwb * Inv_W + + model->BSIM3v32pprwb * Inv_LW; + pParam->BSIM3v32prt = model->BSIM3v32prt + + model->BSIM3v32lprt * Inv_L + + model->BSIM3v32wprt * Inv_W + + model->BSIM3v32pprt * Inv_LW; + pParam->BSIM3v32eta0 = model->BSIM3v32eta0 + + model->BSIM3v32leta0 * Inv_L + + model->BSIM3v32weta0 * Inv_W + + model->BSIM3v32peta0 * Inv_LW; + pParam->BSIM3v32etab = model->BSIM3v32etab + + model->BSIM3v32letab * Inv_L + + model->BSIM3v32wetab * Inv_W + + model->BSIM3v32petab * Inv_LW; + pParam->BSIM3v32pclm = model->BSIM3v32pclm + + model->BSIM3v32lpclm * Inv_L + + model->BSIM3v32wpclm * Inv_W + + model->BSIM3v32ppclm * Inv_LW; + pParam->BSIM3v32pdibl1 = model->BSIM3v32pdibl1 + + model->BSIM3v32lpdibl1 * Inv_L + + model->BSIM3v32wpdibl1 * Inv_W + + model->BSIM3v32ppdibl1 * Inv_LW; + pParam->BSIM3v32pdibl2 = model->BSIM3v32pdibl2 + + model->BSIM3v32lpdibl2 * Inv_L + + model->BSIM3v32wpdibl2 * Inv_W + + model->BSIM3v32ppdibl2 * Inv_LW; + pParam->BSIM3v32pdiblb = model->BSIM3v32pdiblb + + model->BSIM3v32lpdiblb * Inv_L + + model->BSIM3v32wpdiblb * Inv_W + + model->BSIM3v32ppdiblb * Inv_LW; + pParam->BSIM3v32pscbe1 = model->BSIM3v32pscbe1 + + model->BSIM3v32lpscbe1 * Inv_L + + model->BSIM3v32wpscbe1 * Inv_W + + model->BSIM3v32ppscbe1 * Inv_LW; + pParam->BSIM3v32pscbe2 = model->BSIM3v32pscbe2 + + model->BSIM3v32lpscbe2 * Inv_L + + model->BSIM3v32wpscbe2 * Inv_W + + model->BSIM3v32ppscbe2 * Inv_LW; + pParam->BSIM3v32pvag = model->BSIM3v32pvag + + model->BSIM3v32lpvag * Inv_L + + model->BSIM3v32wpvag * Inv_W + + model->BSIM3v32ppvag * Inv_LW; + pParam->BSIM3v32wr = model->BSIM3v32wr + + model->BSIM3v32lwr * Inv_L + + model->BSIM3v32wwr * Inv_W + + model->BSIM3v32pwr * Inv_LW; + pParam->BSIM3v32dwg = model->BSIM3v32dwg + + model->BSIM3v32ldwg * Inv_L + + model->BSIM3v32wdwg * Inv_W + + model->BSIM3v32pdwg * Inv_LW; + pParam->BSIM3v32dwb = model->BSIM3v32dwb + + model->BSIM3v32ldwb * Inv_L + + model->BSIM3v32wdwb * Inv_W + + model->BSIM3v32pdwb * Inv_LW; + pParam->BSIM3v32b0 = model->BSIM3v32b0 + + model->BSIM3v32lb0 * Inv_L + + model->BSIM3v32wb0 * Inv_W + + model->BSIM3v32pb0 * Inv_LW; + pParam->BSIM3v32b1 = model->BSIM3v32b1 + + model->BSIM3v32lb1 * Inv_L + + model->BSIM3v32wb1 * Inv_W + + model->BSIM3v32pb1 * Inv_LW; + pParam->BSIM3v32alpha0 = model->BSIM3v32alpha0 + + model->BSIM3v32lalpha0 * Inv_L + + model->BSIM3v32walpha0 * Inv_W + + model->BSIM3v32palpha0 * Inv_LW; + pParam->BSIM3v32alpha1 = model->BSIM3v32alpha1 + + model->BSIM3v32lalpha1 * Inv_L + + model->BSIM3v32walpha1 * Inv_W + + model->BSIM3v32palpha1 * Inv_LW; + pParam->BSIM3v32beta0 = model->BSIM3v32beta0 + + model->BSIM3v32lbeta0 * Inv_L + + model->BSIM3v32wbeta0 * Inv_W + + model->BSIM3v32pbeta0 * Inv_LW; + /* CV model */ + pParam->BSIM3v32elm = model->BSIM3v32elm + + model->BSIM3v32lelm * Inv_L + + model->BSIM3v32welm * Inv_W + + model->BSIM3v32pelm * Inv_LW; + pParam->BSIM3v32cgsl = model->BSIM3v32cgsl + + model->BSIM3v32lcgsl * Inv_L + + model->BSIM3v32wcgsl * Inv_W + + model->BSIM3v32pcgsl * Inv_LW; + pParam->BSIM3v32cgdl = model->BSIM3v32cgdl + + model->BSIM3v32lcgdl * Inv_L + + model->BSIM3v32wcgdl * Inv_W + + model->BSIM3v32pcgdl * Inv_LW; + pParam->BSIM3v32ckappa = model->BSIM3v32ckappa + + model->BSIM3v32lckappa * Inv_L + + model->BSIM3v32wckappa * Inv_W + + model->BSIM3v32pckappa * Inv_LW; + pParam->BSIM3v32cf = model->BSIM3v32cf + + model->BSIM3v32lcf * Inv_L + + model->BSIM3v32wcf * Inv_W + + model->BSIM3v32pcf * Inv_LW; + pParam->BSIM3v32clc = model->BSIM3v32clc + + model->BSIM3v32lclc * Inv_L + + model->BSIM3v32wclc * Inv_W + + model->BSIM3v32pclc * Inv_LW; + pParam->BSIM3v32cle = model->BSIM3v32cle + + model->BSIM3v32lcle * Inv_L + + model->BSIM3v32wcle * Inv_W + + model->BSIM3v32pcle * Inv_LW; + pParam->BSIM3v32vfbcv = model->BSIM3v32vfbcv + + model->BSIM3v32lvfbcv * Inv_L + + model->BSIM3v32wvfbcv * Inv_W + + model->BSIM3v32pvfbcv * Inv_LW; + pParam->BSIM3v32acde = model->BSIM3v32acde + + model->BSIM3v32lacde * Inv_L + + model->BSIM3v32wacde * Inv_W + + model->BSIM3v32pacde * Inv_LW; + pParam->BSIM3v32moin = model->BSIM3v32moin + + model->BSIM3v32lmoin * Inv_L + + model->BSIM3v32wmoin * Inv_W + + model->BSIM3v32pmoin * Inv_LW; + pParam->BSIM3v32noff = model->BSIM3v32noff + + model->BSIM3v32lnoff * Inv_L + + model->BSIM3v32wnoff * Inv_W + + model->BSIM3v32pnoff * Inv_LW; + pParam->BSIM3v32voffcv = model->BSIM3v32voffcv + + model->BSIM3v32lvoffcv * Inv_L + + model->BSIM3v32wvoffcv * Inv_W + + model->BSIM3v32pvoffcv * Inv_LW; + + pParam->BSIM3v32abulkCVfactor = 1.0 + pow((pParam->BSIM3v32clc + / pParam->BSIM3v32leffCV), + pParam->BSIM3v32cle); + + T0 = (TRatio - 1.0); + pParam->BSIM3v32ua = pParam->BSIM3v32ua + pParam->BSIM3v32ua1 * T0; + pParam->BSIM3v32ub = pParam->BSIM3v32ub + pParam->BSIM3v32ub1 * T0; + pParam->BSIM3v32uc = pParam->BSIM3v32uc + pParam->BSIM3v32uc1 * T0; + if (pParam->BSIM3v32u0 > 1.0) + pParam->BSIM3v32u0 = pParam->BSIM3v32u0 / 1.0e4; + + pParam->BSIM3v32u0temp = pParam->BSIM3v32u0 + * pow(TRatio, pParam->BSIM3v32ute); + pParam->BSIM3v32vsattemp = pParam->BSIM3v32vsat - pParam->BSIM3v32at + * T0; + pParam->BSIM3v32rds0 = (pParam->BSIM3v32rdsw + pParam->BSIM3v32prt * T0) + / pow(pParam->BSIM3v32weff * 1E6, pParam->BSIM3v32wr); + + if (BSIM3v32checkModel(model, here, ckt)) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v32modName; + namarray[1] = here->BSIM3v32name; + (*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM3v32V3.2 parameter checking for %s in model %s", namarray); + return(E_BADPARM); + } + + pParam->BSIM3v32cgdo = (model->BSIM3v32cgdo + pParam->BSIM3v32cf) + * pParam->BSIM3v32weffCV; + pParam->BSIM3v32cgso = (model->BSIM3v32cgso + pParam->BSIM3v32cf) + * pParam->BSIM3v32weffCV; + pParam->BSIM3v32cgbo = model->BSIM3v32cgbo * pParam->BSIM3v32leffCV; + + T0 = pParam->BSIM3v32leffCV * pParam->BSIM3v32leffCV; + pParam->BSIM3v32tconst = pParam->BSIM3v32u0temp * pParam->BSIM3v32elm / (model->BSIM3v32cox + * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV * T0); + + if (!model->BSIM3v32npeakGiven && model->BSIM3v32gamma1Given) + { T0 = pParam->BSIM3v32gamma1 * model->BSIM3v32cox; + pParam->BSIM3v32npeak = 3.021E22 * T0 * T0; + } + + pParam->BSIM3v32phi = 2.0 * Vtm0 + * log(pParam->BSIM3v32npeak / ni); + + pParam->BSIM3v32sqrtPhi = sqrt(pParam->BSIM3v32phi); + pParam->BSIM3v32phis3 = pParam->BSIM3v32sqrtPhi * pParam->BSIM3v32phi; + + pParam->BSIM3v32Xdep0 = sqrt(2.0 * EPSSI / (Charge_q + * pParam->BSIM3v32npeak * 1.0e6)) + * pParam->BSIM3v32sqrtPhi; + pParam->BSIM3v32sqrtXdep0 = sqrt(pParam->BSIM3v32Xdep0); + pParam->BSIM3v32litl = sqrt(3.0 * pParam->BSIM3v32xj + * model->BSIM3v32tox); + pParam->BSIM3v32vbi = Vtm0 * log(1.0e20 + * pParam->BSIM3v32npeak / (ni * ni)); + pParam->BSIM3v32cdep0 = sqrt(Charge_q * EPSSI + * pParam->BSIM3v32npeak * 1.0e6 / 2.0 + / pParam->BSIM3v32phi); + + pParam->BSIM3v32ldeb = sqrt(EPSSI * Vtm0 / (Charge_q + * pParam->BSIM3v32npeak * 1.0e6)) / 3.0; + pParam->BSIM3v32acde *= pow((pParam->BSIM3v32npeak / 2.0e16), -0.25); + + + if (model->BSIM3v32k1Given || model->BSIM3v32k2Given) + { if (!model->BSIM3v32k1Given) + { fprintf(stdout, "Warning: k1 should be specified with k2.\n"); + pParam->BSIM3v32k1 = 0.53; + } + if (!model->BSIM3v32k2Given) + { fprintf(stdout, "Warning: k2 should be specified with k1.\n"); + pParam->BSIM3v32k2 = -0.0186; + } + if (model->BSIM3v32nsubGiven) + fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32xtGiven) + fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32vbxGiven) + fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32gamma1Given) + fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32gamma2Given) + fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); + } + else + { if (!model->BSIM3v32vbxGiven) + pParam->BSIM3v32vbx = pParam->BSIM3v32phi - 7.7348e-4 + * pParam->BSIM3v32npeak + * pParam->BSIM3v32xt * pParam->BSIM3v32xt; + if (pParam->BSIM3v32vbx > 0.0) + pParam->BSIM3v32vbx = -pParam->BSIM3v32vbx; + if (pParam->BSIM3v32vbm > 0.0) + pParam->BSIM3v32vbm = -pParam->BSIM3v32vbm; + + if (!model->BSIM3v32gamma1Given) + pParam->BSIM3v32gamma1 = 5.753e-12 + * sqrt(pParam->BSIM3v32npeak) + / model->BSIM3v32cox; + if (!model->BSIM3v32gamma2Given) + pParam->BSIM3v32gamma2 = 5.753e-12 + * sqrt(pParam->BSIM3v32nsub) + / model->BSIM3v32cox; + + T0 = pParam->BSIM3v32gamma1 - pParam->BSIM3v32gamma2; + T1 = sqrt(pParam->BSIM3v32phi - pParam->BSIM3v32vbx) + - pParam->BSIM3v32sqrtPhi; + T2 = sqrt(pParam->BSIM3v32phi * (pParam->BSIM3v32phi + - pParam->BSIM3v32vbm)) - pParam->BSIM3v32phi; + pParam->BSIM3v32k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v32vbm); + pParam->BSIM3v32k1 = pParam->BSIM3v32gamma2 - 2.0 + * pParam->BSIM3v32k2 * sqrt(pParam->BSIM3v32phi + - pParam->BSIM3v32vbm); + } + + if (pParam->BSIM3v32k2 < 0.0) + { T0 = 0.5 * pParam->BSIM3v32k1 / pParam->BSIM3v32k2; + pParam->BSIM3v32vbsc = 0.9 * (pParam->BSIM3v32phi - T0 * T0); + if (pParam->BSIM3v32vbsc > -3.0) + pParam->BSIM3v32vbsc = -3.0; + else if (pParam->BSIM3v32vbsc < -30.0) + pParam->BSIM3v32vbsc = -30.0; + } + else + { pParam->BSIM3v32vbsc = -30.0; + } + if (pParam->BSIM3v32vbsc > pParam->BSIM3v32vbm) + pParam->BSIM3v32vbsc = pParam->BSIM3v32vbm; + + if (!model->BSIM3v32vfbGiven) + { if (model->BSIM3v32vth0Given) + { pParam->BSIM3v32vfb = model->BSIM3v32type * pParam->BSIM3v32vth0 + - pParam->BSIM3v32phi - pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi; + } + else + { pParam->BSIM3v32vfb = -1.0; + } + } + if (!model->BSIM3v32vth0Given) + { pParam->BSIM3v32vth0 = model->BSIM3v32type * (pParam->BSIM3v32vfb + + pParam->BSIM3v32phi + pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi); + } + + pParam->BSIM3v32k1ox = pParam->BSIM3v32k1 * model->BSIM3v32tox + / model->BSIM3v32toxm; + pParam->BSIM3v32k2ox = pParam->BSIM3v32k2 * model->BSIM3v32tox + / model->BSIM3v32toxm; + + T1 = sqrt(EPSSI / EPSOX * model->BSIM3v32tox + * pParam->BSIM3v32Xdep0); + T0 = exp(-0.5 * pParam->BSIM3v32dsub * pParam->BSIM3v32leff / T1); + pParam->BSIM3v32theta0vb0 = (T0 + 2.0 * T0 * T0); + + T0 = exp(-0.5 * pParam->BSIM3v32drout * pParam->BSIM3v32leff / T1); + T2 = (T0 + 2.0 * T0 * T0); + pParam->BSIM3v32thetaRout = pParam->BSIM3v32pdibl1 * T2 + + pParam->BSIM3v32pdibl2; + + tmp = sqrt(pParam->BSIM3v32Xdep0); + tmp1 = pParam->BSIM3v32vbi - pParam->BSIM3v32phi; + tmp2 = model->BSIM3v32factor1 * tmp; + + T0 = -0.5 * pParam->BSIM3v32dvt1w * pParam->BSIM3v32weff + * pParam->BSIM3v32leff / tmp2; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 * (1.0 + 2.0 * T1); + } + else + { T1 = MIN_EXP; + T2 = T1 * (1.0 + 2.0 * T1); + } + T0 = pParam->BSIM3v32dvt0w * T2; + T2 = T0 * tmp1; + + T0 = -0.5 * pParam->BSIM3v32dvt1 * pParam->BSIM3v32leff / tmp2; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + T3 = T1 * (1.0 + 2.0 * T1); + } + else + { T1 = MIN_EXP; + T3 = T1 * (1.0 + 2.0 * T1); + } + T3 = pParam->BSIM3v32dvt0 * T3 * tmp1; + + T4 = model->BSIM3v32tox * pParam->BSIM3v32phi + / (pParam->BSIM3v32weff + pParam->BSIM3v32w0); + + T0 = sqrt(1.0 + pParam->BSIM3v32nlx / pParam->BSIM3v32leff); + T5 = pParam->BSIM3v32k1ox * (T0 - 1.0) * pParam->BSIM3v32sqrtPhi + + (pParam->BSIM3v32kt1 + pParam->BSIM3v32kt1l / pParam->BSIM3v32leff) + * (TRatio - 1.0); + + tmp3 = model->BSIM3v32type * pParam->BSIM3v32vth0 + - T2 - T3 + pParam->BSIM3v32k3 * T4 + T5; + pParam->BSIM3v32vfbzb = tmp3 - pParam->BSIM3v32phi - pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi; + /* End of vfbzb */ + } + else /* !Size_Not_Found */ + { + /* va: pParam might be uninitialized, if !Size_Not_Found */ + pParam = here->pParam; + } + + /* process source/drain series resistance */ + /* acm model */ + if (model->BSIM3v32acmMod == 0) + { + here->BSIM3v32drainConductance = model->BSIM3v32sheetResistance + * here->BSIM3v32drainSquares; + here->BSIM3v32sourceConductance = model->BSIM3v32sheetResistance + * here->BSIM3v32sourceSquares; + } + else + { + if (here->BSIM3v32drainSquaresGiven) + { + here->BSIM3v32drainConductance = (model->BSIM3v32ld + model->BSIM3v32ldif)/(here->BSIM3v32w + model->BSIM3v32xw)*model->BSIM3v32rd + + model->BSIM3v32sheetResistance * here->BSIM3v32drainSquares + model->BSIM3v32rdc; + } + else + { + here->BSIM3v32drainConductance = ((model->BSIM3v32ld + model->BSIM3v32ldif)*model->BSIM3v32rd + + model->BSIM3v32hdif*model->BSIM3v32sheetResistance)/(here->BSIM3v32w + model->BSIM3v32xw) + model->BSIM3v32rdc; + } + if (here->BSIM3v32sourceSquaresGiven) + { + here->BSIM3v32sourceConductance = (model->BSIM3v32ld + model->BSIM3v32ldif)/(here->BSIM3v32w + model->BSIM3v32xw)*model->BSIM3v32rs + + model->BSIM3v32sheetResistance * here->BSIM3v32sourceSquares + model->BSIM3v32rsc; + } + else + { + here->BSIM3v32sourceConductance = ((model->BSIM3v32ld + model->BSIM3v32ldif)*model->BSIM3v32rs + + model->BSIM3v32hdif*model->BSIM3v32sheetResistance)/(here->BSIM3v32w + model->BSIM3v32xw) + model->BSIM3v32rsc; + } + } + if (here->BSIM3v32drainConductance > 0.0) + here->BSIM3v32drainConductance = 1.0 + / here->BSIM3v32drainConductance; + else + here->BSIM3v32drainConductance = 0.0; + + if (here->BSIM3v32sourceConductance > 0.0) + here->BSIM3v32sourceConductance = 1.0 + / here->BSIM3v32sourceConductance; + else + here->BSIM3v32sourceConductance = 0.0; + + here->BSIM3v32cgso = pParam->BSIM3v32cgso; + here->BSIM3v32cgdo = pParam->BSIM3v32cgdo; + + Nvtm = model->BSIM3v32vtm * model->BSIM3v32jctEmissionCoeff; + if (model->BSIM3v32acmMod == 0) + { + if ((here->BSIM3v32sourceArea <= 0.0) && + (here->BSIM3v32sourcePerimeter <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM3v32sourceArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32sourcePerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + if ((SourceSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjsm = Nvtm * log(model->BSIM3v32ijth + / SourceSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjsm = + SourceSatCurrent * exp(here->BSIM3v32vjsm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } + + if ((here->BSIM3v32drainArea <= 0.0) && + (here->BSIM3v32drainPerimeter <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM3v32drainArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32drainPerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + if ((DrainSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjdm = Nvtm * log(model->BSIM3v32ijth + / DrainSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjdm = + DrainSatCurrent * exp(here->BSIM3v32vjdm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } + } + else + { + SourceSatCurrent = 0.0; + if (!here->BSIM3v32sourceAreaGiven) + { + here->BSIM3v32sourceArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; + } + SourceSatCurrent = here->BSIM3v32sourceArea * model->BSIM3v32jctTempSatCurDensity; + if (!here->BSIM3v32sourcePerimeterGiven) + { + here->BSIM3v32sourcePerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; + } + SourceSatCurrent = SourceSatCurrent + here->BSIM3v32sourcePerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; + if (SourceSatCurrent <= 0.0) SourceSatCurrent = 1.0e-14; + if ((SourceSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjsm = Nvtm * log(model->BSIM3v32ijth + / SourceSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjsm = + SourceSatCurrent * exp(here->BSIM3v32vjsm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } + + DrainSatCurrent = 0.0; + if (!here->BSIM3v32drainAreaGiven) + { + here->BSIM3v32drainArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; + } + DrainSatCurrent = here->BSIM3v32drainArea * model->BSIM3v32jctTempSatCurDensity; + if (!here->BSIM3v32drainPerimeterGiven) + { + here->BSIM3v32drainPerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; + } + DrainSatCurrent = DrainSatCurrent + here->BSIM3v32drainPerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; + if (DrainSatCurrent <= 0.0) DrainSatCurrent = 1.0e-14; + if ((DrainSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjdm = Nvtm * log(model->BSIM3v32ijth + / DrainSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjdm = + DrainSatCurrent * exp(here->BSIM3v32vjdm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } + } + } + } + return(OK); +} + diff --git a/src/spicelib/devices/bsim3v32/b3v32trunc.c b/src/spicelib/devices/bsim3v32/b3v32trunc.c new file mode 100644 index 000000000..9e0c1d32e --- /dev/null +++ b/src/spicelib/devices/bsim3v32/b3v32trunc.c @@ -0,0 +1,50 @@ +/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b3trunc.c of BSIM3v3.2.4 + * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1997-1999 Weidong Liu. + * Author: 2001 Xuemei Xi + * Modified by Poalo Nenzi 2002 + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v32def.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v32trunc (GENmodel *inModel, CKTcircuit *ckt, double *timeStep) +{ +BSIM3v32model *model = (BSIM3v32model*)inModel; +BSIM3v32instance *here; + +#ifdef STEPDEBUG + double debugtemp; +#endif /* STEPDEBUG */ + + for (; model != NULL; model = model->BSIM3v32nextModel) + { for (here = model->BSIM3v32instances; here != NULL; + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32owner != ARCHme) + continue; +#ifdef STEPDEBUG + debugtemp = *timeStep; +#endif /* STEPDEBUG */ + CKTterr(here->BSIM3v32qb,ckt,timeStep); + CKTterr(here->BSIM3v32qg,ckt,timeStep); + CKTterr(here->BSIM3v32qd,ckt,timeStep); +#ifdef STEPDEBUG + if(debugtemp != *timeStep) + { printf("device %s reduces step from %g to %g\n", + here->BSIM3v32name,debugtemp,*timeStep); + } +#endif /* STEPDEBUG */ + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim3v32/bsim3v32def.h b/src/spicelib/devices/bsim3v32/bsim3v32def.h new file mode 100644 index 000000000..bb4aceaab --- /dev/null +++ b/src/spicelib/devices/bsim3v32/bsim3v32def.h @@ -0,0 +1,1810 @@ +/********** +Copyright 2001 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Author: 1997-1999 Weidong Liu. +Author: 2001 Xuemei Xi +Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 +File: bsim3v32def.h +**********/ + +#ifndef BSIM3v32 +#define BSIM3v32 + +#include "ifsim.h" +#include "gendefs.h" +#include "cktdefs.h" +#include "complex.h" +#include "noisedef.h" + +typedef struct sBSIM3v32instance +{ + struct sBSIM3v32model *BSIM3v32modPtr; + struct sBSIM3v32instance *BSIM3v32nextInstance; + IFuid BSIM3v32name; + int BSIM3v32owner; /* number of owner process */ + int BSIM3v32states; /* index into state table for this device */ + int BSIM3v32dNode; + int BSIM3v32gNode; + int BSIM3v32sNode; + int BSIM3v32bNode; + int BSIM3v32dNodePrime; + int BSIM3v32sNodePrime; + int BSIM3v32qNode; /* MCJ */ + + /* MCJ */ + double BSIM3v32ueff; + double BSIM3v32thetavth; + double BSIM3v32von; + double BSIM3v32vdsat; + double BSIM3v32cgdo; + double BSIM3v32cgso; + double BSIM3v32vjsm; + double BSIM3v32IsEvjsm; + double BSIM3v32vjdm; + double BSIM3v32IsEvjdm; + + double BSIM3v32l; + double BSIM3v32w; + double BSIM3v32m; + double BSIM3v32drainArea; + double BSIM3v32sourceArea; + double BSIM3v32drainSquares; + double BSIM3v32sourceSquares; + double BSIM3v32drainPerimeter; + double BSIM3v32sourcePerimeter; + double BSIM3v32sourceConductance; + double BSIM3v32drainConductance; + + double BSIM3v32icVBS; + double BSIM3v32icVDS; + double BSIM3v32icVGS; + int BSIM3v32off; + int BSIM3v32mode; + int BSIM3v32nqsMod; + + /* OP point */ + double BSIM3v32qinv; + double BSIM3v32cd; + double BSIM3v32cbs; + double BSIM3v32cbd; + double BSIM3v32csub; + double BSIM3v32gm; + double BSIM3v32gds; + double BSIM3v32gmbs; + double BSIM3v32gbd; + double BSIM3v32gbs; + + double BSIM3v32gbbs; + double BSIM3v32gbgs; + double BSIM3v32gbds; + + double BSIM3v32cggb; + double BSIM3v32cgdb; + double BSIM3v32cgsb; + double BSIM3v32cbgb; + double BSIM3v32cbdb; + double BSIM3v32cbsb; + double BSIM3v32cdgb; + double BSIM3v32cddb; + double BSIM3v32cdsb; + double BSIM3v32capbd; + double BSIM3v32capbs; + + double BSIM3v32cqgb; + double BSIM3v32cqdb; + double BSIM3v32cqsb; + double BSIM3v32cqbb; + + double BSIM3v32qgate; + double BSIM3v32qbulk; + double BSIM3v32qdrn; + + double BSIM3v32gtau; + double BSIM3v32gtg; + double BSIM3v32gtd; + double BSIM3v32gts; + double BSIM3v32gtb; + double BSIM3v32rds; /* Noise bugfix */ + double BSIM3v32Vgsteff; + double BSIM3v32Vdseff; + double BSIM3v32Abulk; + double BSIM3v32AbovVgst2Vtm; + + struct bsim3SizeDependParam *pParam; + + unsigned BSIM3v32lGiven :1; + unsigned BSIM3v32wGiven :1; + unsigned BSIM3v32mGiven :1; + unsigned BSIM3v32drainAreaGiven :1; + unsigned BSIM3v32sourceAreaGiven :1; + unsigned BSIM3v32drainSquaresGiven :1; + unsigned BSIM3v32sourceSquaresGiven :1; + unsigned BSIM3v32drainPerimeterGiven :1; + unsigned BSIM3v32sourcePerimeterGiven :1; + unsigned BSIM3v32dNodePrimeSet :1; + unsigned BSIM3v32sNodePrimeSet :1; + unsigned BSIM3v32icVBSGiven :1; + unsigned BSIM3v32icVDSGiven :1; + unsigned BSIM3v32icVGSGiven :1; + unsigned BSIM3v32nqsModGiven :1; + + double *BSIM3v32DdPtr; + double *BSIM3v32GgPtr; + double *BSIM3v32SsPtr; + double *BSIM3v32BbPtr; + double *BSIM3v32DPdpPtr; + double *BSIM3v32SPspPtr; + double *BSIM3v32DdpPtr; + double *BSIM3v32GbPtr; + double *BSIM3v32GdpPtr; + double *BSIM3v32GspPtr; + double *BSIM3v32SspPtr; + double *BSIM3v32BdpPtr; + double *BSIM3v32BspPtr; + double *BSIM3v32DPspPtr; + double *BSIM3v32DPdPtr; + double *BSIM3v32BgPtr; + double *BSIM3v32DPgPtr; + double *BSIM3v32SPgPtr; + double *BSIM3v32SPsPtr; + double *BSIM3v32DPbPtr; + double *BSIM3v32SPbPtr; + double *BSIM3v32SPdpPtr; + + double *BSIM3v32QqPtr; + double *BSIM3v32QdpPtr; + double *BSIM3v32QgPtr; + double *BSIM3v32QspPtr; + double *BSIM3v32QbPtr; + double *BSIM3v32DPqPtr; + double *BSIM3v32GqPtr; + double *BSIM3v32SPqPtr; + double *BSIM3v32BqPtr; + +#define BSIM3v32vbd BSIM3v32states+ 0 +#define BSIM3v32vbs BSIM3v32states+ 1 +#define BSIM3v32vgs BSIM3v32states+ 2 +#define BSIM3v32vds BSIM3v32states+ 3 + +#define BSIM3v32qb BSIM3v32states+ 4 +#define BSIM3v32cqb BSIM3v32states+ 5 +#define BSIM3v32qg BSIM3v32states+ 6 +#define BSIM3v32cqg BSIM3v32states+ 7 +#define BSIM3v32qd BSIM3v32states+ 8 +#define BSIM3v32cqd BSIM3v32states+ 9 + +#define BSIM3v32qbs BSIM3v32states+ 10 +#define BSIM3v32qbd BSIM3v32states+ 11 + +#define BSIM3v32qcheq BSIM3v32states+ 12 +#define BSIM3v32cqcheq BSIM3v32states+ 13 +#define BSIM3v32qcdump BSIM3v32states+ 14 +#define BSIM3v32cqcdump BSIM3v32states+ 15 + +#define BSIM3v32qdef BSIM3v32states+ 16 + +#define BSIM3v32numStates 17 + + +/* indices to the array of BSIM3v32 NOISE SOURCES */ + +#define BSIM3v32RDNOIZ 0 +#define BSIM3v32RSNOIZ 1 +#define BSIM3v32IDNOIZ 2 +#define BSIM3v32FLNOIZ 3 +#define BSIM3v32TOTNOIZ 4 + +#define BSIM3v32NSRCS 5 /* the number of BSIM3v32 MOSFET noise sources */ + +#ifndef NONOISE + double BSIM3v32nVar[NSTATVARS][BSIM3v32NSRCS]; +#else /* NONOISE */ + double **BSIM3v32nVar; +#endif /* NONOISE */ + +} BSIM3v32instance ; + +struct bsim3SizeDependParam +{ + double Width; + double Length; + + double BSIM3v32cdsc; + double BSIM3v32cdscb; + double BSIM3v32cdscd; + double BSIM3v32cit; + double BSIM3v32nfactor; + double BSIM3v32xj; + double BSIM3v32vsat; + double BSIM3v32at; + double BSIM3v32a0; + double BSIM3v32ags; + double BSIM3v32a1; + double BSIM3v32a2; + double BSIM3v32keta; + double BSIM3v32nsub; + double BSIM3v32npeak; + double BSIM3v32ngate; + double BSIM3v32gamma1; + double BSIM3v32gamma2; + double BSIM3v32vbx; + double BSIM3v32vbi; + double BSIM3v32vbm; + double BSIM3v32vbsc; + double BSIM3v32xt; + double BSIM3v32phi; + double BSIM3v32litl; + double BSIM3v32k1; + double BSIM3v32kt1; + double BSIM3v32kt1l; + double BSIM3v32kt2; + double BSIM3v32k2; + double BSIM3v32k3; + double BSIM3v32k3b; + double BSIM3v32w0; + double BSIM3v32nlx; + double BSIM3v32dvt0; + double BSIM3v32dvt1; + double BSIM3v32dvt2; + double BSIM3v32dvt0w; + double BSIM3v32dvt1w; + double BSIM3v32dvt2w; + double BSIM3v32drout; + double BSIM3v32dsub; + double BSIM3v32vth0; + double BSIM3v32ua; + double BSIM3v32ua1; + double BSIM3v32ub; + double BSIM3v32ub1; + double BSIM3v32uc; + double BSIM3v32uc1; + double BSIM3v32u0; + double BSIM3v32ute; + double BSIM3v32voff; + double BSIM3v32vfb; + double BSIM3v32delta; + double BSIM3v32rdsw; + double BSIM3v32rds0; + double BSIM3v32prwg; + double BSIM3v32prwb; + double BSIM3v32prt; + double BSIM3v32eta0; + double BSIM3v32etab; + double BSIM3v32pclm; + double BSIM3v32pdibl1; + double BSIM3v32pdibl2; + double BSIM3v32pdiblb; + double BSIM3v32pscbe1; + double BSIM3v32pscbe2; + double BSIM3v32pvag; + double BSIM3v32wr; + double BSIM3v32dwg; + double BSIM3v32dwb; + double BSIM3v32b0; + double BSIM3v32b1; + double BSIM3v32alpha0; + double BSIM3v32alpha1; + double BSIM3v32beta0; + + + /* CV model */ + double BSIM3v32elm; + double BSIM3v32cgsl; + double BSIM3v32cgdl; + double BSIM3v32ckappa; + double BSIM3v32cf; + double BSIM3v32clc; + double BSIM3v32cle; + double BSIM3v32vfbcv; + double BSIM3v32noff; + double BSIM3v32voffcv; + double BSIM3v32acde; + double BSIM3v32moin; + + +/* Pre-calculated constants */ + + double BSIM3v32dw; + double BSIM3v32dl; + double BSIM3v32leff; + double BSIM3v32weff; + + double BSIM3v32dwc; + double BSIM3v32dlc; + double BSIM3v32leffCV; + double BSIM3v32weffCV; + double BSIM3v32abulkCVfactor; + double BSIM3v32cgso; + double BSIM3v32cgdo; + double BSIM3v32cgbo; + double BSIM3v32tconst; + + double BSIM3v32u0temp; + double BSIM3v32vsattemp; + double BSIM3v32sqrtPhi; + double BSIM3v32phis3; + double BSIM3v32Xdep0; + double BSIM3v32sqrtXdep0; + double BSIM3v32theta0vb0; + double BSIM3v32thetaRout; + + double BSIM3v32cof1; + double BSIM3v32cof2; + double BSIM3v32cof3; + double BSIM3v32cof4; + double BSIM3v32cdep0; + double BSIM3v32vfbzb; + double BSIM3v32ldeb; + double BSIM3v32k1ox; + double BSIM3v32k2ox; + + struct bsim3SizeDependParam *pNext; +}; + + +typedef struct sBSIM3v32model +{ + int BSIM3v32modType; + struct sBSIM3v32model *BSIM3v32nextModel; + BSIM3v32instance *BSIM3v32instances; + IFuid BSIM3v32modName; + int BSIM3v32type; + + int BSIM3v32mobMod; + int BSIM3v32capMod; + int BSIM3v32acmMod; + int BSIM3v32noiMod; + int BSIM3v32binUnit; + int BSIM3v32paramChk; + char *BSIM3v32version; + /* The following field is an integer coding + * of BSIM3v32version. + */ + int BSIM3v32intVersion; +#define BSIM3v32V324 324 /* BSIM3v32 V3.2.4 */ +#define BSIM3v32V323 323 /* BSIM3v32 V3.2.3 */ +#define BSIM3v32V322 322 /* BSIM3v32 V3.2.2 */ +#define BSIM3v32V32 32 /* BSIM3v32 V3.2 */ +#define BSIM3v32V3OLD 0 /* Old model */ + double BSIM3v32tox; + double BSIM3v32toxm; + double BSIM3v32cdsc; + double BSIM3v32cdscb; + double BSIM3v32cdscd; + double BSIM3v32cit; + double BSIM3v32nfactor; + double BSIM3v32xj; + double BSIM3v32vsat; + double BSIM3v32at; + double BSIM3v32a0; + double BSIM3v32ags; + double BSIM3v32a1; + double BSIM3v32a2; + double BSIM3v32keta; + double BSIM3v32nsub; + double BSIM3v32npeak; + double BSIM3v32ngate; + double BSIM3v32gamma1; + double BSIM3v32gamma2; + double BSIM3v32vbx; + double BSIM3v32vbm; + double BSIM3v32xt; + double BSIM3v32k1; + double BSIM3v32kt1; + double BSIM3v32kt1l; + double BSIM3v32kt2; + double BSIM3v32k2; + double BSIM3v32k3; + double BSIM3v32k3b; + double BSIM3v32w0; + double BSIM3v32nlx; + double BSIM3v32dvt0; + double BSIM3v32dvt1; + double BSIM3v32dvt2; + double BSIM3v32dvt0w; + double BSIM3v32dvt1w; + double BSIM3v32dvt2w; + double BSIM3v32drout; + double BSIM3v32dsub; + double BSIM3v32vth0; + double BSIM3v32ua; + double BSIM3v32ua1; + double BSIM3v32ub; + double BSIM3v32ub1; + double BSIM3v32uc; + double BSIM3v32uc1; + double BSIM3v32u0; + double BSIM3v32ute; + double BSIM3v32voff; + double BSIM3v32delta; + double BSIM3v32rdsw; + double BSIM3v32prwg; + double BSIM3v32prwb; + double BSIM3v32prt; + double BSIM3v32eta0; + double BSIM3v32etab; + double BSIM3v32pclm; + double BSIM3v32pdibl1; + double BSIM3v32pdibl2; + double BSIM3v32pdiblb; + double BSIM3v32pscbe1; + double BSIM3v32pscbe2; + double BSIM3v32pvag; + double BSIM3v32wr; + double BSIM3v32dwg; + double BSIM3v32dwb; + double BSIM3v32b0; + double BSIM3v32b1; + double BSIM3v32alpha0; + double BSIM3v32alpha1; + double BSIM3v32beta0; + double BSIM3v32ijth; + double BSIM3v32vfb; + + /* CV model */ + double BSIM3v32elm; + double BSIM3v32cgsl; + double BSIM3v32cgdl; + double BSIM3v32ckappa; + double BSIM3v32cf; + double BSIM3v32vfbcv; + double BSIM3v32clc; + double BSIM3v32cle; + double BSIM3v32dwc; + double BSIM3v32dlc; + double BSIM3v32noff; + double BSIM3v32voffcv; + double BSIM3v32acde; + double BSIM3v32moin; + double BSIM3v32tcj; + double BSIM3v32tcjsw; + double BSIM3v32tcjswg; + double BSIM3v32tpb; + double BSIM3v32tpbsw; + double BSIM3v32tpbswg; + + /* acm model */ + double BSIM3v32hdif; + double BSIM3v32ldif; + double BSIM3v32ld; + double BSIM3v32rd; + double BSIM3v32rs; + double BSIM3v32rdc; + double BSIM3v32rsc; + + /* Length Dependence */ + double BSIM3v32lcdsc; + double BSIM3v32lcdscb; + double BSIM3v32lcdscd; + double BSIM3v32lcit; + double BSIM3v32lnfactor; + double BSIM3v32lxj; + double BSIM3v32lvsat; + double BSIM3v32lat; + double BSIM3v32la0; + double BSIM3v32lags; + double BSIM3v32la1; + double BSIM3v32la2; + double BSIM3v32lketa; + double BSIM3v32lnsub; + double BSIM3v32lnpeak; + double BSIM3v32lngate; + double BSIM3v32lgamma1; + double BSIM3v32lgamma2; + double BSIM3v32lvbx; + double BSIM3v32lvbm; + double BSIM3v32lxt; + double BSIM3v32lk1; + double BSIM3v32lkt1; + double BSIM3v32lkt1l; + double BSIM3v32lkt2; + double BSIM3v32lk2; + double BSIM3v32lk3; + double BSIM3v32lk3b; + double BSIM3v32lw0; + double BSIM3v32lnlx; + double BSIM3v32ldvt0; + double BSIM3v32ldvt1; + double BSIM3v32ldvt2; + double BSIM3v32ldvt0w; + double BSIM3v32ldvt1w; + double BSIM3v32ldvt2w; + double BSIM3v32ldrout; + double BSIM3v32ldsub; + double BSIM3v32lvth0; + double BSIM3v32lua; + double BSIM3v32lua1; + double BSIM3v32lub; + double BSIM3v32lub1; + double BSIM3v32luc; + double BSIM3v32luc1; + double BSIM3v32lu0; + double BSIM3v32lute; + double BSIM3v32lvoff; + double BSIM3v32ldelta; + double BSIM3v32lrdsw; + double BSIM3v32lprwg; + double BSIM3v32lprwb; + double BSIM3v32lprt; + double BSIM3v32leta0; + double BSIM3v32letab; + double BSIM3v32lpclm; + double BSIM3v32lpdibl1; + double BSIM3v32lpdibl2; + double BSIM3v32lpdiblb; + double BSIM3v32lpscbe1; + double BSIM3v32lpscbe2; + double BSIM3v32lpvag; + double BSIM3v32lwr; + double BSIM3v32ldwg; + double BSIM3v32ldwb; + double BSIM3v32lb0; + double BSIM3v32lb1; + double BSIM3v32lalpha0; + double BSIM3v32lalpha1; + double BSIM3v32lbeta0; + double BSIM3v32lvfb; + + /* CV model */ + double BSIM3v32lelm; + double BSIM3v32lcgsl; + double BSIM3v32lcgdl; + double BSIM3v32lckappa; + double BSIM3v32lcf; + double BSIM3v32lclc; + double BSIM3v32lcle; + double BSIM3v32lvfbcv; + double BSIM3v32lnoff; + double BSIM3v32lvoffcv; + double BSIM3v32lacde; + double BSIM3v32lmoin; + + /* Width Dependence */ + double BSIM3v32wcdsc; + double BSIM3v32wcdscb; + double BSIM3v32wcdscd; + double BSIM3v32wcit; + double BSIM3v32wnfactor; + double BSIM3v32wxj; + double BSIM3v32wvsat; + double BSIM3v32wat; + double BSIM3v32wa0; + double BSIM3v32wags; + double BSIM3v32wa1; + double BSIM3v32wa2; + double BSIM3v32wketa; + double BSIM3v32wnsub; + double BSIM3v32wnpeak; + double BSIM3v32wngate; + double BSIM3v32wgamma1; + double BSIM3v32wgamma2; + double BSIM3v32wvbx; + double BSIM3v32wvbm; + double BSIM3v32wxt; + double BSIM3v32wk1; + double BSIM3v32wkt1; + double BSIM3v32wkt1l; + double BSIM3v32wkt2; + double BSIM3v32wk2; + double BSIM3v32wk3; + double BSIM3v32wk3b; + double BSIM3v32ww0; + double BSIM3v32wnlx; + double BSIM3v32wdvt0; + double BSIM3v32wdvt1; + double BSIM3v32wdvt2; + double BSIM3v32wdvt0w; + double BSIM3v32wdvt1w; + double BSIM3v32wdvt2w; + double BSIM3v32wdrout; + double BSIM3v32wdsub; + double BSIM3v32wvth0; + double BSIM3v32wua; + double BSIM3v32wua1; + double BSIM3v32wub; + double BSIM3v32wub1; + double BSIM3v32wuc; + double BSIM3v32wuc1; + double BSIM3v32wu0; + double BSIM3v32wute; + double BSIM3v32wvoff; + double BSIM3v32wdelta; + double BSIM3v32wrdsw; + double BSIM3v32wprwg; + double BSIM3v32wprwb; + double BSIM3v32wprt; + double BSIM3v32weta0; + double BSIM3v32wetab; + double BSIM3v32wpclm; + double BSIM3v32wpdibl1; + double BSIM3v32wpdibl2; + double BSIM3v32wpdiblb; + double BSIM3v32wpscbe1; + double BSIM3v32wpscbe2; + double BSIM3v32wpvag; + double BSIM3v32wwr; + double BSIM3v32wdwg; + double BSIM3v32wdwb; + double BSIM3v32wb0; + double BSIM3v32wb1; + double BSIM3v32walpha0; + double BSIM3v32walpha1; + double BSIM3v32wbeta0; + double BSIM3v32wvfb; + + /* CV model */ + double BSIM3v32welm; + double BSIM3v32wcgsl; + double BSIM3v32wcgdl; + double BSIM3v32wckappa; + double BSIM3v32wcf; + double BSIM3v32wclc; + double BSIM3v32wcle; + double BSIM3v32wvfbcv; + double BSIM3v32wnoff; + double BSIM3v32wvoffcv; + double BSIM3v32wacde; + double BSIM3v32wmoin; + + /* Cross-term Dependence */ + double BSIM3v32pcdsc; + double BSIM3v32pcdscb; + double BSIM3v32pcdscd; + double BSIM3v32pcit; + double BSIM3v32pnfactor; + double BSIM3v32pxj; + double BSIM3v32pvsat; + double BSIM3v32pat; + double BSIM3v32pa0; + double BSIM3v32pags; + double BSIM3v32pa1; + double BSIM3v32pa2; + double BSIM3v32pketa; + double BSIM3v32pnsub; + double BSIM3v32pnpeak; + double BSIM3v32pngate; + double BSIM3v32pgamma1; + double BSIM3v32pgamma2; + double BSIM3v32pvbx; + double BSIM3v32pvbm; + double BSIM3v32pxt; + double BSIM3v32pk1; + double BSIM3v32pkt1; + double BSIM3v32pkt1l; + double BSIM3v32pkt2; + double BSIM3v32pk2; + double BSIM3v32pk3; + double BSIM3v32pk3b; + double BSIM3v32pw0; + double BSIM3v32pnlx; + double BSIM3v32pdvt0; + double BSIM3v32pdvt1; + double BSIM3v32pdvt2; + double BSIM3v32pdvt0w; + double BSIM3v32pdvt1w; + double BSIM3v32pdvt2w; + double BSIM3v32pdrout; + double BSIM3v32pdsub; + double BSIM3v32pvth0; + double BSIM3v32pua; + double BSIM3v32pua1; + double BSIM3v32pub; + double BSIM3v32pub1; + double BSIM3v32puc; + double BSIM3v32puc1; + double BSIM3v32pu0; + double BSIM3v32pute; + double BSIM3v32pvoff; + double BSIM3v32pdelta; + double BSIM3v32prdsw; + double BSIM3v32pprwg; + double BSIM3v32pprwb; + double BSIM3v32pprt; + double BSIM3v32peta0; + double BSIM3v32petab; + double BSIM3v32ppclm; + double BSIM3v32ppdibl1; + double BSIM3v32ppdibl2; + double BSIM3v32ppdiblb; + double BSIM3v32ppscbe1; + double BSIM3v32ppscbe2; + double BSIM3v32ppvag; + double BSIM3v32pwr; + double BSIM3v32pdwg; + double BSIM3v32pdwb; + double BSIM3v32pb0; + double BSIM3v32pb1; + double BSIM3v32palpha0; + double BSIM3v32palpha1; + double BSIM3v32pbeta0; + double BSIM3v32pvfb; + + /* CV model */ + double BSIM3v32pelm; + double BSIM3v32pcgsl; + double BSIM3v32pcgdl; + double BSIM3v32pckappa; + double BSIM3v32pcf; + double BSIM3v32pclc; + double BSIM3v32pcle; + double BSIM3v32pvfbcv; + double BSIM3v32pnoff; + double BSIM3v32pvoffcv; + double BSIM3v32pacde; + double BSIM3v32pmoin; + + double BSIM3v32tnom; + double BSIM3v32cgso; + double BSIM3v32cgdo; + double BSIM3v32cgbo; + double BSIM3v32xpart; + double BSIM3v32cFringOut; + double BSIM3v32cFringMax; + + double BSIM3v32sheetResistance; + double BSIM3v32jctSatCurDensity; + double BSIM3v32jctSidewallSatCurDensity; + double BSIM3v32bulkJctPotential; + double BSIM3v32bulkJctBotGradingCoeff; + double BSIM3v32bulkJctSideGradingCoeff; + double BSIM3v32bulkJctGateSideGradingCoeff; + double BSIM3v32sidewallJctPotential; + double BSIM3v32GatesidewallJctPotential; + double BSIM3v32unitAreaJctCap; + double BSIM3v32unitLengthSidewallJctCap; + double BSIM3v32unitLengthGateSidewallJctCap; + double BSIM3v32jctEmissionCoeff; + double BSIM3v32jctTempExponent; + + double BSIM3v32Lint; + double BSIM3v32Ll; + double BSIM3v32Llc; + double BSIM3v32Lln; + double BSIM3v32Lw; + double BSIM3v32Lwc; + double BSIM3v32Lwn; + double BSIM3v32Lwl; + double BSIM3v32Lwlc; + double BSIM3v32Lmin; + double BSIM3v32Lmax; + + double BSIM3v32Wint; + double BSIM3v32Wl; + double BSIM3v32Wlc; + double BSIM3v32Wln; + double BSIM3v32Ww; + double BSIM3v32Wwc; + double BSIM3v32Wwn; + double BSIM3v32Wwl; + double BSIM3v32Wwlc; + double BSIM3v32Wmin; + double BSIM3v32Wmax; + + /* acm model */ + double BSIM3v32xl; + double BSIM3v32xw; + +/* Pre-calculated constants */ + /* MCJ: move to size-dependent param. */ + double BSIM3v32vtm; + double BSIM3v32cox; + double BSIM3v32cof1; + double BSIM3v32cof2; + double BSIM3v32cof3; + double BSIM3v32cof4; + double BSIM3v32vcrit; + double BSIM3v32factor1; + double BSIM3v32PhiB; + double BSIM3v32PhiBSW; + double BSIM3v32PhiBSWG; + double BSIM3v32jctTempSatCurDensity; + double BSIM3v32jctSidewallTempSatCurDensity; + double BSIM3v32unitAreaTempJctCap; + double BSIM3v32unitLengthSidewallTempJctCap; + double BSIM3v32unitLengthGateSidewallTempJctCap; + + double BSIM3v32oxideTrapDensityA; + double BSIM3v32oxideTrapDensityB; + double BSIM3v32oxideTrapDensityC; + double BSIM3v32em; + double BSIM3v32ef; + double BSIM3v32af; + double BSIM3v32kf; + + struct bsim3SizeDependParam *pSizeDependParamKnot; + + /* Flags */ + unsigned BSIM3v32mobModGiven :1; + unsigned BSIM3v32binUnitGiven :1; + unsigned BSIM3v32capModGiven :1; + unsigned BSIM3v32acmModGiven :1; + unsigned BSIM3v32paramChkGiven :1; + unsigned BSIM3v32noiModGiven :1; + unsigned BSIM3v32typeGiven :1; + unsigned BSIM3v32toxGiven :1; + unsigned BSIM3v32versionGiven :1; + unsigned BSIM3v32toxmGiven :1; + unsigned BSIM3v32cdscGiven :1; + unsigned BSIM3v32cdscbGiven :1; + unsigned BSIM3v32cdscdGiven :1; + unsigned BSIM3v32citGiven :1; + unsigned BSIM3v32nfactorGiven :1; + unsigned BSIM3v32xjGiven :1; + unsigned BSIM3v32vsatGiven :1; + unsigned BSIM3v32atGiven :1; + unsigned BSIM3v32a0Given :1; + unsigned BSIM3v32agsGiven :1; + unsigned BSIM3v32a1Given :1; + unsigned BSIM3v32a2Given :1; + unsigned BSIM3v32ketaGiven :1; + unsigned BSIM3v32nsubGiven :1; + unsigned BSIM3v32npeakGiven :1; + unsigned BSIM3v32ngateGiven :1; + unsigned BSIM3v32gamma1Given :1; + unsigned BSIM3v32gamma2Given :1; + unsigned BSIM3v32vbxGiven :1; + unsigned BSIM3v32vbmGiven :1; + unsigned BSIM3v32xtGiven :1; + unsigned BSIM3v32k1Given :1; + unsigned BSIM3v32kt1Given :1; + unsigned BSIM3v32kt1lGiven :1; + unsigned BSIM3v32kt2Given :1; + unsigned BSIM3v32k2Given :1; + unsigned BSIM3v32k3Given :1; + unsigned BSIM3v32k3bGiven :1; + unsigned BSIM3v32w0Given :1; + unsigned BSIM3v32nlxGiven :1; + unsigned BSIM3v32dvt0Given :1; + unsigned BSIM3v32dvt1Given :1; + unsigned BSIM3v32dvt2Given :1; + unsigned BSIM3v32dvt0wGiven :1; + unsigned BSIM3v32dvt1wGiven :1; + unsigned BSIM3v32dvt2wGiven :1; + unsigned BSIM3v32droutGiven :1; + unsigned BSIM3v32dsubGiven :1; + unsigned BSIM3v32vth0Given :1; + unsigned BSIM3v32uaGiven :1; + unsigned BSIM3v32ua1Given :1; + unsigned BSIM3v32ubGiven :1; + unsigned BSIM3v32ub1Given :1; + unsigned BSIM3v32ucGiven :1; + unsigned BSIM3v32uc1Given :1; + unsigned BSIM3v32u0Given :1; + unsigned BSIM3v32uteGiven :1; + unsigned BSIM3v32voffGiven :1; + unsigned BSIM3v32rdswGiven :1; + unsigned BSIM3v32prwgGiven :1; + unsigned BSIM3v32prwbGiven :1; + unsigned BSIM3v32prtGiven :1; + unsigned BSIM3v32eta0Given :1; + unsigned BSIM3v32etabGiven :1; + unsigned BSIM3v32pclmGiven :1; + unsigned BSIM3v32pdibl1Given :1; + unsigned BSIM3v32pdibl2Given :1; + unsigned BSIM3v32pdiblbGiven :1; + unsigned BSIM3v32pscbe1Given :1; + unsigned BSIM3v32pscbe2Given :1; + unsigned BSIM3v32pvagGiven :1; + unsigned BSIM3v32deltaGiven :1; + unsigned BSIM3v32wrGiven :1; + unsigned BSIM3v32dwgGiven :1; + unsigned BSIM3v32dwbGiven :1; + unsigned BSIM3v32b0Given :1; + unsigned BSIM3v32b1Given :1; + unsigned BSIM3v32alpha0Given :1; + unsigned BSIM3v32alpha1Given :1; + unsigned BSIM3v32beta0Given :1; + unsigned BSIM3v32ijthGiven :1; + unsigned BSIM3v32vfbGiven :1; + + /* CV model */ + unsigned BSIM3v32elmGiven :1; + unsigned BSIM3v32cgslGiven :1; + unsigned BSIM3v32cgdlGiven :1; + unsigned BSIM3v32ckappaGiven :1; + unsigned BSIM3v32cfGiven :1; + unsigned BSIM3v32vfbcvGiven :1; + unsigned BSIM3v32clcGiven :1; + unsigned BSIM3v32cleGiven :1; + unsigned BSIM3v32dwcGiven :1; + unsigned BSIM3v32dlcGiven :1; + unsigned BSIM3v32noffGiven :1; + unsigned BSIM3v32voffcvGiven :1; + unsigned BSIM3v32acdeGiven :1; + unsigned BSIM3v32moinGiven :1; + unsigned BSIM3v32tcjGiven :1; + unsigned BSIM3v32tcjswGiven :1; + unsigned BSIM3v32tcjswgGiven :1; + unsigned BSIM3v32tpbGiven :1; + unsigned BSIM3v32tpbswGiven :1; + unsigned BSIM3v32tpbswgGiven :1; + + /* acm model */ + unsigned BSIM3v32hdifGiven :1; + unsigned BSIM3v32ldifGiven :1; + unsigned BSIM3v32ldGiven :1; + unsigned BSIM3v32rdGiven :1; + unsigned BSIM3v32rsGiven :1; + unsigned BSIM3v32rdcGiven :1; + unsigned BSIM3v32rscGiven :1; + + /* Length dependence */ + unsigned BSIM3v32lcdscGiven :1; + unsigned BSIM3v32lcdscbGiven :1; + unsigned BSIM3v32lcdscdGiven :1; + unsigned BSIM3v32lcitGiven :1; + unsigned BSIM3v32lnfactorGiven :1; + unsigned BSIM3v32lxjGiven :1; + unsigned BSIM3v32lvsatGiven :1; + unsigned BSIM3v32latGiven :1; + unsigned BSIM3v32la0Given :1; + unsigned BSIM3v32lagsGiven :1; + unsigned BSIM3v32la1Given :1; + unsigned BSIM3v32la2Given :1; + unsigned BSIM3v32lketaGiven :1; + unsigned BSIM3v32lnsubGiven :1; + unsigned BSIM3v32lnpeakGiven :1; + unsigned BSIM3v32lngateGiven :1; + unsigned BSIM3v32lgamma1Given :1; + unsigned BSIM3v32lgamma2Given :1; + unsigned BSIM3v32lvbxGiven :1; + unsigned BSIM3v32lvbmGiven :1; + unsigned BSIM3v32lxtGiven :1; + unsigned BSIM3v32lk1Given :1; + unsigned BSIM3v32lkt1Given :1; + unsigned BSIM3v32lkt1lGiven :1; + unsigned BSIM3v32lkt2Given :1; + unsigned BSIM3v32lk2Given :1; + unsigned BSIM3v32lk3Given :1; + unsigned BSIM3v32lk3bGiven :1; + unsigned BSIM3v32lw0Given :1; + unsigned BSIM3v32lnlxGiven :1; + unsigned BSIM3v32ldvt0Given :1; + unsigned BSIM3v32ldvt1Given :1; + unsigned BSIM3v32ldvt2Given :1; + unsigned BSIM3v32ldvt0wGiven :1; + unsigned BSIM3v32ldvt1wGiven :1; + unsigned BSIM3v32ldvt2wGiven :1; + unsigned BSIM3v32ldroutGiven :1; + unsigned BSIM3v32ldsubGiven :1; + unsigned BSIM3v32lvth0Given :1; + unsigned BSIM3v32luaGiven :1; + unsigned BSIM3v32lua1Given :1; + unsigned BSIM3v32lubGiven :1; + unsigned BSIM3v32lub1Given :1; + unsigned BSIM3v32lucGiven :1; + unsigned BSIM3v32luc1Given :1; + unsigned BSIM3v32lu0Given :1; + unsigned BSIM3v32luteGiven :1; + unsigned BSIM3v32lvoffGiven :1; + unsigned BSIM3v32lrdswGiven :1; + unsigned BSIM3v32lprwgGiven :1; + unsigned BSIM3v32lprwbGiven :1; + unsigned BSIM3v32lprtGiven :1; + unsigned BSIM3v32leta0Given :1; + unsigned BSIM3v32letabGiven :1; + unsigned BSIM3v32lpclmGiven :1; + unsigned BSIM3v32lpdibl1Given :1; + unsigned BSIM3v32lpdibl2Given :1; + unsigned BSIM3v32lpdiblbGiven :1; + unsigned BSIM3v32lpscbe1Given :1; + unsigned BSIM3v32lpscbe2Given :1; + unsigned BSIM3v32lpvagGiven :1; + unsigned BSIM3v32ldeltaGiven :1; + unsigned BSIM3v32lwrGiven :1; + unsigned BSIM3v32ldwgGiven :1; + unsigned BSIM3v32ldwbGiven :1; + unsigned BSIM3v32lb0Given :1; + unsigned BSIM3v32lb1Given :1; + unsigned BSIM3v32lalpha0Given :1; + unsigned BSIM3v32lalpha1Given :1; + unsigned BSIM3v32lbeta0Given :1; + unsigned BSIM3v32lvfbGiven :1; + + /* CV model */ + unsigned BSIM3v32lelmGiven :1; + unsigned BSIM3v32lcgslGiven :1; + unsigned BSIM3v32lcgdlGiven :1; + unsigned BSIM3v32lckappaGiven :1; + unsigned BSIM3v32lcfGiven :1; + unsigned BSIM3v32lclcGiven :1; + unsigned BSIM3v32lcleGiven :1; + unsigned BSIM3v32lvfbcvGiven :1; + unsigned BSIM3v32lnoffGiven :1; + unsigned BSIM3v32lvoffcvGiven :1; + unsigned BSIM3v32lacdeGiven :1; + unsigned BSIM3v32lmoinGiven :1; + + /* Width dependence */ + unsigned BSIM3v32wcdscGiven :1; + unsigned BSIM3v32wcdscbGiven :1; + unsigned BSIM3v32wcdscdGiven :1; + unsigned BSIM3v32wcitGiven :1; + unsigned BSIM3v32wnfactorGiven :1; + unsigned BSIM3v32wxjGiven :1; + unsigned BSIM3v32wvsatGiven :1; + unsigned BSIM3v32watGiven :1; + unsigned BSIM3v32wa0Given :1; + unsigned BSIM3v32wagsGiven :1; + unsigned BSIM3v32wa1Given :1; + unsigned BSIM3v32wa2Given :1; + unsigned BSIM3v32wketaGiven :1; + unsigned BSIM3v32wnsubGiven :1; + unsigned BSIM3v32wnpeakGiven :1; + unsigned BSIM3v32wngateGiven :1; + unsigned BSIM3v32wgamma1Given :1; + unsigned BSIM3v32wgamma2Given :1; + unsigned BSIM3v32wvbxGiven :1; + unsigned BSIM3v32wvbmGiven :1; + unsigned BSIM3v32wxtGiven :1; + unsigned BSIM3v32wk1Given :1; + unsigned BSIM3v32wkt1Given :1; + unsigned BSIM3v32wkt1lGiven :1; + unsigned BSIM3v32wkt2Given :1; + unsigned BSIM3v32wk2Given :1; + unsigned BSIM3v32wk3Given :1; + unsigned BSIM3v32wk3bGiven :1; + unsigned BSIM3v32ww0Given :1; + unsigned BSIM3v32wnlxGiven :1; + unsigned BSIM3v32wdvt0Given :1; + unsigned BSIM3v32wdvt1Given :1; + unsigned BSIM3v32wdvt2Given :1; + unsigned BSIM3v32wdvt0wGiven :1; + unsigned BSIM3v32wdvt1wGiven :1; + unsigned BSIM3v32wdvt2wGiven :1; + unsigned BSIM3v32wdroutGiven :1; + unsigned BSIM3v32wdsubGiven :1; + unsigned BSIM3v32wvth0Given :1; + unsigned BSIM3v32wuaGiven :1; + unsigned BSIM3v32wua1Given :1; + unsigned BSIM3v32wubGiven :1; + unsigned BSIM3v32wub1Given :1; + unsigned BSIM3v32wucGiven :1; + unsigned BSIM3v32wuc1Given :1; + unsigned BSIM3v32wu0Given :1; + unsigned BSIM3v32wuteGiven :1; + unsigned BSIM3v32wvoffGiven :1; + unsigned BSIM3v32wrdswGiven :1; + unsigned BSIM3v32wprwgGiven :1; + unsigned BSIM3v32wprwbGiven :1; + unsigned BSIM3v32wprtGiven :1; + unsigned BSIM3v32weta0Given :1; + unsigned BSIM3v32wetabGiven :1; + unsigned BSIM3v32wpclmGiven :1; + unsigned BSIM3v32wpdibl1Given :1; + unsigned BSIM3v32wpdibl2Given :1; + unsigned BSIM3v32wpdiblbGiven :1; + unsigned BSIM3v32wpscbe1Given :1; + unsigned BSIM3v32wpscbe2Given :1; + unsigned BSIM3v32wpvagGiven :1; + unsigned BSIM3v32wdeltaGiven :1; + unsigned BSIM3v32wwrGiven :1; + unsigned BSIM3v32wdwgGiven :1; + unsigned BSIM3v32wdwbGiven :1; + unsigned BSIM3v32wb0Given :1; + unsigned BSIM3v32wb1Given :1; + unsigned BSIM3v32walpha0Given :1; + unsigned BSIM3v32walpha1Given :1; + unsigned BSIM3v32wbeta0Given :1; + unsigned BSIM3v32wvfbGiven :1; + + /* CV model */ + unsigned BSIM3v32welmGiven :1; + unsigned BSIM3v32wcgslGiven :1; + unsigned BSIM3v32wcgdlGiven :1; + unsigned BSIM3v32wckappaGiven :1; + unsigned BSIM3v32wcfGiven :1; + unsigned BSIM3v32wclcGiven :1; + unsigned BSIM3v32wcleGiven :1; + unsigned BSIM3v32wvfbcvGiven :1; + unsigned BSIM3v32wnoffGiven :1; + unsigned BSIM3v32wvoffcvGiven :1; + unsigned BSIM3v32wacdeGiven :1; + unsigned BSIM3v32wmoinGiven :1; + + /* Cross-term dependence */ + unsigned BSIM3v32pcdscGiven :1; + unsigned BSIM3v32pcdscbGiven :1; + unsigned BSIM3v32pcdscdGiven :1; + unsigned BSIM3v32pcitGiven :1; + unsigned BSIM3v32pnfactorGiven :1; + unsigned BSIM3v32pxjGiven :1; + unsigned BSIM3v32pvsatGiven :1; + unsigned BSIM3v32patGiven :1; + unsigned BSIM3v32pa0Given :1; + unsigned BSIM3v32pagsGiven :1; + unsigned BSIM3v32pa1Given :1; + unsigned BSIM3v32pa2Given :1; + unsigned BSIM3v32pketaGiven :1; + unsigned BSIM3v32pnsubGiven :1; + unsigned BSIM3v32pnpeakGiven :1; + unsigned BSIM3v32pngateGiven :1; + unsigned BSIM3v32pgamma1Given :1; + unsigned BSIM3v32pgamma2Given :1; + unsigned BSIM3v32pvbxGiven :1; + unsigned BSIM3v32pvbmGiven :1; + unsigned BSIM3v32pxtGiven :1; + unsigned BSIM3v32pk1Given :1; + unsigned BSIM3v32pkt1Given :1; + unsigned BSIM3v32pkt1lGiven :1; + unsigned BSIM3v32pkt2Given :1; + unsigned BSIM3v32pk2Given :1; + unsigned BSIM3v32pk3Given :1; + unsigned BSIM3v32pk3bGiven :1; + unsigned BSIM3v32pw0Given :1; + unsigned BSIM3v32pnlxGiven :1; + unsigned BSIM3v32pdvt0Given :1; + unsigned BSIM3v32pdvt1Given :1; + unsigned BSIM3v32pdvt2Given :1; + unsigned BSIM3v32pdvt0wGiven :1; + unsigned BSIM3v32pdvt1wGiven :1; + unsigned BSIM3v32pdvt2wGiven :1; + unsigned BSIM3v32pdroutGiven :1; + unsigned BSIM3v32pdsubGiven :1; + unsigned BSIM3v32pvth0Given :1; + unsigned BSIM3v32puaGiven :1; + unsigned BSIM3v32pua1Given :1; + unsigned BSIM3v32pubGiven :1; + unsigned BSIM3v32pub1Given :1; + unsigned BSIM3v32pucGiven :1; + unsigned BSIM3v32puc1Given :1; + unsigned BSIM3v32pu0Given :1; + unsigned BSIM3v32puteGiven :1; + unsigned BSIM3v32pvoffGiven :1; + unsigned BSIM3v32prdswGiven :1; + unsigned BSIM3v32pprwgGiven :1; + unsigned BSIM3v32pprwbGiven :1; + unsigned BSIM3v32pprtGiven :1; + unsigned BSIM3v32peta0Given :1; + unsigned BSIM3v32petabGiven :1; + unsigned BSIM3v32ppclmGiven :1; + unsigned BSIM3v32ppdibl1Given :1; + unsigned BSIM3v32ppdibl2Given :1; + unsigned BSIM3v32ppdiblbGiven :1; + unsigned BSIM3v32ppscbe1Given :1; + unsigned BSIM3v32ppscbe2Given :1; + unsigned BSIM3v32ppvagGiven :1; + unsigned BSIM3v32pdeltaGiven :1; + unsigned BSIM3v32pwrGiven :1; + unsigned BSIM3v32pdwgGiven :1; + unsigned BSIM3v32pdwbGiven :1; + unsigned BSIM3v32pb0Given :1; + unsigned BSIM3v32pb1Given :1; + unsigned BSIM3v32palpha0Given :1; + unsigned BSIM3v32palpha1Given :1; + unsigned BSIM3v32pbeta0Given :1; + unsigned BSIM3v32pvfbGiven :1; + + /* CV model */ + unsigned BSIM3v32pelmGiven :1; + unsigned BSIM3v32pcgslGiven :1; + unsigned BSIM3v32pcgdlGiven :1; + unsigned BSIM3v32pckappaGiven :1; + unsigned BSIM3v32pcfGiven :1; + unsigned BSIM3v32pclcGiven :1; + unsigned BSIM3v32pcleGiven :1; + unsigned BSIM3v32pvfbcvGiven :1; + unsigned BSIM3v32pnoffGiven :1; + unsigned BSIM3v32pvoffcvGiven :1; + unsigned BSIM3v32pacdeGiven :1; + unsigned BSIM3v32pmoinGiven :1; + + unsigned BSIM3v32useFringeGiven :1; + + unsigned BSIM3v32tnomGiven :1; + unsigned BSIM3v32cgsoGiven :1; + unsigned BSIM3v32cgdoGiven :1; + unsigned BSIM3v32cgboGiven :1; + unsigned BSIM3v32xpartGiven :1; + unsigned BSIM3v32sheetResistanceGiven :1; + unsigned BSIM3v32jctSatCurDensityGiven :1; + unsigned BSIM3v32jctSidewallSatCurDensityGiven :1; + unsigned BSIM3v32bulkJctPotentialGiven :1; + unsigned BSIM3v32bulkJctBotGradingCoeffGiven :1; + unsigned BSIM3v32sidewallJctPotentialGiven :1; + unsigned BSIM3v32GatesidewallJctPotentialGiven :1; + unsigned BSIM3v32bulkJctSideGradingCoeffGiven :1; + unsigned BSIM3v32unitAreaJctCapGiven :1; + unsigned BSIM3v32unitLengthSidewallJctCapGiven :1; + unsigned BSIM3v32bulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM3v32unitLengthGateSidewallJctCapGiven :1; + unsigned BSIM3v32jctEmissionCoeffGiven :1; + unsigned BSIM3v32jctTempExponentGiven :1; + + unsigned BSIM3v32oxideTrapDensityAGiven :1; + unsigned BSIM3v32oxideTrapDensityBGiven :1; + unsigned BSIM3v32oxideTrapDensityCGiven :1; + unsigned BSIM3v32emGiven :1; + unsigned BSIM3v32efGiven :1; + unsigned BSIM3v32afGiven :1; + unsigned BSIM3v32kfGiven :1; + + unsigned BSIM3v32LintGiven :1; + unsigned BSIM3v32LlGiven :1; + unsigned BSIM3v32LlcGiven :1; + unsigned BSIM3v32LlnGiven :1; + unsigned BSIM3v32LwGiven :1; + unsigned BSIM3v32LwcGiven :1; + unsigned BSIM3v32LwnGiven :1; + unsigned BSIM3v32LwlGiven :1; + unsigned BSIM3v32LwlcGiven :1; + unsigned BSIM3v32LminGiven :1; + unsigned BSIM3v32LmaxGiven :1; + + unsigned BSIM3v32WintGiven :1; + unsigned BSIM3v32WlGiven :1; + unsigned BSIM3v32WlcGiven :1; + unsigned BSIM3v32WlnGiven :1; + unsigned BSIM3v32WwGiven :1; + unsigned BSIM3v32WwcGiven :1; + unsigned BSIM3v32WwnGiven :1; + unsigned BSIM3v32WwlGiven :1; + unsigned BSIM3v32WwlcGiven :1; + unsigned BSIM3v32WminGiven :1; + unsigned BSIM3v32WmaxGiven :1; + + /* acm model */ + unsigned BSIM3v32xlGiven :1; + unsigned BSIM3v32xwGiven :1; + +} BSIM3v32model; + + +#ifndef NMOS +#define NMOS 1 +#define PMOS -1 +#endif /*NMOS*/ + + +/* device parameters */ +#define BSIM3v32_W 1 +#define BSIM3v32_L 2 +#define BSIM3v32_M 15 +#define BSIM3v32_AS 3 +#define BSIM3v32_AD 4 +#define BSIM3v32_PS 5 +#define BSIM3v32_PD 6 +#define BSIM3v32_NRS 7 +#define BSIM3v32_NRD 8 +#define BSIM3v32_OFF 9 +#define BSIM3v32_IC_VBS 10 +#define BSIM3v32_IC_VDS 11 +#define BSIM3v32_IC_VGS 12 +#define BSIM3v32_IC 13 +#define BSIM3v32_NQSMOD 14 + +/* model parameters */ +#define BSIM3v32_MOD_CAPMOD 101 +#define BSIM3v32_MOD_ACMMOD 102 +#define BSIM3v32_MOD_MOBMOD 103 +#define BSIM3v32_MOD_NOIMOD 104 + +#define BSIM3v32_MOD_TOX 105 + +#define BSIM3v32_MOD_CDSC 106 +#define BSIM3v32_MOD_CDSCB 107 +#define BSIM3v32_MOD_CIT 108 +#define BSIM3v32_MOD_NFACTOR 109 +#define BSIM3v32_MOD_XJ 110 +#define BSIM3v32_MOD_VSAT 111 +#define BSIM3v32_MOD_AT 112 +#define BSIM3v32_MOD_A0 113 +#define BSIM3v32_MOD_A1 114 +#define BSIM3v32_MOD_A2 115 +#define BSIM3v32_MOD_KETA 116 +#define BSIM3v32_MOD_NSUB 117 +#define BSIM3v32_MOD_NPEAK 118 +#define BSIM3v32_MOD_NGATE 120 +#define BSIM3v32_MOD_GAMMA1 121 +#define BSIM3v32_MOD_GAMMA2 122 +#define BSIM3v32_MOD_VBX 123 +#define BSIM3v32_MOD_BINUNIT 124 + +#define BSIM3v32_MOD_VBM 125 + +#define BSIM3v32_MOD_XT 126 +#define BSIM3v32_MOD_K1 129 +#define BSIM3v32_MOD_KT1 130 +#define BSIM3v32_MOD_KT1L 131 +#define BSIM3v32_MOD_K2 132 +#define BSIM3v32_MOD_KT2 133 +#define BSIM3v32_MOD_K3 134 +#define BSIM3v32_MOD_K3B 135 +#define BSIM3v32_MOD_W0 136 +#define BSIM3v32_MOD_NLX 137 + +#define BSIM3v32_MOD_DVT0 138 +#define BSIM3v32_MOD_DVT1 139 +#define BSIM3v32_MOD_DVT2 140 + +#define BSIM3v32_MOD_DVT0W 141 +#define BSIM3v32_MOD_DVT1W 142 +#define BSIM3v32_MOD_DVT2W 143 + +#define BSIM3v32_MOD_DROUT 144 +#define BSIM3v32_MOD_DSUB 145 +#define BSIM3v32_MOD_VTH0 146 +#define BSIM3v32_MOD_UA 147 +#define BSIM3v32_MOD_UA1 148 +#define BSIM3v32_MOD_UB 149 +#define BSIM3v32_MOD_UB1 150 +#define BSIM3v32_MOD_UC 151 +#define BSIM3v32_MOD_UC1 152 +#define BSIM3v32_MOD_U0 153 +#define BSIM3v32_MOD_UTE 154 +#define BSIM3v32_MOD_VOFF 155 +#define BSIM3v32_MOD_DELTA 156 +#define BSIM3v32_MOD_RDSW 157 +#define BSIM3v32_MOD_PRT 158 +#define BSIM3v32_MOD_LDD 159 +#define BSIM3v32_MOD_ETA 160 +#define BSIM3v32_MOD_ETA0 161 +#define BSIM3v32_MOD_ETAB 162 +#define BSIM3v32_MOD_PCLM 163 +#define BSIM3v32_MOD_PDIBL1 164 +#define BSIM3v32_MOD_PDIBL2 165 +#define BSIM3v32_MOD_PSCBE1 166 +#define BSIM3v32_MOD_PSCBE2 167 +#define BSIM3v32_MOD_PVAG 168 +#define BSIM3v32_MOD_WR 169 +#define BSIM3v32_MOD_DWG 170 +#define BSIM3v32_MOD_DWB 171 +#define BSIM3v32_MOD_B0 172 +#define BSIM3v32_MOD_B1 173 +#define BSIM3v32_MOD_ALPHA0 174 +#define BSIM3v32_MOD_BETA0 175 +#define BSIM3v32_MOD_PDIBLB 178 + +#define BSIM3v32_MOD_PRWG 179 +#define BSIM3v32_MOD_PRWB 180 + +#define BSIM3v32_MOD_CDSCD 181 +#define BSIM3v32_MOD_AGS 182 + +#define BSIM3v32_MOD_FRINGE 184 +#define BSIM3v32_MOD_ELM 185 +#define BSIM3v32_MOD_CGSL 186 +#define BSIM3v32_MOD_CGDL 187 +#define BSIM3v32_MOD_CKAPPA 188 +#define BSIM3v32_MOD_CF 189 +#define BSIM3v32_MOD_CLC 190 +#define BSIM3v32_MOD_CLE 191 +#define BSIM3v32_MOD_PARAMCHK 192 +#define BSIM3v32_MOD_VERSION 193 +#define BSIM3v32_MOD_VFBCV 194 +#define BSIM3v32_MOD_ACDE 195 +#define BSIM3v32_MOD_MOIN 196 +#define BSIM3v32_MOD_NOFF 197 +#define BSIM3v32_MOD_IJTH 198 +#define BSIM3v32_MOD_ALPHA1 199 +#define BSIM3v32_MOD_VFB 200 +#define BSIM3v32_MOD_TOXM 201 +#define BSIM3v32_MOD_TCJ 202 +#define BSIM3v32_MOD_TCJSW 203 +#define BSIM3v32_MOD_TCJSWG 204 +#define BSIM3v32_MOD_TPB 205 +#define BSIM3v32_MOD_TPBSW 206 +#define BSIM3v32_MOD_TPBSWG 207 +#define BSIM3v32_MOD_VOFFCV 208 + +/* Length dependence */ +#define BSIM3v32_MOD_LCDSC 251 +#define BSIM3v32_MOD_LCDSCB 252 +#define BSIM3v32_MOD_LCIT 253 +#define BSIM3v32_MOD_LNFACTOR 254 +#define BSIM3v32_MOD_LXJ 255 +#define BSIM3v32_MOD_LVSAT 256 +#define BSIM3v32_MOD_LAT 257 +#define BSIM3v32_MOD_LA0 258 +#define BSIM3v32_MOD_LA1 259 +#define BSIM3v32_MOD_LA2 260 +#define BSIM3v32_MOD_LKETA 261 +#define BSIM3v32_MOD_LNSUB 262 +#define BSIM3v32_MOD_LNPEAK 263 +#define BSIM3v32_MOD_LNGATE 265 +#define BSIM3v32_MOD_LGAMMA1 266 +#define BSIM3v32_MOD_LGAMMA2 267 +#define BSIM3v32_MOD_LVBX 268 + +#define BSIM3v32_MOD_LVBM 270 + +#define BSIM3v32_MOD_LXT 272 +#define BSIM3v32_MOD_LK1 275 +#define BSIM3v32_MOD_LKT1 276 +#define BSIM3v32_MOD_LKT1L 277 +#define BSIM3v32_MOD_LK2 278 +#define BSIM3v32_MOD_LKT2 279 +#define BSIM3v32_MOD_LK3 280 +#define BSIM3v32_MOD_LK3B 281 +#define BSIM3v32_MOD_LW0 282 +#define BSIM3v32_MOD_LNLX 283 + +#define BSIM3v32_MOD_LDVT0 284 +#define BSIM3v32_MOD_LDVT1 285 +#define BSIM3v32_MOD_LDVT2 286 + +#define BSIM3v32_MOD_LDVT0W 287 +#define BSIM3v32_MOD_LDVT1W 288 +#define BSIM3v32_MOD_LDVT2W 289 + +#define BSIM3v32_MOD_LDROUT 290 +#define BSIM3v32_MOD_LDSUB 291 +#define BSIM3v32_MOD_LVTH0 292 +#define BSIM3v32_MOD_LUA 293 +#define BSIM3v32_MOD_LUA1 294 +#define BSIM3v32_MOD_LUB 295 +#define BSIM3v32_MOD_LUB1 296 +#define BSIM3v32_MOD_LUC 297 +#define BSIM3v32_MOD_LUC1 298 +#define BSIM3v32_MOD_LU0 299 +#define BSIM3v32_MOD_LUTE 300 +#define BSIM3v32_MOD_LVOFF 301 +#define BSIM3v32_MOD_LDELTA 302 +#define BSIM3v32_MOD_LRDSW 303 +#define BSIM3v32_MOD_LPRT 304 +#define BSIM3v32_MOD_LLDD 305 +#define BSIM3v32_MOD_LETA 306 +#define BSIM3v32_MOD_LETA0 307 +#define BSIM3v32_MOD_LETAB 308 +#define BSIM3v32_MOD_LPCLM 309 +#define BSIM3v32_MOD_LPDIBL1 310 +#define BSIM3v32_MOD_LPDIBL2 311 +#define BSIM3v32_MOD_LPSCBE1 312 +#define BSIM3v32_MOD_LPSCBE2 313 +#define BSIM3v32_MOD_LPVAG 314 +#define BSIM3v32_MOD_LWR 315 +#define BSIM3v32_MOD_LDWG 316 +#define BSIM3v32_MOD_LDWB 317 +#define BSIM3v32_MOD_LB0 318 +#define BSIM3v32_MOD_LB1 319 +#define BSIM3v32_MOD_LALPHA0 320 +#define BSIM3v32_MOD_LBETA0 321 +#define BSIM3v32_MOD_LPDIBLB 324 + +#define BSIM3v32_MOD_LPRWG 325 +#define BSIM3v32_MOD_LPRWB 326 + +#define BSIM3v32_MOD_LCDSCD 327 +#define BSIM3v32_MOD_LAGS 328 + + +#define BSIM3v32_MOD_LFRINGE 331 +#define BSIM3v32_MOD_LELM 332 +#define BSIM3v32_MOD_LCGSL 333 +#define BSIM3v32_MOD_LCGDL 334 +#define BSIM3v32_MOD_LCKAPPA 335 +#define BSIM3v32_MOD_LCF 336 +#define BSIM3v32_MOD_LCLC 337 +#define BSIM3v32_MOD_LCLE 338 +#define BSIM3v32_MOD_LVFBCV 339 +#define BSIM3v32_MOD_LACDE 340 +#define BSIM3v32_MOD_LMOIN 341 +#define BSIM3v32_MOD_LNOFF 342 +#define BSIM3v32_MOD_LALPHA1 344 +#define BSIM3v32_MOD_LVFB 345 +#define BSIM3v32_MOD_LVOFFCV 346 + +/* Width dependence */ +#define BSIM3v32_MOD_WCDSC 381 +#define BSIM3v32_MOD_WCDSCB 382 +#define BSIM3v32_MOD_WCIT 383 +#define BSIM3v32_MOD_WNFACTOR 384 +#define BSIM3v32_MOD_WXJ 385 +#define BSIM3v32_MOD_WVSAT 386 +#define BSIM3v32_MOD_WAT 387 +#define BSIM3v32_MOD_WA0 388 +#define BSIM3v32_MOD_WA1 389 +#define BSIM3v32_MOD_WA2 390 +#define BSIM3v32_MOD_WKETA 391 +#define BSIM3v32_MOD_WNSUB 392 +#define BSIM3v32_MOD_WNPEAK 393 +#define BSIM3v32_MOD_WNGATE 395 +#define BSIM3v32_MOD_WGAMMA1 396 +#define BSIM3v32_MOD_WGAMMA2 397 +#define BSIM3v32_MOD_WVBX 398 + +#define BSIM3v32_MOD_WVBM 400 + +#define BSIM3v32_MOD_WXT 402 +#define BSIM3v32_MOD_WK1 405 +#define BSIM3v32_MOD_WKT1 406 +#define BSIM3v32_MOD_WKT1L 407 +#define BSIM3v32_MOD_WK2 408 +#define BSIM3v32_MOD_WKT2 409 +#define BSIM3v32_MOD_WK3 410 +#define BSIM3v32_MOD_WK3B 411 +#define BSIM3v32_MOD_WW0 412 +#define BSIM3v32_MOD_WNLX 413 + +#define BSIM3v32_MOD_WDVT0 414 +#define BSIM3v32_MOD_WDVT1 415 +#define BSIM3v32_MOD_WDVT2 416 + +#define BSIM3v32_MOD_WDVT0W 417 +#define BSIM3v32_MOD_WDVT1W 418 +#define BSIM3v32_MOD_WDVT2W 419 + +#define BSIM3v32_MOD_WDROUT 420 +#define BSIM3v32_MOD_WDSUB 421 +#define BSIM3v32_MOD_WVTH0 422 +#define BSIM3v32_MOD_WUA 423 +#define BSIM3v32_MOD_WUA1 424 +#define BSIM3v32_MOD_WUB 425 +#define BSIM3v32_MOD_WUB1 426 +#define BSIM3v32_MOD_WUC 427 +#define BSIM3v32_MOD_WUC1 428 +#define BSIM3v32_MOD_WU0 429 +#define BSIM3v32_MOD_WUTE 430 +#define BSIM3v32_MOD_WVOFF 431 +#define BSIM3v32_MOD_WDELTA 432 +#define BSIM3v32_MOD_WRDSW 433 +#define BSIM3v32_MOD_WPRT 434 +#define BSIM3v32_MOD_WLDD 435 +#define BSIM3v32_MOD_WETA 436 +#define BSIM3v32_MOD_WETA0 437 +#define BSIM3v32_MOD_WETAB 438 +#define BSIM3v32_MOD_WPCLM 439 +#define BSIM3v32_MOD_WPDIBL1 440 +#define BSIM3v32_MOD_WPDIBL2 441 +#define BSIM3v32_MOD_WPSCBE1 442 +#define BSIM3v32_MOD_WPSCBE2 443 +#define BSIM3v32_MOD_WPVAG 444 +#define BSIM3v32_MOD_WWR 445 +#define BSIM3v32_MOD_WDWG 446 +#define BSIM3v32_MOD_WDWB 447 +#define BSIM3v32_MOD_WB0 448 +#define BSIM3v32_MOD_WB1 449 +#define BSIM3v32_MOD_WALPHA0 450 +#define BSIM3v32_MOD_WBETA0 451 +#define BSIM3v32_MOD_WPDIBLB 454 + +#define BSIM3v32_MOD_WPRWG 455 +#define BSIM3v32_MOD_WPRWB 456 + +#define BSIM3v32_MOD_WCDSCD 457 +#define BSIM3v32_MOD_WAGS 458 + + +#define BSIM3v32_MOD_WFRINGE 461 +#define BSIM3v32_MOD_WELM 462 +#define BSIM3v32_MOD_WCGSL 463 +#define BSIM3v32_MOD_WCGDL 464 +#define BSIM3v32_MOD_WCKAPPA 465 +#define BSIM3v32_MOD_WCF 466 +#define BSIM3v32_MOD_WCLC 467 +#define BSIM3v32_MOD_WCLE 468 +#define BSIM3v32_MOD_WVFBCV 469 +#define BSIM3v32_MOD_WACDE 470 +#define BSIM3v32_MOD_WMOIN 471 +#define BSIM3v32_MOD_WNOFF 472 +#define BSIM3v32_MOD_WALPHA1 474 +#define BSIM3v32_MOD_WVFB 475 +#define BSIM3v32_MOD_WVOFFCV 476 + +/* Cross-term dependence */ +#define BSIM3v32_MOD_PCDSC 511 +#define BSIM3v32_MOD_PCDSCB 512 +#define BSIM3v32_MOD_PCIT 513 +#define BSIM3v32_MOD_PNFACTOR 514 +#define BSIM3v32_MOD_PXJ 515 +#define BSIM3v32_MOD_PVSAT 516 +#define BSIM3v32_MOD_PAT 517 +#define BSIM3v32_MOD_PA0 518 +#define BSIM3v32_MOD_PA1 519 +#define BSIM3v32_MOD_PA2 520 +#define BSIM3v32_MOD_PKETA 521 +#define BSIM3v32_MOD_PNSUB 522 +#define BSIM3v32_MOD_PNPEAK 523 +#define BSIM3v32_MOD_PNGATE 525 +#define BSIM3v32_MOD_PGAMMA1 526 +#define BSIM3v32_MOD_PGAMMA2 527 +#define BSIM3v32_MOD_PVBX 528 + +#define BSIM3v32_MOD_PVBM 530 + +#define BSIM3v32_MOD_PXT 532 +#define BSIM3v32_MOD_PK1 535 +#define BSIM3v32_MOD_PKT1 536 +#define BSIM3v32_MOD_PKT1L 537 +#define BSIM3v32_MOD_PK2 538 +#define BSIM3v32_MOD_PKT2 539 +#define BSIM3v32_MOD_PK3 540 +#define BSIM3v32_MOD_PK3B 541 +#define BSIM3v32_MOD_PW0 542 +#define BSIM3v32_MOD_PNLX 543 + +#define BSIM3v32_MOD_PDVT0 544 +#define BSIM3v32_MOD_PDVT1 545 +#define BSIM3v32_MOD_PDVT2 546 + +#define BSIM3v32_MOD_PDVT0W 547 +#define BSIM3v32_MOD_PDVT1W 548 +#define BSIM3v32_MOD_PDVT2W 549 + +#define BSIM3v32_MOD_PDROUT 550 +#define BSIM3v32_MOD_PDSUB 551 +#define BSIM3v32_MOD_PVTH0 552 +#define BSIM3v32_MOD_PUA 553 +#define BSIM3v32_MOD_PUA1 554 +#define BSIM3v32_MOD_PUB 555 +#define BSIM3v32_MOD_PUB1 556 +#define BSIM3v32_MOD_PUC 557 +#define BSIM3v32_MOD_PUC1 558 +#define BSIM3v32_MOD_PU0 559 +#define BSIM3v32_MOD_PUTE 560 +#define BSIM3v32_MOD_PVOFF 561 +#define BSIM3v32_MOD_PDELTA 562 +#define BSIM3v32_MOD_PRDSW 563 +#define BSIM3v32_MOD_PPRT 564 +#define BSIM3v32_MOD_PLDD 565 +#define BSIM3v32_MOD_PETA 566 +#define BSIM3v32_MOD_PETA0 567 +#define BSIM3v32_MOD_PETAB 568 +#define BSIM3v32_MOD_PPCLM 569 +#define BSIM3v32_MOD_PPDIBL1 570 +#define BSIM3v32_MOD_PPDIBL2 571 +#define BSIM3v32_MOD_PPSCBE1 572 +#define BSIM3v32_MOD_PPSCBE2 573 +#define BSIM3v32_MOD_PPVAG 574 +#define BSIM3v32_MOD_PWR 575 +#define BSIM3v32_MOD_PDWG 576 +#define BSIM3v32_MOD_PDWB 577 +#define BSIM3v32_MOD_PB0 578 +#define BSIM3v32_MOD_PB1 579 +#define BSIM3v32_MOD_PALPHA0 580 +#define BSIM3v32_MOD_PBETA0 581 +#define BSIM3v32_MOD_PPDIBLB 584 + +#define BSIM3v32_MOD_PPRWG 585 +#define BSIM3v32_MOD_PPRWB 586 + +#define BSIM3v32_MOD_PCDSCD 587 +#define BSIM3v32_MOD_PAGS 588 + +#define BSIM3v32_MOD_PFRINGE 591 +#define BSIM3v32_MOD_PELM 592 +#define BSIM3v32_MOD_PCGSL 593 +#define BSIM3v32_MOD_PCGDL 594 +#define BSIM3v32_MOD_PCKAPPA 595 +#define BSIM3v32_MOD_PCF 596 +#define BSIM3v32_MOD_PCLC 597 +#define BSIM3v32_MOD_PCLE 598 +#define BSIM3v32_MOD_PVFBCV 599 +#define BSIM3v32_MOD_PACDE 600 +#define BSIM3v32_MOD_PMOIN 601 +#define BSIM3v32_MOD_PNOFF 602 +#define BSIM3v32_MOD_PALPHA1 604 +#define BSIM3v32_MOD_PVFB 605 +#define BSIM3v32_MOD_PVOFFCV 606 + +#define BSIM3v32_MOD_TNOM 651 +#define BSIM3v32_MOD_CGSO 652 +#define BSIM3v32_MOD_CGDO 653 +#define BSIM3v32_MOD_CGBO 654 +#define BSIM3v32_MOD_XPART 655 + +#define BSIM3v32_MOD_RSH 656 +#define BSIM3v32_MOD_JS 657 +#define BSIM3v32_MOD_PB 658 +#define BSIM3v32_MOD_MJ 659 +#define BSIM3v32_MOD_PBSW 660 +#define BSIM3v32_MOD_MJSW 661 +#define BSIM3v32_MOD_CJ 662 +#define BSIM3v32_MOD_CJSW 663 +#define BSIM3v32_MOD_NMOS 664 +#define BSIM3v32_MOD_PMOS 665 + +#define BSIM3v32_MOD_NOIA 666 +#define BSIM3v32_MOD_NOIB 667 +#define BSIM3v32_MOD_NOIC 668 + +#define BSIM3v32_MOD_LINT 669 +#define BSIM3v32_MOD_LL 670 +#define BSIM3v32_MOD_LLN 671 +#define BSIM3v32_MOD_LW 672 +#define BSIM3v32_MOD_LWN 673 +#define BSIM3v32_MOD_LWL 674 +#define BSIM3v32_MOD_LMIN 675 +#define BSIM3v32_MOD_LMAX 676 + +#define BSIM3v32_MOD_WINT 677 +#define BSIM3v32_MOD_WL 678 +#define BSIM3v32_MOD_WLN 679 +#define BSIM3v32_MOD_WW 680 +#define BSIM3v32_MOD_WWN 681 +#define BSIM3v32_MOD_WWL 682 +#define BSIM3v32_MOD_WMIN 683 +#define BSIM3v32_MOD_WMAX 684 + +#define BSIM3v32_MOD_DWC 685 +#define BSIM3v32_MOD_DLC 686 + +#define BSIM3v32_MOD_EM 687 +#define BSIM3v32_MOD_EF 688 +#define BSIM3v32_MOD_AF 689 +#define BSIM3v32_MOD_KF 690 + +#define BSIM3v32_MOD_NJ 691 +#define BSIM3v32_MOD_XTI 692 + +#define BSIM3v32_MOD_PBSWG 693 +#define BSIM3v32_MOD_MJSWG 694 +#define BSIM3v32_MOD_CJSWG 695 +#define BSIM3v32_MOD_JSW 696 + +#define BSIM3v32_MOD_LLC 697 +#define BSIM3v32_MOD_LWC 698 +#define BSIM3v32_MOD_LWLC 699 + +#define BSIM3v32_MOD_WLC 700 +#define BSIM3v32_MOD_WWC 701 +#define BSIM3v32_MOD_WWLC 702 + +/* acm parameters */ +#define BSIM3v32_MOD_XL 703 +#define BSIM3v32_MOD_XW 704 + +#define BSIM3v32_MOD_HDIF 711 +#define BSIM3v32_MOD_LDIF 712 +#define BSIM3v32_MOD_LD 713 +#define BSIM3v32_MOD_RD 714 +#define BSIM3v32_MOD_RS 715 +#define BSIM3v32_MOD_RDC 716 +#define BSIM3v32_MOD_RSC 717 + +/* device questions */ +#define BSIM3v32_DNODE 751 +#define BSIM3v32_GNODE 752 +#define BSIM3v32_SNODE 753 +#define BSIM3v32_BNODE 754 +#define BSIM3v32_DNODEPRIME 755 +#define BSIM3v32_SNODEPRIME 756 +#define BSIM3v32_VBD 757 +#define BSIM3v32_VBS 758 +#define BSIM3v32_VGS 759 +#define BSIM3v32_VDS 760 +#define BSIM3v32_CD 761 +#define BSIM3v32_CBS 762 +#define BSIM3v32_CBD 763 +#define BSIM3v32_GM 764 +#define BSIM3v32_GDS 765 +#define BSIM3v32_GMBS 766 +#define BSIM3v32_GBD 767 +#define BSIM3v32_GBS 768 +#define BSIM3v32_QB 769 +#define BSIM3v32_CQB 770 +#define BSIM3v32_QG 771 +#define BSIM3v32_CQG 772 +#define BSIM3v32_QD 773 +#define BSIM3v32_CQD 774 +#define BSIM3v32_CGG 775 +#define BSIM3v32_CGD 776 +#define BSIM3v32_CGS 777 +#define BSIM3v32_CBG 778 +#define BSIM3v32_CAPBD 779 +#define BSIM3v32_CQBD 780 +#define BSIM3v32_CAPBS 781 +#define BSIM3v32_CQBS 782 +#define BSIM3v32_CDG 783 +#define BSIM3v32_CDD 784 +#define BSIM3v32_CDS 785 +#define BSIM3v32_VON 786 +#define BSIM3v32_VDSAT 787 +#define BSIM3v32_QBS 788 +#define BSIM3v32_QBD 789 +#define BSIM3v32_SOURCECONDUCT 790 +#define BSIM3v32_DRAINCONDUCT 791 +#define BSIM3v32_CBDB 792 +#define BSIM3v32_CBSB 793 + + +#include "bsim3v32ext.h" + +extern void BSIM3v32evaluate(double,double,double,BSIM3v32instance*,BSIM3v32model*, + double*,double*,double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, CKTcircuit*); +extern int BSIM3v32debug(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*, int); +extern int BSIM3v32checkModel(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*); + +#endif /*BSIM3v32*/ diff --git a/src/spicelib/devices/bsim3v32/bsim3v32ext.h b/src/spicelib/devices/bsim3v32/bsim3v32ext.h new file mode 100644 index 000000000..b61b05109 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/bsim3v32ext.h @@ -0,0 +1,31 @@ +/********** +Copyright 1999 Regents of the University of California. All rights reserved. +Author: 1991 JianHui Huang and Min-Chie Jeng. +Modified by Yuhua Cheng to use BSIM3v3 in Spice3f5 (Jan. 1997) +Modified by Paolo Nenzi 2002 +File: bsim3ext.h +**********/ + +extern int BSIM3v32acLoad(GENmodel *,CKTcircuit*); +extern int BSIM3v32ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); +extern int BSIM3v32convTest(GENmodel *,CKTcircuit*); +extern int BSIM3v32delete(GENmodel*,IFuid,GENinstance**); +extern void BSIM3v32destroy(GENmodel**); +extern int BSIM3v32getic(GENmodel*,CKTcircuit*); +extern int BSIM3v32load(GENmodel*,CKTcircuit*); +extern int BSIM3v32mAsk(CKTcircuit*,GENmodel *,int, IFvalue*); +extern int BSIM3v32mDelete(GENmodel**,IFuid,GENmodel*); +extern int BSIM3v32mParam(int,IFvalue*,GENmodel*); +extern void BSIM3v32mosCap(CKTcircuit*, double, double, double, double, + double, double, double, double, double, double, double, + double, double, double, double, double, double, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*); +extern int BSIM3v32param(int,IFvalue*,GENinstance*,IFvalue*); +extern int BSIM3v32pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); +extern int BSIM3v32setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); +extern int BSIM3v32temp(GENmodel*,CKTcircuit*); +extern int BSIM3v32trunc(GENmodel*,CKTcircuit*,double*); +extern int BSIM3v32noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*); +extern int BSIM3v32unsetup(GENmodel*,CKTcircuit*); diff --git a/src/spicelib/devices/bsim3v32/bsim3v32init.c b/src/spicelib/devices/bsim3v32/bsim3v32init.c new file mode 100644 index 000000000..276375c5d --- /dev/null +++ b/src/spicelib/devices/bsim3v32/bsim3v32init.c @@ -0,0 +1,83 @@ +#include "config.h" + +#include "devdefs.h" + +#include "bsim3v32itf.h" +#include "bsim3v32ext.h" +#include "bsim3v32init.h" + + +SPICEdev BSIM3v32info = { + { "BSIM3v32", + "Berkeley Short Channel IGFET Model Version-3", + + &BSIM3v32nSize, + &BSIM3v32nSize, + BSIM3v32names, + + &BSIM3v32pTSize, + BSIM3v32pTable, + + &BSIM3v32mPTSize, + BSIM3v32mPTable, + +#ifdef XSPICE +/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ +/*--------------------------- End of SDB fix -------------------------*/ +#endif + + DEV_DEFAULT + }, + + DEVparam : BSIM3v32param, + DEVmodParam : BSIM3v32mParam, + DEVload : BSIM3v32load, + DEVsetup : BSIM3v32setup, + DEVunsetup : BSIM3v32unsetup, + DEVpzSetup : BSIM3v32setup, + DEVtemperature: BSIM3v32temp, + DEVtrunc : BSIM3v32trunc, + DEVfindBranch : NULL, + DEVacLoad : BSIM3v32acLoad, + DEVaccept : NULL, + DEVdestroy : BSIM3v32destroy, + DEVmodDelete : BSIM3v32mDelete, + DEVdelete : BSIM3v32delete, + DEVsetic : BSIM3v32getic, + DEVask : BSIM3v32ask, + DEVmodAsk : BSIM3v32mAsk, + DEVpzLoad : BSIM3v32pzLoad, + DEVconvTest : BSIM3v32convTest, + DEVsenSetup : NULL, + DEVsenLoad : NULL, + DEVsenUpdate : NULL, + DEVsenAcLoad : NULL, + DEVsenPrint : NULL, + DEVsenTrunc : NULL, + DEVdisto : NULL, + DEVnoise : BSIM3v32noise, +#ifdef CIDER + DEVdump : NULL, + DEVacct : NULL, +#endif + DEVinstSize : &BSIM3v32iSize, + DEVmodSize : &BSIM3v32mSize + +}; + + +SPICEdev * +get_bsim3v32_info(void) +{ + return &BSIM3v32info; +} diff --git a/src/spicelib/devices/bsim3v32/bsim3v32init.h b/src/spicelib/devices/bsim3v32/bsim3v32init.h new file mode 100644 index 000000000..3a4e74c68 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/bsim3v32init.h @@ -0,0 +1,13 @@ +#ifndef _BSIM3v32INIT_H +#define _BSIM3v32INIT_H + +extern IFparm BSIM3v32pTable[ ]; +extern IFparm BSIM3v32mPTable[ ]; +extern char *BSIM3v32names[ ]; +extern int BSIM3v32pTSize; +extern int BSIM3v32mPTSize; +extern int BSIM3v32nSize; +extern int BSIM3v32iSize; +extern int BSIM3v32mSize; + +#endif diff --git a/src/spicelib/devices/bsim3v32/bsim3v32itf.h b/src/spicelib/devices/bsim3v32/bsim3v32itf.h new file mode 100644 index 000000000..c63bc3690 --- /dev/null +++ b/src/spicelib/devices/bsim3v32/bsim3v32itf.h @@ -0,0 +1,13 @@ +/********** +Copyright 1999 Regents of the University of California. All rights reserved. +Author: 1991 JianHui Huang and Min-Chie Jeng. +Modified by Paolo Nenzi 2002 +File: bsim3itf.h +**********/ + +#ifndef DEV_BSIM3v32 +#define DEV_BSIM3v32 + +SPICEdev *get_bsim3v32_info(void); + +#endif