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ngspice
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reduce simulation time for tcl examples

This commit is contained in:
dwarning 2017-10-12 11:22:17 +02:00
parent af7ab797c2
commit 8539029e6d
2 changed files with 2 additions and 2 deletions
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2
examples/tclspice/tcl-testbench2/example.cir
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@ -583,5 +583,5 @@ VARACTOR_V VARACTOR_V 0 DC 2.5
.SAVE vddpower#branch .SAVE vddpower#branch
.SAVE vdd .SAVE vdd
.SAVE varactor_v .SAVE varactor_v
.TRAN 0.02n 3000n 0n 0.5n .TRAN 0.02n 100n 0n 0.5n
.END .END

2
examples/tclspice/tcl-testbench4/example.cir
View File

@ -579,5 +579,5 @@ EVLOGIC VRAMP 0 VSLEW 0 2.5
VDDPOWER VDD VRAMP DC 0 VDDPOWER VDD VRAMP DC 0
VARACTOR_V VARACTOR_V 0 DC 2.5 VARACTOR_V VARACTOR_V 0 DC 2.5
.TRAN 0.02n 3000n 0n 0.5n .TRAN 0.02n 100n 0n 0.5n
.END .END