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decrease iteration count for low base biasing

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dwarning 2023-08-04 21:43:45 +02:00 committed by Holger Vogt
parent 4f22726c87
commit 53af7d179b
1 changed files with 2 additions and 1 deletions
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3
src/spicelib/devices/vbic/vbicload.c
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@ -246,7 +246,8 @@ VBICload(GENmodel *inModel, CKTcircuit *ckt)
Vrth = 0.0, Icth = 0.0, Icth_Vrth = 0.0;
} else if((ckt->CKTmode & MODEINITJCT) && (here->VBICoff==0)) {
Vbe=Vbei=Vbex=model->VBICtype*here->VBICtVcrit;
Vbc=Vbci=Vbcx=Vbep=0.0;
Vbc=Vbcx=Vbep=0.0;
Vbci=-model->VBICtype*here->VBICtVcrit;
Vbcp=Vbc-Vbe;
Vrci=Vrbi=Vrbp=0.0;
Vrcx=Vrbx=Vre=Vrs=0.0;