From 53af7d179bc1f256714250280eb4d8c7bf40e8a0 Mon Sep 17 00:00:00 2001
From: dwarning <dwarning>
Date: Fri, 4 Aug 2023 21:43:45 +0200
Subject: [PATCH] decrease iteration count for low base biasing

---
 src/spicelib/devices/vbic/vbicload.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/spicelib/devices/vbic/vbicload.c b/src/spicelib/devices/vbic/vbicload.c
index b0c7efff4..622345c20 100644
--- a/src/spicelib/devices/vbic/vbicload.c
+++ b/src/spicelib/devices/vbic/vbicload.c
@@ -246,7 +246,8 @@ VBICload(GENmodel *inModel, CKTcircuit *ckt)
                 Vrth = 0.0, Icth = 0.0, Icth_Vrth = 0.0;
             } else if((ckt->CKTmode & MODEINITJCT) && (here->VBICoff==0)) {
                 Vbe=Vbei=Vbex=model->VBICtype*here->VBICtVcrit;
-                Vbc=Vbci=Vbcx=Vbep=0.0;
+                Vbc=Vbcx=Vbep=0.0;
+                Vbci=-model->VBICtype*here->VBICtVcrit;
                 Vbcp=Vbc-Vbe;
                 Vrci=Vrbi=Vrbp=0.0;
                 Vrcx=Vrbx=Vre=Vrs=0.0;