Fix error in previous fix for Bug #607 -

"DC Source with Pulse stops pulsing half way through simulation".
Non-periodic PWL waveforms reverted to zero on termination.

src/spicelib/devices/vsrc/vsrcload.c

@@ -320,6 +320,8 @@ VSRCload(GENmodel *inModel, CKTcircuit *ckt)
                                     here->VSRCcoeffs[here->VSRCrBreakpt];
                                 time -= period * floor(time / period);
                             } else {
+                                value =
+                                    here->VSRCcoeffs[here->VSRCfunctionOrder - 1];
                                 break;
                             }
                         }