2000-04-27 22:03:57 +02:00
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DEVICES
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-------------------------------------------------------------------------------
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2000-05-01 20:23:50 +02:00
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This file contains the status of devices available in ng-spice. This
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file will be updated every time the device cospecific code is
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altered/changed.
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2000-04-27 22:03:57 +02:00
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**************************************
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********** Linear devices **********
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**************************************
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CAP - Capacitor
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Initial Release
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IND - Inductor
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Initial Release
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RES - Resistor
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2000-05-01 20:23:50 +02:00
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This is a modified version of the spice3 resistance model. This
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model supports different ac and dc values (ac=...). This changes
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2000-06-04 11:02:39 +02:00
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are introduced by Serban Popescu. The "multiplicity factor" (m)
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2000-06-04 13:42:06 +02:00
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has been introduced. The "scale factor" has been introduced.
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2000-05-23 22:20:49 +02:00
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*)Rework 11: The code has been modified to reflect spice parsing
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standard.
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2000-04-27 22:03:57 +02:00
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2001-01-24 12:13:10 +01:00
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**************************************
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2000-04-27 22:03:57 +02:00
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******** Distributed elements ********
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2001-01-24 12:13:10 +01:00
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**************************************
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2000-04-27 22:03:57 +02:00
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TRA - Transmission line
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2000-05-01 20:23:50 +02:00
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Initial release
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2000-04-27 22:03:57 +02:00
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LTRA - Lossy Transmission line
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2000-05-01 20:23:50 +02:00
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Initial release
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2000-04-27 22:03:57 +02:00
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URC - Uniform distributed RC line
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2000-05-01 20:23:50 +02:00
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Initial release
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2000-04-27 22:03:57 +02:00
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**************************************
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********** V/I Sources **********
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**************************************
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2000-05-01 20:23:50 +02:00
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ASRC - Arbitrary Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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CCCS - Current Controlled Current Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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CCVS - Current Controlled Voltage Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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ISRC - Independent Current Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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VCCS - Voltage Controlled Current Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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VCVS - Voltage Controlled Voltage Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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VSRC - Independent Voltage Source
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Initial Release
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2000-04-27 22:03:57 +02:00
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2001-01-24 12:13:10 +01:00
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**************************************
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2000-04-27 22:03:57 +02:00
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********* Switches **********
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**************************************
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CSW - Current controlled switch
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2000-05-01 20:23:50 +02:00
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Initial release
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2000-04-27 22:03:57 +02:00
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SW - Voltage controlled switch
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2000-05-01 20:23:50 +02:00
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Initial release
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2000-04-27 22:03:57 +02:00
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**************************************
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********** Diodes **********
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**************************************
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2000-05-01 20:23:50 +02:00
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DIO - Junction Diode
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Initial Release
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2000-04-27 22:03:57 +02:00
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2001-01-24 12:13:10 +01:00
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**************************************
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2000-04-27 22:03:57 +02:00
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*********** Bipolar Devices **********
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**************************************
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2000-05-01 20:23:50 +02:00
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BJT - Bipolar Junction Transistor
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Initial Relelase
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2000-04-27 22:03:57 +02:00
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**************************************
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********** FET Devices **********
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**************************************
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2000-05-01 20:23:50 +02:00
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JFET - Junction Field Effect transistor
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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JFET2 - Jfet PS model
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Initial release. TO BE TESTED
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2000-04-27 22:03:57 +02:00
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2001-01-24 12:13:10 +01:00
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**************************************
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2000-04-27 22:03:57 +02:00
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********* MES devices *********
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**************************************
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MES - MESfet model
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2000-05-01 20:23:50 +02:00
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Initial release
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2000-04-27 22:03:57 +02:00
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2001-01-24 12:13:10 +01:00
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**************************************
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2000-04-27 22:03:57 +02:00
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********* MOS devices *********
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**************************************
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2000-05-01 20:23:50 +02:00
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MOS1 - Level 1 MOS model
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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MOS2 - Level 2 MOS model
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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MOS3 - Level 3 MOS model
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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MOS6 - Level 6 MOS model
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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BSIM1 - BSIM model level 1
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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BSIM2 - BSIM model level 2
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Initial Release
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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BSIM3 - BSIM model level 3
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This is the BSIM3v3.2.2 model from Berkeley device group. You
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can find some test netlists with results for this model at
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http://www-device.eecs.berkeley.edu/~bsim3.
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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BSIM3v1 - BSIM model level 3
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This is the BSIM3v3.1 model modified by Serban Popescu. This is
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level 49 model. It is an implementation that supports HDIF and M
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parameters. Test netlists are available at the URL above. TO BE
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TESTED AND IMPROVED.
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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BSIM3v2 - BSIM model level 3
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This is the BSIM3v3.2 model. It is proved only for compatibility
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with existing netlists and parameters files. As always, tests
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are availabe on the Berkeley's device group site (at the above
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URL).
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2000-04-27 22:03:57 +02:00
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2000-05-01 20:23:50 +02:00
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BSIM4 - BSIM model level 4 (0.18 um)
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Initial Release. TO BE TESTED.
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2000-04-27 22:03:57 +02:00
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**************************************
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********** SOI Devices *********
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**************************************
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BSIM3SOI_FD - SOI model (fully depleted devices)
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2000-12-08 17:58:47 +01:00
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Initial Release Ver: 2.1. TO BE TESTED.
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FD model has been integrated as Level = 10
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There is a bsim3soifd directory under the test
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hierarchy. Test circuits come from the bsim3soi
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web site at:
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http://www-device.eecs.berkeley.edu/~bsimsoi
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2000-04-27 22:03:57 +02:00
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2001-01-24 12:13:10 +01:00
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*) rework-14: removed #ifndef NEWCONV code.
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2000-04-27 22:03:57 +02:00
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BSIM3SOI_PD - SOI model (partially depleted devices)
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2000-12-08 17:58:47 +01:00
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Initial Release Ver: 2.2.1. TO BE TESTED.
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PD model has been integrated as Level = 9
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2000-11-21 08:38:51 +01:00
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There is a bsim3soipd directory under the test
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2000-12-08 17:58:47 +01:00
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hierarchy. Test circuits come from the bsim3soi
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2000-11-21 08:38:51 +01:00
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web site at:
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2000-11-21 21:12:35 +01:00
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http://www-device.eecs.berkeley.edu/~bsimsoi
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2001-01-21 18:24:23 +01:00
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2001-01-24 12:13:10 +01:00
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*) rework-14: removed #ifndef NEWCONV code.
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2001-01-21 18:24:23 +01:00
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BSIM3SOI_DD - SOI Model (dynamic depletion model)
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Initial Release Ver: 2.1. TO BE TESTED.
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DD model has been integrated as level= 11
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There is a bsim3soidd directory under the
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test hierarchy. Test circuits come from bsim3soi
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web site at:
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http://www-device.eecs.berkeley.edu/~bsimsoi
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2001-01-24 12:13:10 +01:00
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*) rework-14: removed #ifndef NEWCONV code.
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