171 lines
5.7 KiB
Plaintext
171 lines
5.7 KiB
Plaintext
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.SUBCKT MCP6041 1 2 3 4 5
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* | | | | |
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* | | | | Output
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* | | | Negative Supply
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* | | Positive Supply
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* | Inverting Input
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* Non-inverting Input
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*
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********************************************************************************
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* Software License Agreement *
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* *
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* The software supplied herewith by Microchip Technology Incorporated (the *
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* 'Company') is intended and supplied to you, the Company's customer, for use *
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* soley and exclusively on Microchip products. *
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* *
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* The software is owned by the Company and/or its supplier, and is protected *
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* under applicable copyright laws. All rights are reserved. Any use in *
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* violation of the foregoing restrictions may subject the user to criminal *
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* sanctions under applicable laws, as well as to civil liability for the *
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* breach of the terms and conditions of this license. *
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* *
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* THIS SOFTWARE IS PROVIDED IN AN 'AS IS' CONDITION. NO WARRANTIES, WHETHER *
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* EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED *
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO *
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* THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR *
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* SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. *
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********************************************************************************
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*
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* The following op-amps are covered by this model:
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* MCP6041,MCP6042,MCP6043,MCP6044
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*
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* Revision History:
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* REV A: 07-Sep-01, Created model
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* REV B: 27-Aug-06, Added over temperature, improved output stage,
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* fixed overdrive recovery time
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* REV C: 09-Apr-07, Adjusted quiescent current to match spec
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* REV D: 27-Jul-07, Modified output impedance at expense of comparator operation
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* to correct transient response with capacitive load
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*
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* Recommendations:
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* Use PSPICE (other simulators may require translation)
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* For a quick, effective design, use a combination of: data sheet
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* specs, bench testing, and simulations with this macromodel
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* For high impedance circuits, set GMIN=100F in the .OPTIONS statement
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*
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* Supported:
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* Typical performance for temperature range (-40 to 125) degrees Celsius
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* DC, AC, Transient, and Noise analyses.
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* Most specs, including: offsets, DC PSRR, DC CMRR, input impedance,
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* open loop gain, voltage ranges, supply current, ... , etc.
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* Temperature effects for Ibias, Iquiescent, Iout short circuit
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* current, Vsat on both rails, Slew Rate vs. Temp and P.S.
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*
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* Not Supported:
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* Chip select (MCP6043)
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* Some Variation in specs vs. Power Supply Voltage
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* Monte Carlo (Vos, Ib), Process variation
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* Distortion (detailed non-linear behavior)
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* Behavior outside normal operating region
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*
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* Input Stage
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V10 3 10 -500M
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R10 10 11 69k
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R11 10 12 69k
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C12 1 0 6P
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C11 11 12 95P
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E12 71 14 POLY(6) 20 0 21 0 22 0 23 0 26 0 27 0 2.00M 10 10 29 29 1 1
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G12 1 0 62 0 1m
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M12 11 14 15 15 NMI
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G13 1 2 62 0 20u
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M14 12 2 15 15 NMI
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G14 2 0 62 0 1m
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C14 2 0 6P
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I15 15 4 4U
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V16 16 4 -300M
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GD16 16 1 TABLE {V(16,1)} ((-100,-1p)(0,0)(1m,1u)(2m,1m))
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V13 3 13 -300M
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GD13 2 13 TABLE {V(2,13)} ((-100,-1p)(0,0)(1m,1u)(2m,1m))
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R71 1 0 20.0E12
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R72 2 0 20.0E12
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R73 1 2 20.0E12
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I80 1 2 500E-15
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*
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* Noise, PSRR, and CMRR
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I20 21 20 423U
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D20 20 0 DN1
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D21 0 21 DN1
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I22 22 23 1N
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R22 22 0 1k
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R23 0 23 1k
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G26 0 26 POLY(2) 3 0 4 0 0.00 -79.4U -39.8U
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R26 26 0 1
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G27 0 27 POLY(2) 1 0 2 0 0 26u 26u
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R27 27 0 1
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*
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* Open Loop Gain, Slew Rate
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G30 0 30 12 11 3.2
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R30 30 0 1.00K
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I31 0 31 DC 338
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R31 31 0 1 TC=2.25M,-15U
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GD31 30 0 TABLE {V(30,31)} ((-100,-1n)(0,0)(1m,0.1)(2m,2))
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I32 32 0 DC 535
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R32 32 0 1 TC=2.02M,-11U
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GD32 0 30 TABLE {V(30,32)} ((-2m,2)(-1m,0.1)(0,0)(100,-1n))
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G33 0 33 30 0 1m
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R33 33 0 3K
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G34 0 34 33 0 1
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R34 34 0 1K
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C34 34 0 100M
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G37 0 341 34 0 1m
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R341 341 0 1k
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C341 341 0 1.3N
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G371 0 37 341 0 1m
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R37 37 0 1K
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C37 37 0 3N
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G38 0 38 37 0 1m
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R38 39 0 1K
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L38 38 39 13M
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E38 35 0 38 0 1
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G35 33 0 TABLE {V(35,3)} ((-1,-1n)(0,0)(3.4k,1n))(3.5k,1))
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G36 33 0 TABLE {V(35,4)} ((-3.5k,-1)((-3.4k,-1n)(0,0)(1,1n))
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*
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* Output Stage
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R80 50 0 100MEG
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G50 0 50 57 96 2
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R58 57 96 0.50
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R57 57 0 101k
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C58 5 0 2.00P
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G57 0 57 POLY(3) 3 0 4 0 35 0 0 10U 1.49U 9.1U
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GD55 55 57 TABLE {V(55,57)} ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
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GD56 57 56 TABLE {V(57,56)} ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
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E55 55 0 POLY(2) 3 0 51 0 -0.7M 1 -40M
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E56 56 0 POLY(2) 4 0 52 0 0.6M 1 -55M
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R51 51 0 1k
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R52 52 0 1k
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GD51 50 51 TABLE {V(50,51)} ((-10,-1n)(0,0)(1m,1m)(2m,1))
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GD52 50 52 TABLE {V(50,52)} ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
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G53 3 0 POLY(1) 51 0 -4U 1M
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G54 0 4 POLY(1) 52 0 -4U -1M
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*
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* Current Limit
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G99 96 5 99 0 1
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R98 0 98 1 TC=-6.9M
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G97 0 98 TABLE { V(96,5) } ((-11.0,-3.9M)(-1.00M,-3.87M)(0,0)(1.00M,3.23M)(11.0,3.26M))
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E97 99 0 VALUE { V(98)*((V(3)-V(4))*1.39 + -1.5)}
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D98 4 5 DESD
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D99 5 3 DESD
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*
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* Temperature / Voltage Sensitive IQuiscent
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R61 0 61 1 TC=2.52M,-4.31U
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G61 3 4 61 0 1
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G60 0 61 TABLE {V(3, 4)}
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+ ((0,0)(700M,5.3N)(770M,10.0N)(1.00,480N)
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+ (1.5,500N)(3.5,530N)(7.00,580N))
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*
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* Temperature Sensistive offset voltage
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I73 0 70 DC 1uA
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R74 0 70 1 TC=1.5
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E75 1 71 70 0 1
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*
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* Temp Sensistive IBias
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I62 0 62 DC 1uA
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R62 0 62 REXP 210U
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*
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* Models
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.MODEL NMI NMOS(L=2.00U W=42.0U KP=20.0U LEVEL=1 )
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.MODEL DESD D N=1 IS=1.00E-15
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.MODEL DN1 D IS=1P KF=0.2F AF=1
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.MODEL REXP RES TCE= 9
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.ENDS MCP6041
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