mirror of https://github.com/YosysHQ/nextpnr.git
0be6173064
Prior to the 5A series, pin functions (GPIO/SSPI/JTAG/DONE/etc) were switched using fuses. This was done during the binary image formation stage for loading into the FPGA using the command line keys of the gowin_pack program. The 5A series features certain ports that connect to VCC or GND depending on whether the pin is used as SSPI or GPIO, for example. This mechanism exists in parallel with fuses, but it is not described anywhere, nor is there a corresponding primitive. To generate working images, we have no choice but to simulate this thing at the nextpnr stage, since VCC/GND routing is required. For now, two flags are added, responsible for the SSPI and I2C pin functions. Signed-off-by: YRabbit <rabbit@yrabbit.cyou> |
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| .. | ||
| himbaechel_dbgen | ||
| uarch | ||
| .gitignore | ||
| CMakeLists.txt | ||
| arch.cc | ||
| arch.h | ||
| arch_pybindings.cc | ||
| arch_pybindings.h | ||
| archdefs.h | ||
| chipdb.h | ||
| himbaechel_api.cc | ||
| himbaechel_api.h | ||
| himbaechel_constids.h | ||
| himbaechel_gfxids.h | ||
| himbaechel_helpers.cc | ||
| himbaechel_helpers.h | ||
| main.cc | ||