mirror of https://github.com/YosysHQ/nextpnr.git
xilinx: Small tweak to delay prediction
Signed-off-by: gatecat <gatecat@ds0.me>
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@ -775,8 +775,12 @@ delay_t XilinxImpl::predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel,
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int sx, sy, dx, dy;
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tile_xy(ctx->chip_info, src_bel.tile, sx, sy);
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tile_xy(ctx->chip_info, dst_bel.tile, dx, dy);
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if (dst_pin == id_CIN && src_pin == id_CO3)
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return 0;
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// TODO: improve sophistication here based on old nextpnr-xilinx code
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return 500 + 25 * (2 * std::abs(dy - sy) + std::abs(dx - sx));
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int dist_x = std::abs(dx - sx), dist_y = std::abs(dy - sy);
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return 500 + 12 * (2 * std::max(dist_y - 6, 0) + 4 * std::min(dist_y, 6) + std::max(dist_x - 12, 0) +
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2 * std::min(dist_x, 12));
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}
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BoundingBox XilinxImpl::getRouteBoundingBox(WireId src, WireId dst) const
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