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xilinx: Work around missing kintex7 timing for now 

Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2026-02-21 17:52:08 +01:00
parent d43c09d070
commit c0ff514582
1 changed files with 4 additions and 1 deletions
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5
himbaechel/uarch/xilinx/gen/xilinx_gen.py
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@ -367,7 +367,10 @@ def main():
ff.add_clock_out("CK", "Q", ClockEdge.RISING, TimingValue(300, 350))
# Load SDF for carry and mux
slicem_sdf = parse_sdf.parse_sdf_file(path.join(xraydb_root, "timings", "slicem.sdf"))
timings_root = xraydb_root
if "kintex7" in xraydb_root: # TODO: missing
timings_root = xraydb_root.replace("kintex7", "artix7")
slicem_sdf = parse_sdf.parse_sdf_file(path.join(timings_root, "timings", "slicem.sdf"))
mux = ch.timing.add_cell_variant("DEFAULT", "SELMUX2_1")
import_sdf_timings(mux, slicem_sdf.cells[("SELMUX2_1", "SLICEM/F7BMUX")])
carry = ch.timing.add_cell_variant("DEFAULT", "CARRY4")