From c0ff514582bae33166cfb802c212e2af314fa26b Mon Sep 17 00:00:00 2001 From: gatecat Date: Sat, 21 Feb 2026 17:52:08 +0100 Subject: [PATCH] xilinx: Work around missing kintex7 timing for now Signed-off-by: gatecat --- himbaechel/uarch/xilinx/gen/xilinx_gen.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/himbaechel/uarch/xilinx/gen/xilinx_gen.py b/himbaechel/uarch/xilinx/gen/xilinx_gen.py index 3764ff55..79ee4356 100644 --- a/himbaechel/uarch/xilinx/gen/xilinx_gen.py +++ b/himbaechel/uarch/xilinx/gen/xilinx_gen.py @@ -367,7 +367,10 @@ def main(): ff.add_clock_out("CK", "Q", ClockEdge.RISING, TimingValue(300, 350)) # Load SDF for carry and mux - slicem_sdf = parse_sdf.parse_sdf_file(path.join(xraydb_root, "timings", "slicem.sdf")) + timings_root = xraydb_root + if "kintex7" in xraydb_root: # TODO: missing + timings_root = xraydb_root.replace("kintex7", "artix7") + slicem_sdf = parse_sdf.parse_sdf_file(path.join(timings_root, "timings", "slicem.sdf")) mux = ch.timing.add_cell_variant("DEFAULT", "SELMUX2_1") import_sdf_timings(mux, slicem_sdf.cells[("SELMUX2_1", "SLICEM/F7BMUX")]) carry = ch.timing.add_cell_variant("DEFAULT", "CARRY4")