mistral: Tidying up

Signed-off-by: gatecat <[email protected]>

common/archcheck.cc

@@ -28,7 +28,7 @@
 
 USING_NEXTPNR_NAMESPACE
 
-#ifndef ARCH_CYCLONEV
+#ifndef ARCH_MISTRAL
 // The LRU cache to reduce memory usage during the connectivity check relies on getPips() having some spacial locality,
 // which the current CycloneV arch impl doesn't have. This may be fixed in the future, though.
 #define USING_LRU_CACHE

common/router2.cc

@@ -902,7 +902,8 @@ struct Router2
             if ((net_data.fail_count % 3) == 0) {
                 // Every three times a net fails to route, expand the bounding box to increase the search space
 #ifndef ARCH_MISTRAL
-                // This patch seems to make thing worse for CycloneV, as it slows down the resolution of TD congestion, disable it
+                // This patch seems to make thing worse for CycloneV, as it slows down the resolution of TD congestion,
+                // disable it
                 net_data.bb.x0 = std::max(net_data.bb.x0 - 1, 0);
                 net_data.bb.y0 = std::max(net_data.bb.y0 - 1, 0);
                 net_data.bb.x1 = std::min(net_data.bb.x1 + 1, ctx->getGridDimX());

mistral/arch.cc

@@ -480,4 +480,4 @@ const std::vector<std::string> Arch::availablePlacers = {"sa",
 const std::string Arch::defaultRouter = "router2";
 const std::vector<std::string> Arch::availableRouters = {"router1", "router2"};
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END

mistral/arch.h

@@ -543,4 +543,4 @@ struct Arch : BaseArch<ArchRanges>
 
 NEXTPNR_NAMESPACE_END
 
-#endif
+#endif

mistral/archdefs.h

@@ -233,4 +233,4 @@ template <> struct hash<NEXTPNR_NAMESPACE_PREFIX PipId>
 
 } // namespace std
 
-#endif
+#endif

mistral/base_bitstream.cc

@@ -97,4 +97,4 @@ void Arch::init_base_bitstream()
     }
 }
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END

mistral/constids.inc

@@ -74,4 +74,4 @@ X(Y)
 
 X(LOC)
 
-X(MISTRAL_CLKENA)
+X(MISTRAL_CLKENA)

mistral/io.cc

@@ -58,4 +58,4 @@ BelId Arch::get_io_pin_bel(const CycloneV::pin_info_t *pin) const
     return bel_by_block_idx(CycloneV::pos2x(pos), CycloneV::pos2y(pos), id_MISTRAL_IO, (pad >> 14));
 }
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END

mistral/lab.cc

@@ -966,4 +966,4 @@ uint64_t Arch::compute_lut_mask(uint32_t lab, uint8_t alm)
     return mask;
 }
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END

mistral/pack.cc

@@ -362,4 +362,4 @@ bool Arch::pack()
     return true;
 }
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END

mistral/pins.cc

@@ -64,4 +64,4 @@ CellPinStyle Arch::get_cell_pin_style(const CellInfo *cell, IdString port) const
     return PINSTYLE_NONE;
 }
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END

mistral/qsf.cc

@@ -278,4 +278,4 @@ void Arch::read_qsf(std::istream &in)
     QsfParser(buf, getCtx())();
 }
 
-NEXTPNR_NAMESPACE_END
+NEXTPNR_NAMESPACE_END