gowin: Enable driving FF XD from SEL

Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2026-05-13 15:59:45 +02:00
parent 8b7dbbedd1
commit 3a83235f91
2 changed files with 3 additions and 4 deletions

View File

@ -1424,7 +1424,7 @@ bool GowinImpl::slice_valid(int x, int y, int z) const
} else {
src = fast_cell_info.at(alu->flat_index).alu_sum;
}
if (ff_data.ff_d != src) {
if (ff_data.ff_d != src && bels.at(mux_z.at(z)) != nullptr) {
return false;
}
}

View File

@ -1120,10 +1120,9 @@ def create_logic_tiletype(chip: Chip, db: chipdb, x: int, y: int, ttyp: int, tde
tt.add_bel_pin(lut, "F", f"F{i}", PinType.OUTPUT)
if i < 6 or "HAS_DFF67" in db.chip_flags:
tt.create_pip(f"F{i}", f"XD{i}", get_tm_class(db, f"F{i}"))
# also experimental input for FF using SEL wire - this theory will
# also experimental input for FF using SEL wire - this will
# allow to place unrelated LUT and FF next to each other
# don't create for now
#tt.create_pip(f"SEL{i}", f"XD{i}", get_tm_class(db, f"SEL{i}"))
tt.create_pip(f"SEL{i}", f"XD{i}", get_tm_class(db, f"SEL{i}"))
# FF
ff = tt.create_bel(f"DFF{i}", "DFF", z =(i * 2 + 1))