mirror of https://github.com/YosysHQ/nextpnr.git
gowin: Enable driving FF XD from SEL
Signed-off-by: gatecat <gatecat@ds0.me>
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8b7dbbedd1
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3a83235f91
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@ -1424,7 +1424,7 @@ bool GowinImpl::slice_valid(int x, int y, int z) const
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} else {
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src = fast_cell_info.at(alu->flat_index).alu_sum;
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}
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if (ff_data.ff_d != src) {
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if (ff_data.ff_d != src && bels.at(mux_z.at(z)) != nullptr) {
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return false;
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}
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}
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@ -1120,10 +1120,9 @@ def create_logic_tiletype(chip: Chip, db: chipdb, x: int, y: int, ttyp: int, tde
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tt.add_bel_pin(lut, "F", f"F{i}", PinType.OUTPUT)
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if i < 6 or "HAS_DFF67" in db.chip_flags:
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tt.create_pip(f"F{i}", f"XD{i}", get_tm_class(db, f"F{i}"))
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# also experimental input for FF using SEL wire - this theory will
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# also experimental input for FF using SEL wire - this will
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# allow to place unrelated LUT and FF next to each other
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# don't create for now
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#tt.create_pip(f"SEL{i}", f"XD{i}", get_tm_class(db, f"SEL{i}"))
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tt.create_pip(f"SEL{i}", f"XD{i}", get_tm_class(db, f"SEL{i}"))
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# FF
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ff = tt.create_bel(f"DFF{i}", "DFF", z =(i * 2 + 1))
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