mirror of
https://github.com/RTimothyEdwards/netgen.git
synced 2026-08-24 23:17:28 +02:00
Compare commits
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e15620257c | ||
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7a947ee9be | ||
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b5f188de42 | ||
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ccbb286cf3 | ||
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4809c02f79 | ||
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af3982766e |
+10
-1
@@ -6057,7 +6057,7 @@ int reorderpins(struct hashlist *p, int file)
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struct nlist *ptr;
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struct nlist *tc2 = Circuit2;
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struct objlist *ob, *ob2, *firstpin;
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int i, numports, *nodes;
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int i, numports, *nodes, unordered;
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char **names;
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ptr = (struct nlist *)(p->ptr);
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@@ -6071,14 +6071,23 @@ int reorderpins(struct hashlist *p, int file)
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/* instances of both cells. */
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numports = 0;
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unordered = 0;
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ob2 = tc2->cell;
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while (ob2 && ob2->type == PORT) {
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if (ob2->model.port < 0) {
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ob2->model.port = numports;
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unordered = 1;
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}
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numports++;
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ob2 = ob2->next;
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}
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nodes = (int *)CALLOC(numports, sizeof(int));
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names = (char **)CALLOC(numports, sizeof(char *));
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if (unordered)
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Fprintf(stderr, "Ports of %s are unordered. "
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"Ordering will be arbitrary.", tc2->name);
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for (ob = ptr->cell; ob != NULL; ) {
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if (ob->type == FIRSTPIN) {
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if ((*matchfunc)(ob->model.class, tc2->name)) {
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+10
-2
@@ -3309,7 +3309,9 @@ int check_pin_nodes(struct objlist *ob1, struct objlist *ob2)
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pob = pob->next;
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}
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if (nob->type > FIRSTPIN || pob->type > FIRSTPIN) return FALSE;
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if (nob && pob && (nob->type > FIRSTPIN || pob->type > FIRSTPIN))
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return FALSE;
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return TRUE;
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}
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@@ -3486,7 +3488,13 @@ int CombineSerial(char *model, int file)
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/* only pointer to it. */
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for (obp = instlist[i][0]; obp->next->type > FIRSTPIN ||
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obp->next->type == PROPERTY; obp = obp->next);
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for (ob2 = obp; ob2->next != instlist[i][1]; ob2 = ob2->next);
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for (ob2 = obp; ob2 && ob2->next != instlist[i][1]; ob2 = ob2->next);
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/* Device may have been moved by the above code. If so, look for */
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/* it from the beginning of the list. */
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if (ob2 == NULL)
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for (ob2 = tp->cell; ob2->next != instlist[i][1]; ob2 = ob2->next);
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for (obs = ob2->next; obs->next && (obs->next->type > FIRSTPIN
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|| obs->next->type == PROPERTY); obs = obs->next);
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ob2->next = obs->next;
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